2 * Copyright (C) 2005-2006 Atmel Corporation
4 * SPDX-License-Identifier: GPL-2.0+
9 * The u-boot networking stack is a little weird. It seems like the
10 * networking core allocates receive buffers up front without any
11 * regard to the hardware that's supposed to actually receive those
14 * The MACB receives packets into 128-byte receive buffers, so the
15 * buffers allocated by the core isn't very practical to use. We'll
16 * allocate our own, but we need one such buffer in case a packet
17 * wraps around the DMA ring so that we have to copy it.
19 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
20 * configuration header. This way, the core allocates one RX buffer
21 * and one TX buffer, each of which can hold a ethernet packet of
24 * For some reason, the networking core unconditionally specifies a
25 * 32-byte packet "alignment" (which really should be called
26 * "padding"). MACB shouldn't need that, but we'll refrain from any
27 * core modifications here...
35 #include <linux/mii.h>
37 #include <asm/dma-mapping.h>
38 #include <asm/arch/clk.h>
39 #include <asm-generic/errno.h>
43 #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
44 #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
45 #define CONFIG_SYS_MACB_TX_RING_SIZE 16
46 #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
47 #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
49 struct macb_dma_desc {
54 #define RXADDR_USED 0x00000001
55 #define RXADDR_WRAP 0x00000002
57 #define RXBUF_FRMLEN_MASK 0x00000fff
58 #define RXBUF_FRAME_START 0x00004000
59 #define RXBUF_FRAME_END 0x00008000
60 #define RXBUF_TYPEID_MATCH 0x00400000
61 #define RXBUF_ADDR4_MATCH 0x00800000
62 #define RXBUF_ADDR3_MATCH 0x01000000
63 #define RXBUF_ADDR2_MATCH 0x02000000
64 #define RXBUF_ADDR1_MATCH 0x04000000
65 #define RXBUF_BROADCAST 0x80000000
67 #define TXBUF_FRMLEN_MASK 0x000007ff
68 #define TXBUF_FRAME_END 0x00008000
69 #define TXBUF_NOCRC 0x00010000
70 #define TXBUF_EXHAUSTED 0x08000000
71 #define TXBUF_UNDERRUN 0x10000000
72 #define TXBUF_MAXRETRY 0x20000000
73 #define TXBUF_WRAP 0x40000000
74 #define TXBUF_USED 0x80000000
85 struct macb_dma_desc *rx_ring;
86 struct macb_dma_desc *tx_ring;
88 unsigned long rx_buffer_dma;
89 unsigned long rx_ring_dma;
90 unsigned long tx_ring_dma;
92 const struct device *dev;
93 struct eth_device netdev;
94 unsigned short phy_addr;
97 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
99 static int macb_is_gem(struct macb_device *macb)
101 return MACB_BFEXT(IDNUM, macb_readl(macb, MID)) == 0x2;
104 static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
106 unsigned long netctl;
107 unsigned long netstat;
110 netctl = macb_readl(macb, NCR);
111 netctl |= MACB_BIT(MPE);
112 macb_writel(macb, NCR, netctl);
114 frame = (MACB_BF(SOF, 1)
116 | MACB_BF(PHYA, macb->phy_addr)
119 | MACB_BF(DATA, value));
120 macb_writel(macb, MAN, frame);
123 netstat = macb_readl(macb, NSR);
124 } while (!(netstat & MACB_BIT(IDLE)));
126 netctl = macb_readl(macb, NCR);
127 netctl &= ~MACB_BIT(MPE);
128 macb_writel(macb, NCR, netctl);
131 static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
133 unsigned long netctl;
134 unsigned long netstat;
137 netctl = macb_readl(macb, NCR);
138 netctl |= MACB_BIT(MPE);
139 macb_writel(macb, NCR, netctl);
141 frame = (MACB_BF(SOF, 1)
143 | MACB_BF(PHYA, macb->phy_addr)
146 macb_writel(macb, MAN, frame);
149 netstat = macb_readl(macb, NSR);
150 } while (!(netstat & MACB_BIT(IDLE)));
152 frame = macb_readl(macb, MAN);
154 netctl = macb_readl(macb, NCR);
155 netctl &= ~MACB_BIT(MPE);
156 macb_writel(macb, NCR, netctl);
158 return MACB_BFEXT(DATA, frame);
161 void __weak arch_get_mdio_control(const char *name)
166 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
168 int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
170 struct eth_device *dev = eth_get_dev_by_name(devname);
171 struct macb_device *macb = to_macb(dev);
173 if ( macb->phy_addr != phy_adr )
176 arch_get_mdio_control(devname);
177 *value = macb_mdio_read(macb, reg);
182 int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
184 struct eth_device *dev = eth_get_dev_by_name(devname);
185 struct macb_device *macb = to_macb(dev);
187 if ( macb->phy_addr != phy_adr )
190 arch_get_mdio_control(devname);
191 macb_mdio_write(macb, reg, value);
198 #if defined(CONFIG_CMD_NET)
200 static int macb_send(struct eth_device *netdev, void *packet, int length)
202 struct macb_device *macb = to_macb(netdev);
203 unsigned long paddr, ctrl;
204 unsigned int tx_head = macb->tx_head;
207 paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
209 ctrl = length & TXBUF_FRMLEN_MASK;
210 ctrl |= TXBUF_FRAME_END;
211 if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
217 macb->tx_ring[tx_head].ctrl = ctrl;
218 macb->tx_ring[tx_head].addr = paddr;
220 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
223 * I guess this is necessary because the networking core may
224 * re-use the transmit buffer as soon as we return...
226 for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
228 ctrl = macb->tx_ring[tx_head].ctrl;
229 if (ctrl & TXBUF_USED)
234 dma_unmap_single(packet, length, paddr);
236 if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
237 if (ctrl & TXBUF_UNDERRUN)
238 printf("%s: TX underrun\n", netdev->name);
239 if (ctrl & TXBUF_EXHAUSTED)
240 printf("%s: TX buffers exhausted in mid frame\n",
243 printf("%s: TX timeout\n", netdev->name);
246 /* No one cares anyway */
250 static void reclaim_rx_buffers(struct macb_device *macb,
251 unsigned int new_tail)
256 while (i > new_tail) {
257 macb->rx_ring[i].addr &= ~RXADDR_USED;
259 if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
263 while (i < new_tail) {
264 macb->rx_ring[i].addr &= ~RXADDR_USED;
269 macb->rx_tail = new_tail;
272 static int macb_recv(struct eth_device *netdev)
274 struct macb_device *macb = to_macb(netdev);
275 unsigned int rx_tail = macb->rx_tail;
282 if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
285 status = macb->rx_ring[rx_tail].ctrl;
286 if (status & RXBUF_FRAME_START) {
287 if (rx_tail != macb->rx_tail)
288 reclaim_rx_buffers(macb, rx_tail);
292 if (status & RXBUF_FRAME_END) {
293 buffer = macb->rx_buffer + 128 * macb->rx_tail;
294 length = status & RXBUF_FRMLEN_MASK;
296 unsigned int headlen, taillen;
298 headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
300 taillen = length - headlen;
301 memcpy((void *)NetRxPackets[0],
303 memcpy((void *)NetRxPackets[0] + headlen,
304 macb->rx_buffer, taillen);
305 buffer = (void *)NetRxPackets[0];
308 NetReceive(buffer, length);
309 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
311 reclaim_rx_buffers(macb, rx_tail);
313 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
324 static void macb_phy_reset(struct macb_device *macb)
326 struct eth_device *netdev = &macb->netdev;
330 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
331 macb_mdio_write(macb, MII_ADVERTISE, adv);
332 printf("%s: Starting autonegotiation...\n", netdev->name);
333 macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
336 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
337 status = macb_mdio_read(macb, MII_BMSR);
338 if (status & BMSR_ANEGCOMPLETE)
343 if (status & BMSR_ANEGCOMPLETE)
344 printf("%s: Autonegotiation complete\n", netdev->name);
346 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
347 netdev->name, status);
350 #ifdef CONFIG_MACB_SEARCH_PHY
351 static int macb_phy_find(struct macb_device *macb)
356 /* Search for PHY... */
357 for (i = 0; i < 32; i++) {
359 phy_id = macb_mdio_read(macb, MII_PHYSID1);
360 if (phy_id != 0xffff) {
361 printf("%s: PHY present at %d\n", macb->netdev.name, i);
366 /* PHY isn't up to snuff */
367 printf("%s: PHY not found\n", macb->netdev.name);
371 #endif /* CONFIG_MACB_SEARCH_PHY */
374 static int macb_phy_init(struct macb_device *macb)
376 struct eth_device *netdev = &macb->netdev;
378 struct phy_device *phydev;
381 u16 phy_id, status, adv, lpa;
382 int media, speed, duplex;
385 arch_get_mdio_control(netdev->name);
386 #ifdef CONFIG_MACB_SEARCH_PHY
387 /* Auto-detect phy_addr */
388 if (!macb_phy_find(macb)) {
391 #endif /* CONFIG_MACB_SEARCH_PHY */
393 /* Check if the PHY is up to snuff... */
394 phy_id = macb_mdio_read(macb, MII_PHYSID1);
395 if (phy_id == 0xffff) {
396 printf("%s: No PHY present\n", netdev->name);
401 /* need to consider other phy interface mode */
402 phydev = phy_connect(macb->bus, macb->phy_addr, netdev,
403 PHY_INTERFACE_MODE_RGMII);
405 printf("phy_connect failed\n");
412 status = macb_mdio_read(macb, MII_BMSR);
413 if (!(status & BMSR_LSTATUS)) {
414 /* Try to re-negotiate if we don't have link already. */
415 macb_phy_reset(macb);
417 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
418 status = macb_mdio_read(macb, MII_BMSR);
419 if (status & BMSR_LSTATUS)
425 if (!(status & BMSR_LSTATUS)) {
426 printf("%s: link down (status: 0x%04x)\n",
427 netdev->name, status);
431 /* First check for GMAC */
432 if (macb_is_gem(macb)) {
433 lpa = macb_mdio_read(macb, MII_STAT1000);
434 if (lpa & (1 << 11)) {
438 if (lpa & (1 << 10)) {
447 printf("%s: link up, %dMbps %s-duplex (lpa: 0x%04x)\n",
450 duplex ? "full" : "half",
453 ncfgr = macb_readl(macb, NCFGR);
454 ncfgr &= ~(GEM_BIT(GBE) | MACB_BIT(SPD) | MACB_BIT(FD));
456 ncfgr |= GEM_BIT(GBE);
458 ncfgr |= MACB_BIT(FD);
459 macb_writel(macb, NCFGR, ncfgr);
465 /* fall back for EMAC checking */
466 adv = macb_mdio_read(macb, MII_ADVERTISE);
467 lpa = macb_mdio_read(macb, MII_LPA);
468 media = mii_nway_result(lpa & adv);
469 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
471 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
472 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
474 speed ? "100" : "10",
475 duplex ? "full" : "half",
478 ncfgr = macb_readl(macb, NCFGR);
479 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
481 ncfgr |= MACB_BIT(SPD);
483 ncfgr |= MACB_BIT(FD);
484 macb_writel(macb, NCFGR, ncfgr);
489 static int macb_init(struct eth_device *netdev, bd_t *bd)
491 struct macb_device *macb = to_macb(netdev);
496 * macb_halt should have been called at some point before now,
497 * so we'll assume the controller is idle.
500 /* initialize DMA descriptors */
501 paddr = macb->rx_buffer_dma;
502 for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
503 if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
504 paddr |= RXADDR_WRAP;
505 macb->rx_ring[i].addr = paddr;
506 macb->rx_ring[i].ctrl = 0;
509 for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
510 macb->tx_ring[i].addr = 0;
511 if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
512 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
514 macb->tx_ring[i].ctrl = TXBUF_USED;
516 macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
518 macb_writel(macb, RBQP, macb->rx_ring_dma);
519 macb_writel(macb, TBQP, macb->tx_ring_dma);
521 if (macb_is_gem(macb)) {
523 gem_writel(macb, UR, GEM_BIT(RGMII));
525 gem_writel(macb, UR, 0);
528 /* choose RMII or MII mode. This depends on the board */
530 #ifdef CONFIG_AT91FAMILY
531 macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
533 macb_writel(macb, USRIO, 0);
536 #ifdef CONFIG_AT91FAMILY
537 macb_writel(macb, USRIO, MACB_BIT(CLKEN));
539 macb_writel(macb, USRIO, MACB_BIT(MII));
541 #endif /* CONFIG_RMII */
544 if (!macb_phy_init(macb))
547 /* Enable TX and RX */
548 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
553 static void macb_halt(struct eth_device *netdev)
555 struct macb_device *macb = to_macb(netdev);
558 /* Halt the controller and wait for any ongoing transmission to end. */
559 ncr = macb_readl(macb, NCR);
560 ncr |= MACB_BIT(THALT);
561 macb_writel(macb, NCR, ncr);
564 tsr = macb_readl(macb, TSR);
565 } while (tsr & MACB_BIT(TGO));
567 /* Disable TX and RX, and clear statistics */
568 macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
571 static int macb_write_hwaddr(struct eth_device *dev)
573 struct macb_device *macb = to_macb(dev);
577 /* set hardware address */
578 hwaddr_bottom = dev->enetaddr[0] | dev->enetaddr[1] << 8 |
579 dev->enetaddr[2] << 16 | dev->enetaddr[3] << 24;
580 macb_writel(macb, SA1B, hwaddr_bottom);
581 hwaddr_top = dev->enetaddr[4] | dev->enetaddr[5] << 8;
582 macb_writel(macb, SA1T, hwaddr_top);
586 static u32 macb_mdc_clk_div(int id, struct macb_device *macb)
589 unsigned long macb_hz = get_macb_pclk_rate(id);
591 if (macb_hz < 20000000)
592 config = MACB_BF(CLK, MACB_CLK_DIV8);
593 else if (macb_hz < 40000000)
594 config = MACB_BF(CLK, MACB_CLK_DIV16);
595 else if (macb_hz < 80000000)
596 config = MACB_BF(CLK, MACB_CLK_DIV32);
598 config = MACB_BF(CLK, MACB_CLK_DIV64);
603 static u32 gem_mdc_clk_div(int id, struct macb_device *macb)
606 unsigned long macb_hz = get_macb_pclk_rate(id);
608 if (macb_hz < 20000000)
609 config = GEM_BF(CLK, GEM_CLK_DIV8);
610 else if (macb_hz < 40000000)
611 config = GEM_BF(CLK, GEM_CLK_DIV16);
612 else if (macb_hz < 80000000)
613 config = GEM_BF(CLK, GEM_CLK_DIV32);
614 else if (macb_hz < 120000000)
615 config = GEM_BF(CLK, GEM_CLK_DIV48);
616 else if (macb_hz < 160000000)
617 config = GEM_BF(CLK, GEM_CLK_DIV64);
619 config = GEM_BF(CLK, GEM_CLK_DIV96);
625 * Get the DMA bus width field of the network configuration register that we
626 * should program. We find the width from decoding the design configuration
627 * register to find the maximum supported data bus width.
629 static u32 macb_dbw(struct macb_device *macb)
631 switch (GEM_BFEXT(DBWDEF, gem_readl(macb, DCFG1))) {
633 return GEM_BF(DBW, GEM_DBW128);
635 return GEM_BF(DBW, GEM_DBW64);
638 return GEM_BF(DBW, GEM_DBW32);
642 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
644 struct macb_device *macb;
645 struct eth_device *netdev;
648 macb = malloc(sizeof(struct macb_device));
650 printf("Error: Failed to allocate memory for MACB%d\n", id);
653 memset(macb, 0, sizeof(struct macb_device));
655 netdev = &macb->netdev;
657 macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
658 &macb->rx_buffer_dma);
659 macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
660 * sizeof(struct macb_dma_desc),
662 macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
663 * sizeof(struct macb_dma_desc),
667 macb->phy_addr = phy_addr;
669 if (macb_is_gem(macb))
670 sprintf(netdev->name, "gmac%d", id);
672 sprintf(netdev->name, "macb%d", id);
674 netdev->init = macb_init;
675 netdev->halt = macb_halt;
676 netdev->send = macb_send;
677 netdev->recv = macb_recv;
678 netdev->write_hwaddr = macb_write_hwaddr;
681 * Do some basic initialization so that we at least can talk
684 if (macb_is_gem(macb)) {
685 ncfgr = gem_mdc_clk_div(id, macb);
686 ncfgr |= macb_dbw(macb);
688 ncfgr = macb_mdc_clk_div(id, macb);
691 macb_writel(macb, NCFGR, ncfgr);
693 eth_register(netdev);
695 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
696 miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
697 macb->bus = miiphy_get_dev_by_name(netdev->name);