4 * SPDX-License-Identifier: GPL-2.0+
8 #include <fsl-mc/ldpaa_wriop.h>
10 #include <asm/arch/fsl_serdes.h>
11 #include <asm/arch/soc.h>
13 u32 dpmac_to_devdisr[] = {
14 [WRIOP1_DPMAC1] = FSL_CHASSIS3_DEVDISR2_DPMAC1,
15 [WRIOP1_DPMAC2] = FSL_CHASSIS3_DEVDISR2_DPMAC2,
16 [WRIOP1_DPMAC3] = FSL_CHASSIS3_DEVDISR2_DPMAC3,
17 [WRIOP1_DPMAC4] = FSL_CHASSIS3_DEVDISR2_DPMAC4,
18 [WRIOP1_DPMAC5] = FSL_CHASSIS3_DEVDISR2_DPMAC5,
19 [WRIOP1_DPMAC6] = FSL_CHASSIS3_DEVDISR2_DPMAC6,
20 [WRIOP1_DPMAC7] = FSL_CHASSIS3_DEVDISR2_DPMAC7,
21 [WRIOP1_DPMAC8] = FSL_CHASSIS3_DEVDISR2_DPMAC8,
22 [WRIOP1_DPMAC9] = FSL_CHASSIS3_DEVDISR2_DPMAC9,
23 [WRIOP1_DPMAC10] = FSL_CHASSIS3_DEVDISR2_DPMAC10,
26 static int is_device_disabled(int dpmac_id)
28 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
29 u32 devdisr2 = in_le32(&gur->devdisr2);
31 return dpmac_to_devdisr[dpmac_id] & devdisr2;
34 void wriop_dpmac_disable(int dpmac_id)
36 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
38 setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
41 void wriop_dpmac_enable(int dpmac_id)
43 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
45 clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]);
48 phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
52 if (is_device_disabled(dpmac_id + 1))
53 return PHY_INTERFACE_MODE_NONE;
60 return PHY_INTERFACE_MODE_SGMII;
63 if (lane_prtcl >= XFI1 && lane_prtcl <= XFI2)
64 return PHY_INTERFACE_MODE_XGMII;
66 if (lane_prtcl >= QSGMII_A && lane_prtcl <= QSGMII_B)
67 return PHY_INTERFACE_MODE_QSGMII;
69 return PHY_INTERFACE_MODE_NONE;
72 void wriop_init_dpmac_qsgmii(int sd, int lane_prtcl)
76 wriop_init_dpmac(sd, 3, (int)lane_prtcl);
77 wriop_init_dpmac(sd, 4, (int)lane_prtcl);
78 wriop_init_dpmac(sd, 5, (int)lane_prtcl);
79 wriop_init_dpmac(sd, 6, (int)lane_prtcl);
82 wriop_init_dpmac(sd, 7, (int)lane_prtcl);
83 wriop_init_dpmac(sd, 8, (int)lane_prtcl);
84 wriop_init_dpmac(sd, 9, (int)lane_prtcl);
85 wriop_init_dpmac(sd, 10, (int)lane_prtcl);
90 #ifdef CONFIG_SYS_FSL_HAS_RGMII
91 void fsl_rgmii_init(void)
93 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
96 #ifdef CONFIG_SYS_FSL_EC1
97 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1])
98 & FSL_CHASSIS3_RCWSR25_EC1_PRTCL_MASK;
99 ec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;
102 wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII_ID);
105 #ifdef CONFIG_SYS_FSL_EC2
106 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1])
107 & FSL_CHASSIS3_RCWSR25_EC2_PRTCL_MASK;
108 ec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;
111 wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII_ID);