2 * Copyright (C) 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <fdt_support.h>
13 #include <fsl-mc/fsl_mc.h>
14 #include <fsl-mc/fsl_mc_sys.h>
15 #include <fsl-mc/fsl_mc_private.h>
16 #include <fsl-mc/fsl_dpmng.h>
17 #include <fsl-mc/fsl_dprc.h>
18 #include <fsl-mc/fsl_dpio.h>
19 #include <fsl-mc/fsl_dpni.h>
20 #include <fsl-mc/fsl_qbman_portal.h>
21 #include <fsl-mc/ldpaa_wriop.h>
23 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
24 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
25 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
27 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
28 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
30 DECLARE_GLOBAL_DATA_PTR;
31 static int mc_boot_status = -1;
32 static int mc_dpl_applied = -1;
33 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
34 static int mc_aiop_applied = -1;
36 struct fsl_mc_io *root_mc_io = NULL;
37 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
38 uint16_t root_dprc_handle = 0;
39 uint16_t dflt_dprc_handle = 0;
41 struct fsl_dpbp_obj *dflt_dpbp = NULL;
42 struct fsl_dpio_obj *dflt_dpio = NULL;
43 struct fsl_dpni_obj *dflt_dpni = NULL;
44 static u64 mc_lazy_dpl_addr;
47 void dump_ram_words(const char *title, void *addr)
50 uint32_t *words = addr;
52 printf("Dumping beginning of %s (%p):\n", title, addr);
53 for (i = 0; i < 16; i++)
54 printf("%#x ", words[i]);
59 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
61 printf("MC CCSR registers:\n"
71 mc_ccsr_regs->reg_gcr1,
72 mc_ccsr_regs->reg_gsr,
73 mc_ccsr_regs->reg_sicbalr,
74 mc_ccsr_regs->reg_sicbahr,
75 mc_ccsr_regs->reg_sicapr,
76 mc_ccsr_regs->reg_mcfbalr,
77 mc_ccsr_regs->reg_mcfbahr,
78 mc_ccsr_regs->reg_mcfapr,
79 mc_ccsr_regs->reg_psr);
83 #define dump_ram_words(title, addr)
84 #define dump_mc_ccsr_regs(mc_ccsr_regs)
88 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
90 * Copying MC firmware or DPL image to DDR
92 static int mc_copy_image(const char *title,
93 u64 image_addr, u32 image_size, u64 mc_ram_addr)
95 debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
96 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
97 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
102 * MC firmware FIT image parser checks if the image is in FIT
103 * format, verifies integrity of the image and calculates
104 * raw image address and size values.
105 * Returns 0 on success and a negative errno on error.
108 int parse_mc_firmware_fit_image(u64 mc_fw_addr,
109 const void **raw_image_addr,
110 size_t *raw_image_size)
117 const char *uname = "firmware";
119 fit_hdr = (void *)mc_fw_addr;
121 /* Check if Image is in FIT format */
122 format = genimg_get_format(fit_hdr);
124 if (format != IMAGE_FORMAT_FIT) {
125 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
129 if (!fit_check_format(fit_hdr)) {
130 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
134 node_offset = fit_image_get_node(fit_hdr, uname);
136 if (node_offset < 0) {
137 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
141 /* Verify MC firmware image */
142 if (!(fit_image_verify(fit_hdr, node_offset))) {
143 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
147 /* Get address and size of raw image */
148 fit_image_get_data(fit_hdr, node_offset, &data, &size);
150 *raw_image_addr = data;
151 *raw_image_size = size;
158 * Calculates the values to be used to specify the address range
159 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
160 * It returns the highest 512MB-aligned address within the given
161 * address range, in '*aligned_base_addr', and the number of 256 MiB
162 * blocks in it, in 'num_256mb_blocks'.
164 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
166 u64 *aligned_base_addr,
167 u8 *num_256mb_blocks)
172 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
173 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
178 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
179 if (num_blocks < 1 || num_blocks > 0xff) {
180 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
185 addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
186 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
188 if (addr < mc_private_ram_start_addr) {
189 printf("fsl-mc: ERROR: bad start address %#llx\n",
190 mc_private_ram_start_addr);
194 *aligned_base_addr = addr;
195 *num_256mb_blocks = num_blocks;
199 static int mc_fixup_dpc_mac_addr(void *blob, int noff, int dpmac_id,
200 struct eth_device *eth_dev)
202 int nodeoffset, err = 0;
204 const char link_type_mode[] = "FIXED_LINK";
205 unsigned char env_enetaddr[6];
207 sprintf(mac_name, "mac@%d", dpmac_id);
209 /* node not found - create it */
210 nodeoffset = fdt_subnode_offset(blob, noff, (const char *) mac_name);
211 if (nodeoffset < 0) {
212 err = fdt_increase_size(blob, 200);
214 printf("fdt_increase_size: err=%s\n",
219 nodeoffset = fdt_add_subnode(blob, noff, mac_name);
221 /* add default property of fixed link */
222 err = fdt_appendprop_string(blob, nodeoffset,
223 "link_type", link_type_mode);
225 printf("fdt_appendprop_string: err=%s\n",
231 /* port_mac_address property present in DPC */
232 if (fdt_get_property(blob, nodeoffset, "port_mac_address", NULL)) {
233 /* MAC addr randomly assigned - leave the one in DPC */
234 eth_getenv_enetaddr_by_index("eth", eth_dev->index,
236 if (is_zero_ethaddr(env_enetaddr))
239 /* replace DPC MAC address with u-boot env one */
240 err = fdt_setprop(blob, nodeoffset, "port_mac_address",
241 eth_dev->enetaddr, 6);
243 printf("fdt_setprop mac: err=%s\n", fdt_strerror(err));
250 /* append port_mac_address property to mac node in DPC */
251 err = fdt_increase_size(blob, 80);
253 printf("fdt_increase_size: err=%s\n", fdt_strerror(err));
257 err = fdt_appendprop(blob, nodeoffset,
258 "port_mac_address", eth_dev->enetaddr, 6);
260 printf("fdt_appendprop: err=%s\n", fdt_strerror(err));
267 static int mc_fixup_dpc(u64 dpc_addr)
269 void *blob = (void *)dpc_addr;
270 int nodeoffset, err = 0;
272 struct eth_device *eth_dev;
275 /* delete any existing ICID pools */
276 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
277 if (fdt_del_node(blob, nodeoffset) < 0)
278 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
281 nodeoffset = fdt_path_offset(blob, "/resources");
282 if (nodeoffset < 0) {
283 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
286 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
287 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
288 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
289 "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
290 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
292 FSL_DPAA2_STREAM_ID_END -
293 FSL_DPAA2_STREAM_ID_START + 1, 1);
295 /* fixup MAC addresses for dpmac ports */
296 nodeoffset = fdt_path_offset(blob, "/board_info/ports");
300 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
301 /* port not enabled */
302 if ((wriop_is_enabled_dpmac(i) != 1) ||
303 (wriop_get_phy_address(i) == -1))
306 sprintf(ethname, "DPMAC%d@%s", i,
307 phy_interface_strings[wriop_get_enet_if(i)]);
309 eth_dev = eth_get_dev_by_name(ethname);
313 err = mc_fixup_dpc_mac_addr(blob, nodeoffset, i, eth_dev);
315 printf("mc_fixup_dpc_mac_addr failed: err=%s\n",
322 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
327 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
330 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
336 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
337 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
338 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
340 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
342 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
346 * Load the MC DPC blob in the MC private DRAM block:
348 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
349 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
352 * Get address and size of the DPC blob stored in flash:
354 dpc_fdt_hdr = (void *)mc_dpc_addr;
356 error = fdt_check_header(dpc_fdt_hdr);
359 * Don't return with error here, since the MC firmware can
360 * still boot without a DPC
362 printf("\nfsl-mc: WARNING: No DPC image found");
366 dpc_size = fdt_totalsize(dpc_fdt_hdr);
367 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
368 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
373 mc_copy_image("MC DPC blob",
374 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
375 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
377 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
380 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
384 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
387 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
393 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
394 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
395 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
397 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
399 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
403 * Load the MC DPL blob in the MC private DRAM block:
405 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
406 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
409 * Get address and size of the DPL blob stored in flash:
411 dpl_fdt_hdr = (void *)mc_dpl_addr;
413 error = fdt_check_header(dpl_fdt_hdr);
415 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
419 dpl_size = fdt_totalsize(dpl_fdt_hdr);
420 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
421 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
426 mc_copy_image("MC DPL blob",
427 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
428 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
430 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
435 * Return the MC boot timeout value in milliseconds
437 static unsigned long get_mc_boot_timeout_ms(void)
439 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
441 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
443 if (timeout_ms_env_var) {
444 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
445 if (timeout_ms == 0) {
446 printf("fsl-mc: WARNING: Invalid value for \'"
447 MC_BOOT_TIMEOUT_ENV_VAR
448 "\' environment variable: %lu\n",
451 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
458 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
460 __weak bool soc_has_aiop(void)
465 static int load_mc_aiop_img(u64 aiop_fw_addr)
467 u64 mc_ram_addr = mc_get_dram_addr();
468 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
472 /* Check if AIOP is available */
476 * Load the MC AIOP image in the MC private DRAM block:
479 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
480 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
481 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
483 aiop_img = (void *)aiop_fw_addr;
484 mc_copy_image("MC AIOP image",
485 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
486 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
494 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
497 u32 mc_fw_boot_status;
498 unsigned long timeout_ms = get_mc_boot_timeout_ms();
499 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
502 assert(timeout_ms > 0);
504 udelay(1000); /* throttle polling */
505 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
506 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
507 if (mc_fw_boot_status & 0x1)
515 if (timeout_ms == 0) {
516 printf("ERROR: timeout\n");
518 /* TODO: Get an error status from an MC CCSR register */
522 if (mc_fw_boot_status != 0x1) {
524 * TODO: Identify critical errors from the GSR register's FS
525 * field and for those errors, set error to -ENODEV or other
526 * appropriate errno, so that the status property is set to
527 * failure in the fsl,dprc device tree node.
529 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
536 *final_reg_gsr = reg_gsr;
540 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
544 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
545 u64 mc_ram_addr = mc_get_dram_addr();
548 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
549 const void *raw_image_addr;
550 size_t raw_image_size = 0;
552 struct mc_version mc_ver_info;
553 u64 mc_ram_aligned_base_addr;
554 u8 mc_ram_num_256mb_blocks;
555 size_t mc_ram_size = mc_get_dram_block_size();
558 error = calculate_mc_private_ram_params(mc_ram_addr,
560 &mc_ram_aligned_base_addr,
561 &mc_ram_num_256mb_blocks);
566 * Management Complex cores should be held at reset out of POR.
567 * U-Boot should be the first software to touch MC. To be safe,
568 * we reset all cores again by setting GCR1 to 0. It doesn't do
569 * anything if they are held at reset. After we setup the firmware
570 * we kick off MC by deasserting the reset bit for core 0, and
571 * deasserting the reset bits for Command Portal Managers.
572 * The stop bits are not touched here. They are used to stop the
573 * cores when they are active. Setting stop bits doesn't stop the
574 * cores from fetching instructions when they are released from
577 out_le32(&mc_ccsr_regs->reg_gcr1, 0);
580 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
581 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
583 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
588 * Load the MC FW at the beginning of the MC private DRAM block:
590 mc_copy_image("MC Firmware",
591 (u64)raw_image_addr, raw_image_size, mc_ram_addr);
593 dump_ram_words("firmware", (void *)mc_ram_addr);
595 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
599 debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
600 dump_mc_ccsr_regs(mc_ccsr_regs);
603 * Tell MC what is the address range of the DRAM block assigned to it:
605 reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
606 (mc_ram_num_256mb_blocks - 1);
607 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
608 out_le32(&mc_ccsr_regs->reg_mcfbahr,
609 (u32)(mc_ram_aligned_base_addr >> 32));
610 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
613 * Tell the MC that we want delayed DPL deployment.
615 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
617 printf("\nfsl-mc: Booting Management Complex ... ");
620 * Deassert reset and release MC core 0 to run
622 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
623 error = wait_for_mc(true, ®_gsr);
628 * TODO: need to obtain the portal_id for the root container from the
634 * Initialize the global default MC portal
635 * And check that the MC firmware is responding portal commands:
637 root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
639 printf(" No memory: malloc() failed\n");
643 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
644 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
645 portal_id, root_mc_io->mmio_regs);
647 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
649 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
654 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
655 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
656 reg_gsr & GSR_FS_MASK);
660 mc_boot_status = error;
667 int mc_apply_dpl(u64 mc_dpl_addr)
669 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
672 u64 mc_ram_addr = mc_get_dram_addr();
673 size_t mc_ram_size = mc_get_dram_block_size();
678 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
683 * Tell the MC to deploy the DPL:
685 out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
686 printf("fsl-mc: Deploying data path layout ... ");
687 error = wait_for_mc(false, ®_gsr);
695 int get_mc_boot_status(void)
697 return mc_boot_status;
700 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
701 int get_aiop_apply_status(void)
703 return mc_aiop_applied;
707 int get_dpl_apply_status(void)
709 return mc_dpl_applied;
713 * Return the MC address of private DRAM block.
715 u64 mc_get_dram_addr(void)
720 * The MC private DRAM block was already carved at the end of DRAM
721 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
723 if (gd->bd->bi_dram[1].start) {
725 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
728 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
735 * Return the actual size of the MC private DRAM block.
737 unsigned long mc_get_dram_block_size(void)
739 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
741 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
743 if (dram_block_size_env_var) {
744 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
747 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
748 printf("fsl-mc: WARNING: Invalid value for \'"
750 "\' environment variable: %lu\n",
753 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
757 return dram_block_size;
760 int fsl_mc_ldpaa_init(bd_t *bis)
764 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
765 if ((wriop_is_enabled_dpmac(i) == 1) &&
766 (wriop_get_phy_address(i) != -1))
767 ldpaa_eth_init(i, wriop_get_enet_if(i));
771 static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
773 struct dprc_attributes attr;
776 memset(&attr, 0, sizeof(struct dprc_attributes));
777 error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr);
779 if ((attr.version.major != DPRC_VER_MAJOR) ||
780 (attr.version.minor != DPRC_VER_MINOR)) {
781 printf("DPRC version mismatch found %u.%u,",
784 printf("supported version is %u.%u\n",
785 DPRC_VER_MAJOR, DPRC_VER_MINOR);
791 static int dpio_init(void)
793 struct qbman_swp_desc p_des;
794 struct dpio_attr attr;
795 struct dpio_cfg dpio_cfg;
798 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
800 printf("No memory: malloc() failed\n");
805 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
806 dpio_cfg.num_priorities = 8;
808 err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
809 &dflt_dpio->dpio_handle);
811 printf("dpio_create() failed: %d\n", err);
816 memset(&attr, 0, sizeof(struct dpio_attr));
817 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
818 dflt_dpio->dpio_handle, &attr);
820 printf("dpio_get_attributes() failed: %d\n", err);
824 if ((attr.version.major != DPIO_VER_MAJOR) ||
825 (attr.version.minor != DPIO_VER_MINOR)) {
826 printf("DPIO version mismatch found %u.%u,",
827 attr.version.major, attr.version.minor);
828 printf("supported version is %u.%u\n",
829 DPIO_VER_MAJOR, DPIO_VER_MINOR);
832 dflt_dpio->dpio_id = attr.id;
834 printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
836 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
838 printf("dpio_enable() failed %d\n", err);
841 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
842 attr.qbman_portal_ce_offset,
843 attr.qbman_portal_ci_offset,
844 attr.qbman_portal_id,
845 attr.num_priorities);
847 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
848 + attr.qbman_portal_ce_offset);
849 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
850 + attr.qbman_portal_ci_offset);
852 dflt_dpio->sw_portal = qbman_swp_init(&p_des);
853 if (dflt_dpio->sw_portal == NULL) {
854 printf("qbman_swp_init() failed\n");
855 goto err_get_swp_init;
860 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
863 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
864 dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
871 static int dpio_exit(void)
875 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
877 printf("dpio_disable() failed: %d\n", err);
881 err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
883 printf("dpio_destroy() failed: %d\n", err);
888 printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
899 static int dprc_init(void)
901 int err, child_portal_id, container_id;
903 uint64_t mc_portal_offset;
905 /* Open root container */
906 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
908 printf("dprc_get_container_id(): Root failed: %d\n", err);
909 goto err_root_container_id;
913 printf("Root container id = %d\n", container_id);
915 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
918 printf("dprc_open(): Root Container failed: %d\n", err);
922 if (!root_dprc_handle) {
923 printf("dprc_open(): Root Container Handle is not valid\n");
927 err = dprc_version_check(root_mc_io, root_dprc_handle);
929 printf("dprc_version_check() failed: %d\n", err);
933 memset(&cfg, 0, sizeof(struct dprc_cfg));
934 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
935 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
936 DPRC_CFG_OPT_ALLOC_ALLOWED;
937 cfg.icid = DPRC_GET_ICID_FROM_POOL;
938 cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
939 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
945 printf("dprc_create_container() failed: %d\n", err);
949 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
952 printf(" No memory: malloc() failed\n");
956 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
957 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
959 printf("MC portal of child DPRC container: %d, physical addr %p)\n",
960 child_dprc_id, dflt_mc_io->mmio_regs);
963 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
966 printf("dprc_open(): Child container failed: %d\n", err);
970 if (!dflt_dprc_handle) {
971 printf("dprc_open(): Child container Handle is not valid\n");
979 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
980 root_dprc_handle, child_dprc_id);
982 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
984 err_root_container_id:
988 static int dprc_exit(void)
992 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
994 printf("dprc_close(): Child failed: %d\n", err);
998 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
999 root_dprc_handle, child_dprc_id);
1001 printf("dprc_destroy_container() failed: %d\n", err);
1005 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1007 printf("dprc_close(): Root failed: %d\n", err);
1023 static int dpbp_init(void)
1026 struct dpbp_attr dpbp_attr;
1027 struct dpbp_cfg dpbp_cfg;
1029 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
1031 printf("No memory: malloc() failed\n");
1036 dpbp_cfg.options = 512;
1038 err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
1039 &dflt_dpbp->dpbp_handle);
1043 printf("dpbp_create() failed: %d\n", err);
1047 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
1048 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1049 dflt_dpbp->dpbp_handle,
1052 printf("dpbp_get_attributes() failed: %d\n", err);
1056 if ((dpbp_attr.version.major != DPBP_VER_MAJOR) ||
1057 (dpbp_attr.version.minor != DPBP_VER_MINOR)) {
1058 printf("DPBP version mismatch found %u.%u,",
1059 dpbp_attr.version.major, dpbp_attr.version.minor);
1060 printf("supported version is %u.%u\n",
1061 DPBP_VER_MAJOR, DPBP_VER_MINOR);
1064 dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
1066 printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
1069 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1071 printf("dpbp_close() failed: %d\n", err);
1080 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1081 dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1087 static int dpbp_exit(void)
1091 err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
1092 &dflt_dpbp->dpbp_handle);
1094 printf("dpbp_open() failed: %d\n", err);
1098 err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
1099 dflt_dpbp->dpbp_handle);
1101 printf("dpbp_destroy() failed: %d\n", err);
1106 printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
1117 static int dpni_init(void)
1120 struct dpni_attr dpni_attr;
1121 uint8_t ext_cfg_buf[256] = {0};
1122 struct dpni_extended_cfg dpni_extended_cfg;
1123 struct dpni_cfg dpni_cfg;
1125 dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
1127 printf("No memory: malloc() failed\n");
1132 memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
1133 err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]);
1136 printf("dpni_prepare_extended_cfg() failed: %d\n", err);
1137 goto err_prepare_extended_cfg;
1140 memset(&dpni_cfg, 0, sizeof(dpni_cfg));
1141 dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
1142 DPNI_OPT_MULTICAST_FILTER;
1144 dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0];
1145 err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
1146 &dflt_dpni->dpni_handle);
1150 printf("dpni_create() failed: %d\n", err);
1154 memset(&dpni_attr, 0, sizeof(struct dpni_attr));
1155 err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1156 dflt_dpni->dpni_handle,
1159 printf("dpni_get_attributes() failed: %d\n", err);
1163 if ((dpni_attr.version.major != DPNI_VER_MAJOR) ||
1164 (dpni_attr.version.minor != DPNI_VER_MINOR)) {
1165 printf("DPNI version mismatch found %u.%u,",
1166 dpni_attr.version.major, dpni_attr.version.minor);
1167 printf("supported version is %u.%u\n",
1168 DPNI_VER_MAJOR, DPNI_VER_MINOR);
1171 dflt_dpni->dpni_id = dpni_attr.id;
1173 printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1176 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1178 printf("dpni_close() failed: %d\n", err);
1186 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1187 dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1189 err_prepare_extended_cfg:
1195 static int dpni_exit(void)
1199 err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
1200 &dflt_dpni->dpni_handle);
1202 printf("dpni_open() failed: %d\n", err);
1206 err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
1207 dflt_dpni->dpni_handle);
1209 printf("dpni_destroy() failed: %d\n", err);
1214 printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
1225 static int mc_init_object(void)
1231 printf("dprc_init() failed: %d\n", err);
1237 printf("dpbp_init() failed: %d\n", err);
1243 printf("dpio_init() failed: %d\n", err);
1249 printf("dpni_init() failed: %d\n", err);
1258 int fsl_mc_ldpaa_exit(bd_t *bd)
1262 if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
1263 mc_apply_dpl(mc_lazy_dpl_addr);
1264 mc_lazy_dpl_addr = 0;
1267 /* MC is not loaded intentionally, So return success. */
1268 if (bd && get_mc_boot_status() != 0)
1271 if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
1272 printf("ERROR: fsl-mc: DPL is not applied\n");
1277 if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
1282 printf("dpbp_exit() failed: %d\n", err);
1288 printf("dpio_exit() failed: %d\n", err);
1294 printf("dpni_exit() failed: %d\n", err);
1300 printf("dprc_exit() failed: %d\n", err);
1309 static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
1315 switch (argv[1][0]) {
1318 u64 mc_fw_addr, mc_dpc_addr;
1319 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1323 sub_cmd = argv[2][0];
1329 if (get_mc_boot_status() == 0) {
1330 printf("fsl-mc: MC is already booted");
1334 mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
1335 mc_dpc_addr = simple_strtoull(argv[4], NULL,
1338 if (!mc_init(mc_fw_addr, mc_dpc_addr))
1339 err = mc_init_object();
1342 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1346 if (get_aiop_apply_status() == 0) {
1347 printf("fsl-mc: AIOP FW is already");
1348 printf(" applied\n");
1352 aiop_fw_addr = simple_strtoull(argv[3], NULL,
1355 /* if SoC doesn't have AIOP, err = -ENODEV */
1356 err = load_mc_aiop_img(aiop_fw_addr);
1358 printf("fsl-mc: AIOP FW applied\n");
1362 printf("Invalid option: %s\n", argv[2]);
1377 if (get_dpl_apply_status() == 0) {
1378 printf("fsl-mc: DPL already applied\n");
1382 mc_dpl_addr = simple_strtoull(argv[3], NULL,
1385 if (get_mc_boot_status() != 0) {
1386 printf("fsl-mc: Deploying data path layout ..");
1387 printf("ERROR (MC is not booted)\n");
1391 if (argv[1][0] == 'l') {
1393 * We will do the actual dpaa exit and dpl apply
1394 * later from announce_and_cleanup().
1396 mc_lazy_dpl_addr = mc_dpl_addr;
1398 /* The user wants it applied now */
1399 if (!fsl_mc_ldpaa_exit(NULL))
1400 err = mc_apply_dpl(mc_dpl_addr);
1405 printf("Invalid option: %s\n", argv[1]);
1411 return CMD_RET_USAGE;
1415 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
1416 "DPAA2 command to manage Management Complex (MC)",
1417 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
1418 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
1419 "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
1420 "fsl_mc start aiop [FW_addr] - Start AIOP\n"