2 * Copyright (C) 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <fdt_support.h>
11 #include <fsl-mc/fsl_mc.h>
12 #include <fsl-mc/fsl_mc_sys.h>
13 #include <fsl-mc/fsl_mc_private.h>
14 #include <fsl-mc/fsl_dpmng.h>
15 #include <fsl-mc/fsl_dprc.h>
16 #include <fsl-mc/fsl_dpio.h>
17 #include <fsl-mc/fsl_qbman_portal.h>
19 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
20 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
21 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
23 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
24 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
26 DECLARE_GLOBAL_DATA_PTR;
27 static int mc_boot_status;
28 struct fsl_mc_io *dflt_mc_io = NULL;
29 uint16_t dflt_dprc_handle = 0;
30 struct fsl_dpbp_obj *dflt_dpbp = NULL;
31 struct fsl_dpio_obj *dflt_dpio = NULL;
32 uint16_t dflt_dpio_handle = 0;
35 void dump_ram_words(const char *title, void *addr)
38 uint32_t *words = addr;
40 printf("Dumping beginning of %s (%p):\n", title, addr);
41 for (i = 0; i < 16; i++)
42 printf("%#x ", words[i]);
47 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
49 printf("MC CCSR registers:\n"
59 mc_ccsr_regs->reg_gcr1,
60 mc_ccsr_regs->reg_gsr,
61 mc_ccsr_regs->reg_sicbalr,
62 mc_ccsr_regs->reg_sicbahr,
63 mc_ccsr_regs->reg_sicapr,
64 mc_ccsr_regs->reg_mcfbalr,
65 mc_ccsr_regs->reg_mcfbahr,
66 mc_ccsr_regs->reg_mcfapr,
67 mc_ccsr_regs->reg_psr);
71 #define dump_ram_words(title, addr)
72 #define dump_mc_ccsr_regs(mc_ccsr_regs)
76 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
78 * Copying MC firmware or DPL image to DDR
80 static int mc_copy_image(const char *title,
81 u64 image_addr, u32 image_size, u64 mc_ram_addr)
83 debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
84 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
85 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
90 * MC firmware FIT image parser checks if the image is in FIT
91 * format, verifies integrity of the image and calculates
92 * raw image address and size values.
93 * Returns 0 on success and a negative errno on error.
96 int parse_mc_firmware_fit_image(const void **raw_image_addr,
97 size_t *raw_image_size)
104 const char *uname = "firmware";
106 /* Check if the image is in NOR flash */
107 #ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
108 fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
110 #error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
113 /* Check if Image is in FIT format */
114 format = genimg_get_format(fit_hdr);
116 if (format != IMAGE_FORMAT_FIT) {
117 printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n");
121 if (!fit_check_format(fit_hdr)) {
122 printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n");
126 node_offset = fit_image_get_node(fit_hdr, uname);
128 if (node_offset < 0) {
129 printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n");
133 /* Verify MC firmware image */
134 if (!(fit_image_verify(fit_hdr, node_offset))) {
135 printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n");
139 /* Get address and size of raw image */
140 fit_image_get_data(fit_hdr, node_offset, &data, &size);
142 *raw_image_addr = data;
143 *raw_image_size = size;
150 * Calculates the values to be used to specify the address range
151 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
152 * It returns the highest 512MB-aligned address within the given
153 * address range, in '*aligned_base_addr', and the number of 256 MiB
154 * blocks in it, in 'num_256mb_blocks'.
156 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
158 u64 *aligned_base_addr,
159 u8 *num_256mb_blocks)
164 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
165 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
170 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
171 if (num_blocks < 1 || num_blocks > 0xff) {
172 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
177 addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
178 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
180 if (addr < mc_private_ram_start_addr) {
181 printf("fsl-mc: ERROR: bad start address %#llx\n",
182 mc_private_ram_start_addr);
186 *aligned_base_addr = addr;
187 *num_256mb_blocks = num_blocks;
191 static int mc_fixup_dpc(u64 dpc_addr)
193 void *blob = (void *)dpc_addr;
196 /* delete any existing ICID pools */
197 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
198 if (fdt_del_node(blob, nodeoffset) < 0)
199 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
202 nodeoffset = fdt_path_offset(blob, "/resources");
203 if (nodeoffset < 0) {
204 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
207 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
208 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
209 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
210 "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
211 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
213 FSL_DPAA2_STREAM_ID_END -
214 FSL_DPAA2_STREAM_ID_START + 1, 1);
216 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
221 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size)
224 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
230 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
231 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
232 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
234 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
236 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
240 * Load the MC DPC blob in the MC private DRAM block:
242 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
243 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
246 * Get address and size of the DPC blob stored in flash:
248 #ifdef CONFIG_SYS_LS_MC_DPC_IN_NOR
249 dpc_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPC_ADDR;
251 #error "No CONFIG_SYS_LS_MC_DPC_IN_xxx defined"
254 error = fdt_check_header(dpc_fdt_hdr);
257 * Don't return with error here, since the MC firmware can
258 * still boot without a DPC
260 printf("\nfsl-mc: WARNING: No DPC image found");
264 dpc_size = fdt_totalsize(dpc_fdt_hdr);
265 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
266 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
271 mc_copy_image("MC DPC blob",
272 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
273 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
275 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
278 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
282 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size)
285 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
291 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
292 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
293 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
295 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
297 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
301 * Load the MC DPL blob in the MC private DRAM block:
303 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
304 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
307 * Get address and size of the DPL blob stored in flash:
309 #ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
310 dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
312 #error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
315 error = fdt_check_header(dpl_fdt_hdr);
317 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
321 dpl_size = fdt_totalsize(dpl_fdt_hdr);
322 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
323 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
328 mc_copy_image("MC DPL blob",
329 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
330 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
332 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
337 * Return the MC boot timeout value in milliseconds
339 static unsigned long get_mc_boot_timeout_ms(void)
341 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
343 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
345 if (timeout_ms_env_var) {
346 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
347 if (timeout_ms == 0) {
348 printf("fsl-mc: WARNING: Invalid value for \'"
349 MC_BOOT_TIMEOUT_ENV_VAR
350 "\' environment variable: %lu\n",
353 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
360 #ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
361 static int load_mc_aiop_img(u64 mc_ram_addr, size_t mc_ram_size)
366 * Load the MC AIOP image in the MC private DRAM block:
369 aiop_img = (void *)CONFIG_SYS_LS_MC_AIOP_IMG_ADDR;
370 mc_copy_image("MC AIOP image",
371 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
372 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
377 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
380 u32 mc_fw_boot_status;
381 unsigned long timeout_ms = get_mc_boot_timeout_ms();
382 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
385 assert(timeout_ms > 0);
387 udelay(1000); /* throttle polling */
388 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
389 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
390 if (mc_fw_boot_status & 0x1)
398 if (timeout_ms == 0) {
399 printf("ERROR: timeout\n");
401 /* TODO: Get an error status from an MC CCSR register */
405 if (mc_fw_boot_status != 0x1) {
407 * TODO: Identify critical errors from the GSR register's FS
408 * field and for those errors, set error to -ENODEV or other
409 * appropriate errno, so that the status property is set to
410 * failure in the fsl,dprc device tree node.
412 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
419 *final_reg_gsr = reg_gsr;
427 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
431 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
432 const void *raw_image_addr;
433 size_t raw_image_size = 0;
435 struct mc_version mc_ver_info;
436 u64 mc_ram_aligned_base_addr;
437 u8 mc_ram_num_256mb_blocks;
438 size_t mc_ram_size = mc_get_dram_block_size();
441 * The MC private DRAM block was already carved at the end of DRAM
442 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
444 if (gd->bd->bi_dram[1].start) {
446 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
449 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
452 error = calculate_mc_private_ram_params(mc_ram_addr,
454 &mc_ram_aligned_base_addr,
455 &mc_ram_num_256mb_blocks);
460 * Management Complex cores should be held at reset out of POR.
461 * U-boot should be the first software to touch MC. To be safe,
462 * we reset all cores again by setting GCR1 to 0. It doesn't do
463 * anything if they are held at reset. After we setup the firmware
464 * we kick off MC by deasserting the reset bit for core 0, and
465 * deasserting the reset bits for Command Portal Managers.
466 * The stop bits are not touched here. They are used to stop the
467 * cores when they are active. Setting stop bits doesn't stop the
468 * cores from fetching instructions when they are released from
471 out_le32(&mc_ccsr_regs->reg_gcr1, 0);
474 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
475 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
477 error = parse_mc_firmware_fit_image(&raw_image_addr, &raw_image_size);
481 * Load the MC FW at the beginning of the MC private DRAM block:
483 mc_copy_image("MC Firmware",
484 (u64)raw_image_addr, raw_image_size, mc_ram_addr);
486 dump_ram_words("firmware", (void *)mc_ram_addr);
488 error = load_mc_dpc(mc_ram_addr, mc_ram_size);
492 error = load_mc_dpl(mc_ram_addr, mc_ram_size);
496 #ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
497 error = load_mc_aiop_img(mc_ram_addr, mc_ram_size);
502 debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
503 dump_mc_ccsr_regs(mc_ccsr_regs);
506 * Tell MC what is the address range of the DRAM block assigned to it:
508 reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
509 (mc_ram_num_256mb_blocks - 1);
510 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
511 out_le32(&mc_ccsr_regs->reg_mcfbahr,
512 (u32)(mc_ram_aligned_base_addr >> 32));
513 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
516 * Tell the MC that we want delayed DPL deployment.
518 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
520 printf("\nfsl-mc: Booting Management Complex ... ");
523 * Deassert reset and release MC core 0 to run
525 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
526 error = wait_for_mc(true, ®_gsr);
531 * TODO: need to obtain the portal_id for the root container from the
537 * Initialize the global default MC portal
538 * And check that the MC firmware is responding portal commands:
540 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
542 printf(" No memory: malloc() failed\n");
546 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
547 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
548 portal_id, dflt_mc_io->mmio_regs);
550 error = mc_get_version(dflt_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
552 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
557 if (MC_VER_MAJOR != mc_ver_info.major) {
558 printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
559 mc_ver_info.major, MC_VER_MAJOR);
560 printf("fsl-mc: Update the Management Complex firmware\n");
566 if (MC_VER_MINOR != mc_ver_info.minor)
567 printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
568 mc_ver_info.minor, MC_VER_MINOR);
570 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
571 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
572 reg_gsr & GSR_FS_MASK);
575 * Tell the MC to deploy the DPL:
577 out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
578 printf("fsl-mc: Deploying data path layout ... ");
579 error = wait_for_mc(false, ®_gsr);
585 mc_boot_status = error;
592 int get_mc_boot_status(void)
594 return mc_boot_status;
598 * Return the actual size of the MC private DRAM block.
600 unsigned long mc_get_dram_block_size(void)
602 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
604 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
606 if (dram_block_size_env_var) {
607 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
610 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
611 printf("fsl-mc: WARNING: Invalid value for \'"
613 "\' environment variable: %lu\n",
616 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
620 return dram_block_size;
623 int dpio_init(struct dprc_obj_desc obj_desc)
625 struct qbman_swp_desc p_des;
626 struct dpio_attr attr;
629 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
631 printf(" No memory: malloc() failed\n");
635 dflt_dpio->dpio_id = obj_desc.id;
637 err = dpio_open(dflt_mc_io, MC_CMD_NO_FLAGS, obj_desc.id,
640 printf("dpio_open() failed\n");
644 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
645 dflt_dpio_handle, &attr);
647 printf("dpio_get_attributes() failed %d\n", err);
651 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle);
653 printf("dpio_enable() failed %d\n", err);
656 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
657 attr.qbman_portal_ce_offset,
658 attr.qbman_portal_ci_offset,
659 attr.qbman_portal_id,
660 attr.num_priorities);
662 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
663 + attr.qbman_portal_ce_offset);
664 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
665 + attr.qbman_portal_ci_offset);
667 dflt_dpio->sw_portal = qbman_swp_init(&p_des);
668 if (dflt_dpio->sw_portal == NULL) {
669 printf("qbman_swp_init() failed\n");
670 goto err_get_swp_init;
676 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle);
678 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio_handle);
684 int dpbp_init(struct dprc_obj_desc obj_desc)
686 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
688 printf(" No memory: malloc() failed\n");
691 dflt_dpbp->dpbp_attr.id = obj_desc.id;
696 int dprc_init_container_obj(struct dprc_obj_desc obj_desc, uint16_t dprc_handle)
698 int error = 0, state = 0;
699 struct dprc_endpoint dpni_endpoint, dpmac_endpoint;
700 if (!strcmp(obj_desc.type, "dpbp")) {
702 error = dpbp_init(obj_desc);
704 printf("dpbp_init failed\n");
706 } else if (!strcmp(obj_desc.type, "dpio")) {
708 error = dpio_init(obj_desc);
710 printf("dpio_init failed\n");
712 } else if (!strcmp(obj_desc.type, "dpni")) {
713 strcpy(dpni_endpoint.type, obj_desc.type);
714 dpni_endpoint.id = obj_desc.id;
715 error = dprc_get_connection(dflt_mc_io, MC_CMD_NO_FLAGS,
716 dprc_handle, &dpni_endpoint,
717 &dpmac_endpoint, &state);
718 if (!strcmp(dpmac_endpoint.type, "dpmac"))
719 error = ldpaa_eth_init(obj_desc);
721 printf("ldpaa_eth_init failed\n");
727 int dprc_scan_container_obj(uint16_t dprc_handle, char *obj_type, int i)
730 struct dprc_obj_desc obj_desc;
732 memset((void *)&obj_desc, 0x00, sizeof(struct dprc_obj_desc));
734 error = dprc_get_obj(dflt_mc_io, MC_CMD_NO_FLAGS, dprc_handle,
737 printf("dprc_get_obj(i=%d) failed: %d\n",
742 if (!strcmp(obj_desc.type, obj_type)) {
743 debug("Discovered object: type %s, id %d, req %s\n",
744 obj_desc.type, obj_desc.id, obj_type);
746 error = dprc_init_container_obj(obj_desc, dprc_handle);
748 printf("dprc_init_container_obj(i=%d) failed: %d\n",
757 int fsl_mc_ldpaa_init(bd_t *bis)
760 int dprc_opened = 0, container_id;
761 int num_child_objects = 0;
767 error = dprc_get_container_id(dflt_mc_io, MC_CMD_NO_FLAGS,
770 printf("dprc_get_container_id() failed: %d\n", error);
774 debug("fsl-mc: Container id=0x%x\n", container_id);
776 error = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, container_id,
779 printf("dprc_open() failed: %d\n", error);
784 error = dprc_get_obj_count(dflt_mc_io,
785 MC_CMD_NO_FLAGS, dflt_dprc_handle,
788 printf("dprc_get_obj_count() failed: %d\n", error);
791 debug("Total child in container %d = %d\n", container_id,
794 if (num_child_objects != 0) {
796 * Discover objects currently in the DPRC container in the MC:
798 for (i = 0; i < num_child_objects; i++)
799 error = dprc_scan_container_obj(dflt_dprc_handle,
802 for (i = 0; i < num_child_objects; i++)
803 error = dprc_scan_container_obj(dflt_dprc_handle,
806 for (i = 0; i < num_child_objects; i++)
807 error = dprc_scan_container_obj(dflt_dprc_handle,
812 dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
817 void fsl_mc_ldpaa_exit(bd_t *bis)
821 if (get_mc_boot_status() == 0) {
822 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS,
825 printf("dpio_disable() failed: %d\n", err);
828 err = dpio_reset(dflt_mc_io, MC_CMD_NO_FLAGS,
831 printf("dpio_reset() failed: %d\n", err);
834 err = dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS,
837 printf("dpio_close() failed: %d\n", err);