44ce00041ee00241bd22f17db82e32404f5595e0
[oweals/u-boot.git] / drivers / net / fsl-mc / dpio / qbman_portal.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2014 Freescale Semiconductor
4  */
5
6 #include <log.h>
7 #include <malloc.h>
8 #include <asm/arch/clock.h>
9 #include <linux/bug.h>
10 #include "qbman_portal.h"
11
12 /* QBMan portal management command codes */
13 #define QBMAN_MC_ACQUIRE       0x30
14 #define QBMAN_WQCHAN_CONFIGURE 0x46
15
16 /* CINH register offsets */
17 #define QBMAN_CINH_SWP_EQAR    0x8c0
18 #define QBMAN_CINH_SWP_DCAP    0xac0
19 #define QBMAN_CINH_SWP_SDQCR   0xb00
20 #define QBMAN_CINH_SWP_RAR     0xcc0
21
22 /* CENA register offsets */
23 #define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
24 #define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
25 #define QBMAN_CENA_SWP_RCR(n)  (0x400 + ((uint32_t)(n) << 6))
26 #define QBMAN_CENA_SWP_CR      0x600
27 #define QBMAN_CENA_SWP_RR(vb)  (0x700 + ((uint32_t)(vb) >> 1))
28 #define QBMAN_CENA_SWP_VDQCR   0x780
29
30 /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
31 #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
32
33 /*******************************/
34 /* Pre-defined attribute codes */
35 /*******************************/
36
37 struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
38 struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
39
40 /*************************/
41 /* SDQCR attribute codes */
42 /*************************/
43
44 /* we put these here because at least some of them are required by
45  * qbman_swp_init() */
46 struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
47 struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
48 struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
49 #define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
50 enum qbman_sdqcr_dct {
51         qbman_sdqcr_dct_null = 0,
52         qbman_sdqcr_dct_prio_ics,
53         qbman_sdqcr_dct_active_ics,
54         qbman_sdqcr_dct_active
55 };
56 enum qbman_sdqcr_fc {
57         qbman_sdqcr_fc_one = 0,
58         qbman_sdqcr_fc_up_to_3 = 1
59 };
60
61 /*********************************/
62 /* Portal constructor/destructor */
63 /*********************************/
64
65 /* Software portals should always be in the power-on state when we initialise,
66  * due to the CCSR-based portal reset functionality that MC has. */
67 struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
68 {
69         int ret;
70         struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
71         u32 major = 0, minor = 0;
72
73         if (!p)
74                 return NULL;
75         p->desc = d;
76 #ifdef QBMAN_CHECKING
77         p->mc.check = swp_mc_can_start;
78 #endif
79         p->mc.valid_bit = QB_VALID_BIT;
80         p->sdq = 0;
81         qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
82         qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
83         qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
84         atomic_set(&p->vdq.busy, 1);
85         p->vdq.valid_bit = QB_VALID_BIT;
86         p->dqrr.next_idx = 0;
87
88         qbman_version(&major, &minor);
89         if (!major) {
90                 printf("invalid qbman version\n");
91                 return NULL;
92         }
93
94         if (major >= 4 && minor >= 1)
95                 p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
96         else
97                 p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
98
99         p->dqrr.valid_bit = QB_VALID_BIT;
100         ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
101         if (ret) {
102                 free(p);
103                 printf("qbman_swp_sys_init() failed %d\n", ret);
104                 return NULL;
105         }
106         qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
107         return p;
108 }
109
110 /***********************/
111 /* Management commands */
112 /***********************/
113
114 /*
115  * Internal code common to all types of management commands.
116  */
117
118 void *qbman_swp_mc_start(struct qbman_swp *p)
119 {
120         void *ret;
121         int *return_val;
122 #ifdef QBMAN_CHECKING
123         BUG_ON(p->mc.check != swp_mc_can_start);
124 #endif
125         ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
126 #ifdef QBMAN_CHECKING
127         return_val = (int *)ret;
128         if (!(*return_val))
129                 p->mc.check = swp_mc_can_submit;
130 #endif
131         return ret;
132 }
133
134 void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
135 {
136         uint32_t *v = cmd;
137 #ifdef QBMAN_CHECKING
138         BUG_ON(p->mc.check != swp_mc_can_submit);
139 #endif
140         lwsync();
141         /* TBD: "|=" is going to hurt performance. Need to move as many fields
142          * out of word zero, and for those that remain, the "OR" needs to occur
143          * at the caller side. This debug check helps to catch cases where the
144          * caller wants to OR but has forgotten to do so. */
145         BUG_ON((*v & cmd_verb) != *v);
146         *v = cmd_verb | p->mc.valid_bit;
147         qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
148         /* TODO: add prefetch support for GPP */
149 #ifdef QBMAN_CHECKING
150         p->mc.check = swp_mc_can_poll;
151 #endif
152 }
153
154 void *qbman_swp_mc_result(struct qbman_swp *p)
155 {
156         uint32_t *ret, verb;
157 #ifdef QBMAN_CHECKING
158         BUG_ON(p->mc.check != swp_mc_can_poll);
159 #endif
160         ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
161         /* Remove the valid-bit - command completed iff the rest is non-zero */
162         verb = ret[0] & ~QB_VALID_BIT;
163         if (!verb)
164                 return NULL;
165 #ifdef QBMAN_CHECKING
166         p->mc.check = swp_mc_can_start;
167 #endif
168         p->mc.valid_bit ^= QB_VALID_BIT;
169         return ret;
170 }
171
172 /***********/
173 /* Enqueue */
174 /***********/
175
176 /* These should be const, eventually */
177 static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
178 static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
179 static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
180 /* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
181 static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
182 static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
183 static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
184 static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
185 static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
186
187 enum qbman_eq_cmd_e {
188         /* No enqueue, primarily for plugging ORP gaps for dropped frames */
189         qbman_eq_cmd_empty,
190         /* DMA an enqueue response once complete */
191         qbman_eq_cmd_respond,
192         /* DMA an enqueue response only if the enqueue fails */
193         qbman_eq_cmd_respond_reject
194 };
195
196 void qbman_eq_desc_clear(struct qbman_eq_desc *d)
197 {
198         memset(d, 0, sizeof(*d));
199 }
200
201 void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
202 {
203         uint32_t *cl = qb_cl(d);
204
205         qb_attr_code_encode(&code_eq_orp_en, cl, 0);
206         qb_attr_code_encode(&code_eq_cmd, cl,
207                             respond_success ? qbman_eq_cmd_respond :
208                                               qbman_eq_cmd_respond_reject);
209 }
210
211 void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
212                                 dma_addr_t storage_phys,
213                                 int stash)
214 {
215         uint32_t *cl = qb_cl(d);
216
217         qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
218         qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
219 }
220
221
222 void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
223                           uint32_t qd_bin, uint32_t qd_prio)
224 {
225         uint32_t *cl = qb_cl(d);
226
227         qb_attr_code_encode(&code_eq_qd_en, cl, 1);
228         qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
229         qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
230         qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
231 }
232
233 #define EQAR_IDX(eqar)     ((eqar) & 0x7)
234 #define EQAR_VB(eqar)      ((eqar) & 0x80)
235 #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
236
237 int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
238                       const struct qbman_fd *fd)
239 {
240         uint32_t *p;
241         const uint32_t *cl = qb_cl(d);
242         uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
243         debug("EQAR=%08x\n", eqar);
244         if (!EQAR_SUCCESS(eqar))
245                 return -EBUSY;
246         p = qbman_cena_write_start(&s->sys,
247                                    QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
248         word_copy(&p[1], &cl[1], 7);
249         word_copy(&p[8], fd, sizeof(*fd) >> 2);
250         lwsync();
251         /* Set the verb byte, have to substitute in the valid-bit */
252         p[0] = cl[0] | EQAR_VB(eqar);
253         qbman_cena_write_complete(&s->sys,
254                                   QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
255                                   p);
256         return 0;
257 }
258
259 /***************************/
260 /* Volatile (pull) dequeue */
261 /***************************/
262
263 /* These should be const, eventually */
264 static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
265 static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
266 static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
267 static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
268 static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
269 static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
270 static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
271 static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
272
273 enum qb_pull_dt_e {
274         qb_pull_dt_channel,
275         qb_pull_dt_workqueue,
276         qb_pull_dt_framequeue
277 };
278
279 void qbman_pull_desc_clear(struct qbman_pull_desc *d)
280 {
281         memset(d, 0, sizeof(*d));
282 }
283
284 void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
285                                  struct ldpaa_dq *storage,
286                                  dma_addr_t storage_phys,
287                                  int stash)
288 {
289         uint32_t *cl = qb_cl(d);
290
291         /* Squiggle the pointer 'storage' into the extra 2 words of the
292          * descriptor (which aren't copied to the hw command) */
293         *(void **)&cl[4] = storage;
294         if (!storage) {
295                 qb_attr_code_encode(&code_pull_rls, cl, 0);
296                 return;
297         }
298         qb_attr_code_encode(&code_pull_rls, cl, 1);
299         qb_attr_code_encode(&code_pull_stash, cl, !!stash);
300         qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
301 }
302
303 void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
304 {
305         uint32_t *cl = qb_cl(d);
306
307         BUG_ON(!numframes || (numframes > 16));
308         qb_attr_code_encode(&code_pull_numframes, cl,
309                             (uint32_t)(numframes - 1));
310 }
311
312 void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
313 {
314         uint32_t *cl = qb_cl(d);
315
316         qb_attr_code_encode(&code_pull_token, cl, token);
317 }
318
319 void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
320 {
321         uint32_t *cl = qb_cl(d);
322
323         qb_attr_code_encode(&code_pull_dct, cl, 1);
324         qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
325         qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
326 }
327
328 int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
329 {
330         uint32_t *p;
331         uint32_t *cl = qb_cl(d);
332
333         if (!atomic_dec_and_test(&s->vdq.busy)) {
334                 atomic_inc(&s->vdq.busy);
335                 return -EBUSY;
336         }
337         s->vdq.storage = *(void **)&cl[4];
338         s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
339         p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
340         word_copy(&p[1], &cl[1], 3);
341         lwsync();
342         /* Set the verb byte, have to substitute in the valid-bit */
343         p[0] = cl[0] | s->vdq.valid_bit;
344         s->vdq.valid_bit ^= QB_VALID_BIT;
345         qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
346         return 0;
347 }
348
349 /****************/
350 /* Polling DQRR */
351 /****************/
352
353 static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
354 static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
355 static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
356
357 #define QBMAN_DQRR_RESPONSE_DQ        0x60
358 #define QBMAN_DQRR_RESPONSE_FQRN      0x21
359 #define QBMAN_DQRR_RESPONSE_FQRNI     0x22
360 #define QBMAN_DQRR_RESPONSE_FQPN      0x24
361 #define QBMAN_DQRR_RESPONSE_FQDAN     0x25
362 #define QBMAN_DQRR_RESPONSE_CDAN      0x26
363 #define QBMAN_DQRR_RESPONSE_CSCN_MEM  0x27
364 #define QBMAN_DQRR_RESPONSE_CGCU      0x28
365 #define QBMAN_DQRR_RESPONSE_BPSCN     0x29
366 #define QBMAN_DQRR_RESPONSE_CSCN_WQ   0x2a
367
368
369 /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
370  * only once, so repeated calls can return a sequence of DQRR entries, without
371  * requiring they be consumed immediately or in any particular order. */
372 const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
373 {
374         uint32_t verb;
375         uint32_t response_verb;
376         uint32_t flags;
377         const struct ldpaa_dq *dq;
378         const uint32_t *p;
379
380         dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
381         p = qb_cl(dq);
382         verb = qb_attr_code_decode(&code_dqrr_verb, p);
383
384         /* If the valid-bit isn't of the expected polarity, nothing there. Note,
385          * in the DQRR reset bug workaround, we shouldn't need to skip these
386          * check, because we've already determined that a new entry is available
387          * and we've invalidated the cacheline before reading it, so the
388          * valid-bit behaviour is repaired and should tell us what we already
389          * knew from reading PI.
390          */
391         if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
392                 qbman_cena_invalidate_prefetch(&s->sys,
393                                         QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
394                 return NULL;
395         }
396         /* There's something there. Move "next_idx" attention to the next ring
397          * entry (and prefetch it) before returning what we found. */
398         s->dqrr.next_idx++;
399         s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
400         /* TODO: it's possible to do all this without conditionals, optimise it
401          * later. */
402         if (!s->dqrr.next_idx)
403                 s->dqrr.valid_bit ^= QB_VALID_BIT;
404
405         /* If this is the final response to a volatile dequeue command
406            indicate that the vdq is no longer busy */
407         flags = ldpaa_dq_flags(dq);
408         response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
409         if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
410             (flags & LDPAA_DQ_STAT_VOLATILE) &&
411             (flags & LDPAA_DQ_STAT_EXPIRED))
412                         atomic_inc(&s->vdq.busy);
413
414         qbman_cena_invalidate_prefetch(&s->sys,
415                                        QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
416         return dq;
417 }
418
419 /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
420 void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
421 {
422         qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
423 }
424
425 /*********************************/
426 /* Polling user-provided storage */
427 /*********************************/
428
429 void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
430                                  unsigned int num_entries,
431                                  uint8_t oldtoken)
432 {
433         memset(dq, oldtoken, num_entries * sizeof(*dq));
434 }
435
436 int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
437                                 const struct ldpaa_dq *dq,
438                                 uint8_t newtoken)
439 {
440         /* To avoid converting the little-endian DQ entry to host-endian prior
441          * to us knowing whether there is a valid entry or not (and run the
442          * risk of corrupting the incoming hardware LE write), we detect in
443          * hardware endianness rather than host. This means we need a different
444          * "code" depending on whether we are BE or LE in software, which is
445          * where DQRR_TOK_OFFSET comes in... */
446         static struct qb_attr_code code_dqrr_tok_detect =
447                                         QB_CODE(0, DQRR_TOK_OFFSET, 8);
448         /* The user trying to poll for a result treats "dq" as const. It is
449          * however the same address that was provided to us non-const in the
450          * first place, for directing hardware DMA to. So we can cast away the
451          * const because it is mutable from our perspective. */
452         uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
453         uint32_t token;
454
455         token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
456         if (token != newtoken)
457                 return 0;
458
459         /* Only now do we convert from hardware to host endianness. Also, as we
460          * are returning success, the user has promised not to call us again, so
461          * there's no risk of us converting the endianness twice... */
462         make_le32_n(p, 16);
463
464         /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
465          * fact "VDQCR" shows busy doesn't mean that the result we're looking at
466          * is from the same command. Eg. we may be looking at our 10th dequeue
467          * result from our first VDQCR command, yet the second dequeue command
468          * could have been kicked off already, after seeing the 1st result. Ie.
469          * the result we're looking at is not necessarily proof that we can
470          * reset "busy".  We instead base the decision on whether the current
471          * result is sitting at the first 'storage' location of the busy
472          * command. */
473         if (s->vdq.storage == dq) {
474                 s->vdq.storage = NULL;
475                         atomic_inc(&s->vdq.busy);
476         }
477         return 1;
478 }
479
480 /********************************/
481 /* Categorising dequeue entries */
482 /********************************/
483
484 static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
485 {
486         const uint32_t *p = qb_cl(dq);
487         uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
488
489         return response_verb == x;
490 }
491
492 int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
493 {
494         return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
495 }
496
497 /*********************************/
498 /* Parsing frame dequeue results */
499 /*********************************/
500
501 /* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
502
503 uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
504 {
505         const uint32_t *p = qb_cl(dq);
506
507         return qb_attr_code_decode(&code_dqrr_stat, p);
508 }
509
510 const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
511 {
512         const uint32_t *p = qb_cl(dq);
513
514         return (const struct dpaa_fd *)&p[8];
515 }
516
517 /******************/
518 /* Buffer release */
519 /******************/
520
521 /* These should be const, eventually */
522 /* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
523 static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
524 static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
525
526 void qbman_release_desc_clear(struct qbman_release_desc *d)
527 {
528         uint32_t *cl;
529
530         memset(d, 0, sizeof(*d));
531         cl = qb_cl(d);
532         qb_attr_code_encode(&code_release_set_me, cl, 1);
533 }
534
535 void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
536 {
537         uint32_t *cl = qb_cl(d);
538
539         qb_attr_code_encode(&code_release_bpid, cl, bpid);
540 }
541
542 #define RAR_IDX(rar)     ((rar) & 0x7)
543 #define RAR_VB(rar)      ((rar) & 0x80)
544 #define RAR_SUCCESS(rar) ((rar) & 0x100)
545
546 int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
547                       const uint64_t *buffers, unsigned int num_buffers)
548 {
549         uint32_t *p;
550         const uint32_t *cl = qb_cl(d);
551         uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
552         debug("RAR=%08x\n", rar);
553         if (!RAR_SUCCESS(rar))
554                 return -EBUSY;
555         BUG_ON(!num_buffers || (num_buffers > 7));
556         /* Start the release command */
557         p = qbman_cena_write_start(&s->sys,
558                                    QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
559         /* Copy the caller's buffer pointers to the command */
560         u64_to_le32_copy(&p[2], buffers, num_buffers);
561         lwsync();
562         /* Set the verb byte, have to substitute in the valid-bit and the number
563          * of buffers. */
564         p[0] = cl[0] | RAR_VB(rar) | num_buffers;
565         qbman_cena_write_complete(&s->sys,
566                                   QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
567                                   p);
568         return 0;
569 }
570
571 /*******************/
572 /* Buffer acquires */
573 /*******************/
574
575 /* These should be const, eventually */
576 static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
577 static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
578 static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
579
580 int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
581                       unsigned int num_buffers)
582 {
583         uint32_t *p;
584         uint32_t verb, rslt, num;
585
586         BUG_ON(!num_buffers || (num_buffers > 7));
587
588         /* Start the management command */
589         p = qbman_swp_mc_start(s);
590
591         if (!p)
592                 return -EBUSY;
593
594         /* Encode the caller-provided attributes */
595         qb_attr_code_encode(&code_acquire_bpid, p, bpid);
596         qb_attr_code_encode(&code_acquire_num, p, num_buffers);
597
598         /* Complete the management command */
599         p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
600
601         /* Decode the outcome */
602         verb = qb_attr_code_decode(&code_generic_verb, p);
603         rslt = qb_attr_code_decode(&code_generic_rslt, p);
604         num = qb_attr_code_decode(&code_acquire_r_num, p);
605         BUG_ON(verb != QBMAN_MC_ACQUIRE);
606
607         /* Determine success or failure */
608         if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
609                 printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
610                        bpid, rslt);
611                 return -EIO;
612         }
613         BUG_ON(num > num_buffers);
614         /* Copy the acquired buffers to the caller's array */
615         u64_from_le32_copy(buffers, &p[2], num);
616         return (int)num;
617 }