1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2011 Freescale Semiconductor, Inc.
9 #include <asm/immap_85xx.h>
10 #include <asm/fsl_serdes.h>
12 static u32 port_to_devdisr[] = {
13 [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
14 [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
17 static int is_device_disabled(enum fm_port port)
19 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
20 u32 devdisr = in_be32(&gur->devdisr);
22 return port_to_devdisr[port] & devdisr;
25 void fman_disable_port(enum fm_port port)
27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
29 /* don't allow disabling of DTSEC1 as its needed for MDIO */
30 if (port == FM1_DTSEC1)
33 setbits_be32(&gur->devdisr, port_to_devdisr[port]);
36 void fman_enable_port(enum fm_port port)
38 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]);
43 phy_interface_t fman_port_enet_if(enum fm_port port)
45 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
46 u32 pordevsr = in_be32(&gur->pordevsr);
48 if (is_device_disabled(port))
49 return PHY_INTERFACE_MODE_NONE;
51 /* DTSEC1 can be SGMII, RGMII or RMII */
52 if (port == FM1_DTSEC1) {
53 if (is_serdes_configured(SGMII_FM1_DTSEC1))
54 return PHY_INTERFACE_MODE_SGMII;
55 if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) {
56 if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC)
57 return PHY_INTERFACE_MODE_RGMII;
59 return PHY_INTERFACE_MODE_RMII;
63 /* DTSEC2 only supports SGMII or RGMII */
64 if (port == FM1_DTSEC2) {
65 if (is_serdes_configured(SGMII_FM1_DTSEC2))
66 return PHY_INTERFACE_MODE_SGMII;
67 if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)
68 return PHY_INTERFACE_MODE_RGMII;
71 return PHY_INTERFACE_MODE_NONE;