2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
13 static u32 port_to_devdisr[] = {
14 [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
15 [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
18 static int is_device_disabled(enum fm_port port)
20 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
21 u32 devdisr = in_be32(&gur->devdisr);
23 return port_to_devdisr[port] & devdisr;
26 void fman_disable_port(enum fm_port port)
28 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
30 /* don't allow disabling of DTSEC1 as its needed for MDIO */
31 if (port == FM1_DTSEC1)
34 setbits_be32(&gur->devdisr, port_to_devdisr[port]);
37 void fman_enable_port(enum fm_port port)
39 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
41 clrbits_be32(&gur->devdisr, port_to_devdisr[port]);
44 phy_interface_t fman_port_enet_if(enum fm_port port)
46 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
47 u32 pordevsr = in_be32(&gur->pordevsr);
49 if (is_device_disabled(port))
50 return PHY_INTERFACE_MODE_NONE;
52 /* DTSEC1 can be SGMII, RGMII or RMII */
53 if (port == FM1_DTSEC1) {
54 if (is_serdes_configured(SGMII_FM1_DTSEC1))
55 return PHY_INTERFACE_MODE_SGMII;
56 if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) {
57 if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC)
58 return PHY_INTERFACE_MODE_RGMII;
60 return PHY_INTERFACE_MODE_RMII;
64 /* DTSEC2 only supports SGMII or RGMII */
65 if (port == FM1_DTSEC2) {
66 if (is_serdes_configured(SGMII_FM1_DTSEC2))
67 return PHY_INTERFACE_MODE_SGMII;
68 if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)
69 return PHY_INTERFACE_MODE_RGMII;
72 return PHY_INTERFACE_MODE_NONE;