1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2011-2015 Freescale Semiconductor, Inc.
9 #include <fdt_support.h>
11 #ifdef CONFIG_FSL_LAYERSCAPE
12 #include <asm/arch/fsl_serdes.h>
13 #include <linux/libfdt.h>
15 #include <asm/fsl_serdes.h>
21 struct fm_eth_info fm_info[] = {
22 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
23 FM_DTSEC_INFO_INITIALIZER(1, 1),
25 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
26 FM_DTSEC_INFO_INITIALIZER(1, 2),
28 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
29 FM_DTSEC_INFO_INITIALIZER(1, 3),
31 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
32 FM_DTSEC_INFO_INITIALIZER(1, 4),
34 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
35 FM_DTSEC_INFO_INITIALIZER(1, 5),
37 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
38 FM_DTSEC_INFO_INITIALIZER(1, 6),
40 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
41 FM_DTSEC_INFO_INITIALIZER(1, 9),
43 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
44 FM_DTSEC_INFO_INITIALIZER(1, 10),
46 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
47 FM_DTSEC_INFO_INITIALIZER(2, 1),
49 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
50 FM_DTSEC_INFO_INITIALIZER(2, 2),
52 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
53 FM_DTSEC_INFO_INITIALIZER(2, 3),
55 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
56 FM_DTSEC_INFO_INITIALIZER(2, 4),
58 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
59 FM_DTSEC_INFO_INITIALIZER(2, 5),
61 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
62 FM_DTSEC_INFO_INITIALIZER(2, 6),
64 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
65 FM_DTSEC_INFO_INITIALIZER(2, 9),
67 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
68 FM_DTSEC_INFO_INITIALIZER(2, 10),
70 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
71 FM_TGEC_INFO_INITIALIZER(1, 1),
73 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
74 FM_TGEC_INFO_INITIALIZER(1, 2),
76 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
77 FM_TGEC_INFO_INITIALIZER2(1, 3),
79 #if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
80 FM_TGEC_INFO_INITIALIZER2(1, 4),
82 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
83 FM_TGEC_INFO_INITIALIZER(2, 1),
85 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
86 FM_TGEC_INFO_INITIALIZER(2, 2),
90 int fm_standard_init(bd_t *bis)
93 struct ccsr_fman *reg;
95 reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
96 if (fm_init_common(0, reg))
99 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
100 if ((fm_info[i].enabled) && (fm_info[i].index == 1))
101 fm_eth_initialize(reg, &fm_info[i]);
104 #if (CONFIG_SYS_NUM_FMAN == 2)
105 reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
106 if (fm_init_common(1, reg))
109 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
110 if ((fm_info[i].enabled) && (fm_info[i].index == 2))
111 fm_eth_initialize(reg, &fm_info[i]);
118 /* simple linear search to map from port to array index */
119 static int fm_port_to_index(enum fm_port port)
123 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
124 if (fm_info[i].port == port)
132 * Determine if an interface is actually active based on HW config
133 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
134 * the interface is not active based on HW cfg of the SoC
136 void fman_enet_init(void)
140 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
141 phy_interface_t enet_if;
143 enet_if = fman_port_enet_if(fm_info[i].port);
144 if (enet_if != PHY_INTERFACE_MODE_NONE) {
145 fm_info[i].enabled = 1;
146 fm_info[i].enet_if = enet_if;
148 fm_info[i].enabled = 0;
155 void fm_disable_port(enum fm_port port)
157 int i = fm_port_to_index(port);
162 fm_info[i].enabled = 0;
163 #ifndef CONFIG_SYS_FMAN_V3
164 fman_disable_port(port);
168 void fm_enable_port(enum fm_port port)
170 int i = fm_port_to_index(port);
175 fm_info[i].enabled = 1;
176 fman_enable_port(port);
179 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
181 int i = fm_port_to_index(port);
186 fm_info[i].bus = bus;
189 void fm_info_set_phy_address(enum fm_port port, int address)
191 int i = fm_port_to_index(port);
196 fm_info[i].phy_addr = address;
200 * Returns the PHY address for a given Fman port
202 * The port must be set via a prior call to fm_info_set_phy_address().
203 * A negative error code is returned if the port is invalid.
205 int fm_info_get_phy_address(enum fm_port port)
207 int i = fm_port_to_index(port);
212 return fm_info[i].phy_addr;
216 * Returns the type of the data interface between the given MAC and its PHY.
217 * This is typically determined by the RCW.
219 phy_interface_t fm_info_get_enet_if(enum fm_port port)
221 int i = fm_port_to_index(port);
224 return PHY_INTERFACE_MODE_NONE;
226 if (fm_info[i].enabled)
227 return fm_info[i].enet_if;
229 return PHY_INTERFACE_MODE_NONE;
233 __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
234 enum fm_port port, int offset)
239 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
240 enum fm_port port, int offset)
241 __attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
243 int ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
247 phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
248 #ifndef CONFIG_SYS_FMAN_V3
249 u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
250 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
253 off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
254 if (off == -FDT_ERR_NOTFOUND)
258 fdt_fixup_phy_connection(blob, off, info->enet_if);
259 board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
263 #ifdef CONFIG_SYS_FMAN_V3
264 #ifndef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
266 * On T2/T4 SoCs, physically FM1_DTSEC9 and FM1_10GEC1 use the same
267 * dual-role MAC, when FM1_10GEC1 is enabled and FM1_DTSEC9
268 * is disabled, ensure that the dual-role MAC is not disabled,
269 * ditto for other dual-role MACs.
271 if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
272 ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
273 ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
274 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
275 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) ||
276 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) ||
277 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
278 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2)))
279 #if (CONFIG_SYS_NUM_FMAN == 2)
281 ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) ||
282 ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) ||
283 ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) ||
284 ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
287 /* FM1_DTSECx and FM1_10GECx use the same dual-role MAC */
288 if (((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
289 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
290 ((info->port == FM1_DTSEC3) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
291 ((info->port == FM1_DTSEC4) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
292 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
293 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC2))) ||
294 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC3))) ||
295 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC4)))
300 /* board code might have caused offset to change */
301 off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
303 #ifndef CONFIG_SYS_FMAN_V3
304 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
305 if (paddr != dtsec1_addr)
307 fdt_status_disabled(blob, off); /* disable the MAC node */
309 /* disable the fsl,dpa-ethernet node that points to the MAC */
310 ph = fdt_get_phandle(blob, off);
311 do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
312 "status", "disabled", strlen("disabled") + 1, 1);
317 void fdt_fixup_fman_ethernet(void *blob)
321 #ifdef CONFIG_SYS_FMAN_V3
322 for (i = 0; i < ARRAY_SIZE(fm_info); i++)
323 ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
325 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
326 /* Try the new compatible first.
327 * If the node is missing, try the old.
329 if (fm_info[i].type == FM_ETH_1G_E) {
330 if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-dtsec"))
331 ft_fixup_port(blob, &fm_info[i],
334 if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-xgec") &&
335 ft_fixup_port(blob, &fm_info[i], "fsl,fman-tgec"))
336 ft_fixup_port(blob, &fm_info[i],
343 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
344 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
345 *then set the correct PHY address
347 void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
348 unsigned int port_num, int phy_base_addr)
350 unsigned int regnum = 0;
355 qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
360 for (i = base_port; i < base_port + port_num; i++) {
361 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
362 phy_real_addr = phy_base_addr + i - base_port;
363 fm_info_set_phy_address(i, phy_real_addr);
368 /*to check whether qsgmii riser card is used*/
369 int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
370 unsigned int port_num, unsigned regnum)
378 for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
379 val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
380 if (val != MIIM_TIMEOUT)
386 #endif /* CONFIG_DM_ETH */