2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/export.h>
34 #include <linux/etherdevice.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/vport.h>
37 #include <linux/mlx5/eswitch.h>
38 #include "mlx5_core.h"
40 /* Mutex to hold while enabling or disabling RoCE */
41 static DEFINE_MUTEX(mlx5_roce_en_lock);
43 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod,
44 u16 vport, u32 *out, int outlen)
46 u32 in[MLX5_ST_SZ_DW(query_vport_state_in)] = {0};
48 MLX5_SET(query_vport_state_in, in, opcode,
49 MLX5_CMD_OP_QUERY_VPORT_STATE);
50 MLX5_SET(query_vport_state_in, in, op_mod, opmod);
51 MLX5_SET(query_vport_state_in, in, vport_number, vport);
53 MLX5_SET(query_vport_state_in, in, other_vport, 1);
55 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
58 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport)
60 u32 out[MLX5_ST_SZ_DW(query_vport_state_out)] = {0};
62 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out));
64 return MLX5_GET(query_vport_state_out, out, state);
67 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
68 u16 vport, u8 other_vport, u8 state)
70 u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {0};
71 u32 out[MLX5_ST_SZ_DW(modify_vport_state_out)] = {0};
73 MLX5_SET(modify_vport_state_in, in, opcode,
74 MLX5_CMD_OP_MODIFY_VPORT_STATE);
75 MLX5_SET(modify_vport_state_in, in, op_mod, opmod);
76 MLX5_SET(modify_vport_state_in, in, vport_number, vport);
77 MLX5_SET(modify_vport_state_in, in, other_vport, other_vport);
78 MLX5_SET(modify_vport_state_in, in, admin_state, state);
80 return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
83 static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,
86 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
88 MLX5_SET(query_nic_vport_context_in, in, opcode,
89 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
90 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
92 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
94 return mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
97 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
100 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)] = {0};
102 MLX5_SET(modify_nic_vport_context_in, in, opcode,
103 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
104 return mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
107 int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,
108 u16 vport, u8 *min_inline)
110 u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {0};
113 err = mlx5_query_nic_vport_context(mdev, vport, out, sizeof(out));
115 *min_inline = MLX5_GET(query_nic_vport_context_out, out,
116 nic_vport_context.min_wqe_inline_mode);
119 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_min_inline);
121 void mlx5_query_min_inline(struct mlx5_core_dev *mdev,
124 switch (MLX5_CAP_ETH(mdev, wqe_inline_mode)) {
125 case MLX5_CAP_INLINE_MODE_L2:
126 *min_inline_mode = MLX5_INLINE_MODE_L2;
128 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
129 mlx5_query_nic_vport_min_inline(mdev, 0, min_inline_mode);
131 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
132 *min_inline_mode = MLX5_INLINE_MODE_NONE;
136 EXPORT_SYMBOL_GPL(mlx5_query_min_inline);
138 int mlx5_modify_nic_vport_min_inline(struct mlx5_core_dev *mdev,
139 u16 vport, u8 min_inline)
141 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {0};
142 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
145 MLX5_SET(modify_nic_vport_context_in, in,
146 field_select.min_inline, 1);
147 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
148 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
150 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
151 in, nic_vport_context);
152 MLX5_SET(nic_vport_context, nic_vport_ctx,
153 min_wqe_inline_mode, min_inline);
155 return mlx5_modify_nic_vport_context(mdev, in, inlen);
158 int mlx5_query_nic_vport_mac_address(struct mlx5_core_dev *mdev,
159 u16 vport, bool other, u8 *addr)
161 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
162 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};
167 out = kvzalloc(outlen, GFP_KERNEL);
171 out_addr = MLX5_ADDR_OF(query_nic_vport_context_out, out,
172 nic_vport_context.permanent_address);
174 MLX5_SET(query_nic_vport_context_in, in, opcode,
175 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
176 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
177 MLX5_SET(query_nic_vport_context_in, in, other_vport, other);
179 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen);
181 ether_addr_copy(addr, &out_addr[2]);
186 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_address);
188 int mlx5_query_mac_address(struct mlx5_core_dev *mdev, u8 *addr)
190 return mlx5_query_nic_vport_mac_address(mdev, 0, false, addr);
192 EXPORT_SYMBOL_GPL(mlx5_query_mac_address);
194 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev,
198 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
203 in = kvzalloc(inlen, GFP_KERNEL);
207 MLX5_SET(modify_nic_vport_context_in, in,
208 field_select.permanent_address, 1);
209 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
210 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
212 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
213 in, nic_vport_context);
214 perm_mac = MLX5_ADDR_OF(nic_vport_context, nic_vport_ctx,
217 ether_addr_copy(&perm_mac[2], addr);
219 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
225 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
227 int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)
229 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
233 out = kvzalloc(outlen, GFP_KERNEL);
237 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
239 *mtu = MLX5_GET(query_nic_vport_context_out, out,
240 nic_vport_context.mtu);
245 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
247 int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
249 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
253 in = kvzalloc(inlen, GFP_KERNEL);
257 MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
258 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
260 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
265 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
267 int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
269 enum mlx5_list_type list_type,
270 u8 addr_list[][ETH_ALEN],
273 u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {0};
282 req_list_size = *list_size;
284 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
285 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
286 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
288 if (req_list_size > max_list_size) {
289 mlx5_core_warn(dev, "Requested list size (%d) > (%d) max_list_size\n",
290 req_list_size, max_list_size);
291 req_list_size = max_list_size;
294 out_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
295 req_list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
297 out = kzalloc(out_sz, GFP_KERNEL);
301 MLX5_SET(query_nic_vport_context_in, in, opcode,
302 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);
303 MLX5_SET(query_nic_vport_context_in, in, allowed_list_type, list_type);
304 MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);
305 MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);
307 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
311 nic_vport_ctx = MLX5_ADDR_OF(query_nic_vport_context_out, out,
313 req_list_size = MLX5_GET(nic_vport_context, nic_vport_ctx,
316 *list_size = req_list_size;
317 for (i = 0; i < req_list_size; i++) {
318 u8 *mac_addr = MLX5_ADDR_OF(nic_vport_context,
320 current_uc_mac_address[i]) + 2;
321 ether_addr_copy(addr_list[i], mac_addr);
327 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mac_list);
329 int mlx5_modify_nic_vport_mac_list(struct mlx5_core_dev *dev,
330 enum mlx5_list_type list_type,
331 u8 addr_list[][ETH_ALEN],
334 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
342 max_list_size = list_type == MLX5_NVPRT_LIST_TYPE_UC ?
343 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list) :
344 1 << MLX5_CAP_GEN(dev, log_max_current_mc_list);
346 if (list_size > max_list_size)
349 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
350 list_size * MLX5_ST_SZ_BYTES(mac_address_layout);
352 memset(out, 0, sizeof(out));
353 in = kzalloc(in_sz, GFP_KERNEL);
357 MLX5_SET(modify_nic_vport_context_in, in, opcode,
358 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
359 MLX5_SET(modify_nic_vport_context_in, in,
360 field_select.addresses_list, 1);
362 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
365 MLX5_SET(nic_vport_context, nic_vport_ctx,
366 allowed_list_type, list_type);
367 MLX5_SET(nic_vport_context, nic_vport_ctx,
368 allowed_list_size, list_size);
370 for (i = 0; i < list_size; i++) {
371 u8 *curr_mac = MLX5_ADDR_OF(nic_vport_context,
373 current_uc_mac_address[i]) + 2;
374 ether_addr_copy(curr_mac, addr_list[i]);
377 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
381 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_list);
383 int mlx5_modify_nic_vport_vlans(struct mlx5_core_dev *dev,
387 u32 out[MLX5_ST_SZ_DW(modify_nic_vport_context_out)];
395 max_list_size = 1 << MLX5_CAP_GEN(dev, log_max_vlan_list);
397 if (list_size > max_list_size)
400 in_sz = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in) +
401 list_size * MLX5_ST_SZ_BYTES(vlan_layout);
403 memset(out, 0, sizeof(out));
404 in = kzalloc(in_sz, GFP_KERNEL);
408 MLX5_SET(modify_nic_vport_context_in, in, opcode,
409 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
410 MLX5_SET(modify_nic_vport_context_in, in,
411 field_select.addresses_list, 1);
413 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in, in,
416 MLX5_SET(nic_vport_context, nic_vport_ctx,
417 allowed_list_type, MLX5_NVPRT_LIST_TYPE_VLAN);
418 MLX5_SET(nic_vport_context, nic_vport_ctx,
419 allowed_list_size, list_size);
421 for (i = 0; i < list_size; i++) {
422 void *vlan_addr = MLX5_ADDR_OF(nic_vport_context,
424 current_uc_mac_address[i]);
425 MLX5_SET(vlan_layout, vlan_addr, vlan, vlans[i]);
428 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
432 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_vlans);
434 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
435 u64 *system_image_guid)
438 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
440 out = kvzalloc(outlen, GFP_KERNEL);
444 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
446 *system_image_guid = MLX5_GET64(query_nic_vport_context_out, out,
447 nic_vport_context.system_image_guid);
453 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
455 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
458 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
460 out = kvzalloc(outlen, GFP_KERNEL);
464 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
466 *node_guid = MLX5_GET64(query_nic_vport_context_out, out,
467 nic_vport_context.node_guid);
473 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
475 int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
476 u16 vport, u64 node_guid)
478 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
479 void *nic_vport_context;
485 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
488 in = kvzalloc(inlen, GFP_KERNEL);
492 MLX5_SET(modify_nic_vport_context_in, in,
493 field_select.node_guid, 1);
494 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
495 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
497 nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
498 in, nic_vport_context);
499 MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
501 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
508 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
512 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
514 out = kvzalloc(outlen, GFP_KERNEL);
518 mlx5_query_nic_vport_context(mdev, 0, out, outlen);
520 *qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,
521 nic_vport_context.qkey_violation_counter);
527 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);
529 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,
530 u8 port_num, u16 vf_num, u16 gid_index,
533 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_in);
534 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
535 int is_group_manager;
543 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
544 tbsz = mlx5_get_gid_table_len(MLX5_CAP_GEN(dev, gid_table_size));
545 mlx5_core_dbg(dev, "vf_num %d, index %d, gid_table_size %d\n",
546 vf_num, gid_index, tbsz);
548 if (gid_index > tbsz && gid_index != 0xffff)
551 if (gid_index == 0xffff)
556 out_sz += nout * sizeof(*gid);
558 in = kzalloc(in_sz, GFP_KERNEL);
559 out = kzalloc(out_sz, GFP_KERNEL);
565 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID);
567 if (is_group_manager) {
568 MLX5_SET(query_hca_vport_gid_in, in, vport_number, vf_num);
569 MLX5_SET(query_hca_vport_gid_in, in, other_vport, 1);
575 MLX5_SET(query_hca_vport_gid_in, in, gid_index, gid_index);
577 if (MLX5_CAP_GEN(dev, num_ports) == 2)
578 MLX5_SET(query_hca_vport_gid_in, in, port_num, port_num);
580 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
584 tmp = out + MLX5_ST_SZ_BYTES(query_hca_vport_gid_out);
585 gid->global.subnet_prefix = tmp->global.subnet_prefix;
586 gid->global.interface_id = tmp->global.interface_id;
593 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_gid);
595 int mlx5_query_hca_vport_pkey(struct mlx5_core_dev *dev, u8 other_vport,
596 u8 port_num, u16 vf_num, u16 pkey_index,
599 int in_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_in);
600 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_pkey_out);
601 int is_group_manager;
610 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
612 tbsz = mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(dev, pkey_table_size));
613 if (pkey_index > tbsz && pkey_index != 0xffff)
616 if (pkey_index == 0xffff)
621 out_sz += nout * MLX5_ST_SZ_BYTES(pkey);
623 in = kzalloc(in_sz, GFP_KERNEL);
624 out = kzalloc(out_sz, GFP_KERNEL);
630 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY);
632 if (is_group_manager) {
633 MLX5_SET(query_hca_vport_pkey_in, in, vport_number, vf_num);
634 MLX5_SET(query_hca_vport_pkey_in, in, other_vport, 1);
640 MLX5_SET(query_hca_vport_pkey_in, in, pkey_index, pkey_index);
642 if (MLX5_CAP_GEN(dev, num_ports) == 2)
643 MLX5_SET(query_hca_vport_pkey_in, in, port_num, port_num);
645 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
649 pkarr = MLX5_ADDR_OF(query_hca_vport_pkey_out, out, pkey);
650 for (i = 0; i < nout; i++, pkey++, pkarr += MLX5_ST_SZ_BYTES(pkey))
651 *pkey = MLX5_GET_PR(pkey, pkarr, pkey);
658 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_pkey);
660 int mlx5_query_hca_vport_context(struct mlx5_core_dev *dev,
661 u8 other_vport, u8 port_num,
663 struct mlx5_hca_vport_context *rep)
665 int out_sz = MLX5_ST_SZ_BYTES(query_hca_vport_context_out);
666 int in[MLX5_ST_SZ_DW(query_hca_vport_context_in)] = {0};
667 int is_group_manager;
672 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
674 out = kzalloc(out_sz, GFP_KERNEL);
678 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT);
681 if (is_group_manager) {
682 MLX5_SET(query_hca_vport_context_in, in, other_vport, 1);
683 MLX5_SET(query_hca_vport_context_in, in, vport_number, vf_num);
690 if (MLX5_CAP_GEN(dev, num_ports) == 2)
691 MLX5_SET(query_hca_vport_context_in, in, port_num, port_num);
693 err = mlx5_cmd_exec(dev, in, sizeof(in), out, out_sz);
697 ctx = MLX5_ADDR_OF(query_hca_vport_context_out, out, hca_vport_context);
698 rep->field_select = MLX5_GET_PR(hca_vport_context, ctx, field_select);
699 rep->sm_virt_aware = MLX5_GET_PR(hca_vport_context, ctx, sm_virt_aware);
700 rep->has_smi = MLX5_GET_PR(hca_vport_context, ctx, has_smi);
701 rep->has_raw = MLX5_GET_PR(hca_vport_context, ctx, has_raw);
702 rep->policy = MLX5_GET_PR(hca_vport_context, ctx, vport_state_policy);
703 rep->phys_state = MLX5_GET_PR(hca_vport_context, ctx,
704 port_physical_state);
705 rep->vport_state = MLX5_GET_PR(hca_vport_context, ctx, vport_state);
706 rep->port_physical_state = MLX5_GET_PR(hca_vport_context, ctx,
707 port_physical_state);
708 rep->port_guid = MLX5_GET64_PR(hca_vport_context, ctx, port_guid);
709 rep->node_guid = MLX5_GET64_PR(hca_vport_context, ctx, node_guid);
710 rep->cap_mask1 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask1);
711 rep->cap_mask1_perm = MLX5_GET_PR(hca_vport_context, ctx,
712 cap_mask1_field_select);
713 rep->cap_mask2 = MLX5_GET_PR(hca_vport_context, ctx, cap_mask2);
714 rep->cap_mask2_perm = MLX5_GET_PR(hca_vport_context, ctx,
715 cap_mask2_field_select);
716 rep->lid = MLX5_GET_PR(hca_vport_context, ctx, lid);
717 rep->init_type_reply = MLX5_GET_PR(hca_vport_context, ctx,
719 rep->lmc = MLX5_GET_PR(hca_vport_context, ctx, lmc);
720 rep->subnet_timeout = MLX5_GET_PR(hca_vport_context, ctx,
722 rep->sm_lid = MLX5_GET_PR(hca_vport_context, ctx, sm_lid);
723 rep->sm_sl = MLX5_GET_PR(hca_vport_context, ctx, sm_sl);
724 rep->qkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
725 qkey_violation_counter);
726 rep->pkey_violation_counter = MLX5_GET_PR(hca_vport_context, ctx,
727 pkey_violation_counter);
728 rep->grh_required = MLX5_GET_PR(hca_vport_context, ctx, grh_required);
729 rep->sys_image_guid = MLX5_GET64_PR(hca_vport_context, ctx,
736 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_context);
738 int mlx5_query_hca_vport_system_image_guid(struct mlx5_core_dev *dev,
741 struct mlx5_hca_vport_context *rep;
744 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
748 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
750 *sys_image_guid = rep->sys_image_guid;
755 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_system_image_guid);
757 int mlx5_query_hca_vport_node_guid(struct mlx5_core_dev *dev,
760 struct mlx5_hca_vport_context *rep;
763 rep = kzalloc(sizeof(*rep), GFP_KERNEL);
767 err = mlx5_query_hca_vport_context(dev, 0, 1, 0, rep);
769 *node_guid = rep->node_guid;
774 EXPORT_SYMBOL_GPL(mlx5_query_hca_vport_node_guid);
776 int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,
783 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
786 out = kzalloc(outlen, GFP_KERNEL);
790 err = mlx5_query_nic_vport_context(mdev, vport, out, outlen);
794 *promisc_uc = MLX5_GET(query_nic_vport_context_out, out,
795 nic_vport_context.promisc_uc);
796 *promisc_mc = MLX5_GET(query_nic_vport_context_out, out,
797 nic_vport_context.promisc_mc);
798 *promisc_all = MLX5_GET(query_nic_vport_context_out, out,
799 nic_vport_context.promisc_all);
805 EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_promisc);
807 int mlx5_modify_nic_vport_promisc(struct mlx5_core_dev *mdev,
813 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
816 in = kvzalloc(inlen, GFP_KERNEL);
820 MLX5_SET(modify_nic_vport_context_in, in, field_select.promisc, 1);
821 MLX5_SET(modify_nic_vport_context_in, in,
822 nic_vport_context.promisc_uc, promisc_uc);
823 MLX5_SET(modify_nic_vport_context_in, in,
824 nic_vport_context.promisc_mc, promisc_mc);
825 MLX5_SET(modify_nic_vport_context_in, in,
826 nic_vport_context.promisc_all, promisc_all);
828 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
834 EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_promisc);
841 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable)
843 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
847 if (!MLX5_CAP_GEN(mdev, disable_local_lb_mc) &&
848 !MLX5_CAP_GEN(mdev, disable_local_lb_uc))
851 in = kvzalloc(inlen, GFP_KERNEL);
855 MLX5_SET(modify_nic_vport_context_in, in,
856 nic_vport_context.disable_mc_local_lb, !enable);
857 MLX5_SET(modify_nic_vport_context_in, in,
858 nic_vport_context.disable_uc_local_lb, !enable);
860 if (MLX5_CAP_GEN(mdev, disable_local_lb_mc))
861 MLX5_SET(modify_nic_vport_context_in, in,
862 field_select.disable_mc_local_lb, 1);
864 if (MLX5_CAP_GEN(mdev, disable_local_lb_uc))
865 MLX5_SET(modify_nic_vport_context_in, in,
866 field_select.disable_uc_local_lb, 1);
868 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
871 mlx5_core_dbg(mdev, "%s local_lb\n",
872 enable ? "enable" : "disable");
877 EXPORT_SYMBOL_GPL(mlx5_nic_vport_update_local_lb);
879 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev, bool *status)
881 int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
886 out = kzalloc(outlen, GFP_KERNEL);
890 err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
894 value = MLX5_GET(query_nic_vport_context_out, out,
895 nic_vport_context.disable_mc_local_lb) << MC_LOCAL_LB;
897 value |= MLX5_GET(query_nic_vport_context_out, out,
898 nic_vport_context.disable_uc_local_lb) << UC_LOCAL_LB;
906 EXPORT_SYMBOL_GPL(mlx5_nic_vport_query_local_lb);
908 enum mlx5_vport_roce_state {
909 MLX5_VPORT_ROCE_DISABLED = 0,
910 MLX5_VPORT_ROCE_ENABLED = 1,
913 static int mlx5_nic_vport_update_roce_state(struct mlx5_core_dev *mdev,
914 enum mlx5_vport_roce_state state)
917 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
920 in = kvzalloc(inlen, GFP_KERNEL);
924 MLX5_SET(modify_nic_vport_context_in, in, field_select.roce_en, 1);
925 MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.roce_en,
928 err = mlx5_modify_nic_vport_context(mdev, in, inlen);
935 int mlx5_nic_vport_enable_roce(struct mlx5_core_dev *mdev)
939 mutex_lock(&mlx5_roce_en_lock);
940 if (!mdev->roce.roce_en)
941 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_ENABLED);
944 mdev->roce.roce_en++;
945 mutex_unlock(&mlx5_roce_en_lock);
949 EXPORT_SYMBOL_GPL(mlx5_nic_vport_enable_roce);
951 int mlx5_nic_vport_disable_roce(struct mlx5_core_dev *mdev)
955 mutex_lock(&mlx5_roce_en_lock);
956 if (mdev->roce.roce_en) {
957 mdev->roce.roce_en--;
958 if (mdev->roce.roce_en == 0)
959 err = mlx5_nic_vport_update_roce_state(mdev, MLX5_VPORT_ROCE_DISABLED);
962 mdev->roce.roce_en++;
964 mutex_unlock(&mlx5_roce_en_lock);
967 EXPORT_SYMBOL_GPL(mlx5_nic_vport_disable_roce);
969 int mlx5_core_query_vport_counter(struct mlx5_core_dev *dev, u8 other_vport,
970 int vf, u8 port_num, void *out,
973 int in_sz = MLX5_ST_SZ_BYTES(query_vport_counter_in);
974 int is_group_manager;
978 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
979 in = kvzalloc(in_sz, GFP_KERNEL);
985 MLX5_SET(query_vport_counter_in, in, opcode,
986 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
988 if (is_group_manager) {
989 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
990 MLX5_SET(query_vport_counter_in, in, vport_number, vf + 1);
996 if (MLX5_CAP_GEN(dev, num_ports) == 2)
997 MLX5_SET(query_vport_counter_in, in, port_num, port_num);
999 err = mlx5_cmd_exec(dev, in, in_sz, out, out_sz);
1004 EXPORT_SYMBOL_GPL(mlx5_core_query_vport_counter);
1006 int mlx5_query_vport_down_stats(struct mlx5_core_dev *mdev, u16 vport,
1007 u8 other_vport, u64 *rx_discard_vport_down,
1008 u64 *tx_discard_vport_down)
1010 u32 out[MLX5_ST_SZ_DW(query_vnic_env_out)] = {0};
1011 u32 in[MLX5_ST_SZ_DW(query_vnic_env_in)] = {0};
1014 MLX5_SET(query_vnic_env_in, in, opcode,
1015 MLX5_CMD_OP_QUERY_VNIC_ENV);
1016 MLX5_SET(query_vnic_env_in, in, op_mod, 0);
1017 MLX5_SET(query_vnic_env_in, in, vport_number, vport);
1018 MLX5_SET(query_vnic_env_in, in, other_vport, other_vport);
1020 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));
1024 *rx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1025 vport_env.receive_discard_vport_down);
1026 *tx_discard_vport_down = MLX5_GET64(query_vnic_env_out, out,
1027 vport_env.transmit_discard_vport_down);
1031 int mlx5_core_modify_hca_vport_context(struct mlx5_core_dev *dev,
1032 u8 other_vport, u8 port_num,
1034 struct mlx5_hca_vport_context *req)
1036 int in_sz = MLX5_ST_SZ_BYTES(modify_hca_vport_context_in);
1037 u8 out[MLX5_ST_SZ_BYTES(modify_hca_vport_context_out)];
1038 int is_group_manager;
1043 mlx5_core_dbg(dev, "vf %d\n", vf);
1044 is_group_manager = MLX5_CAP_GEN(dev, vport_group_manager);
1045 in = kzalloc(in_sz, GFP_KERNEL);
1049 memset(out, 0, sizeof(out));
1050 MLX5_SET(modify_hca_vport_context_in, in, opcode, MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT);
1052 if (is_group_manager) {
1053 MLX5_SET(modify_hca_vport_context_in, in, other_vport, 1);
1054 MLX5_SET(modify_hca_vport_context_in, in, vport_number, vf);
1061 if (MLX5_CAP_GEN(dev, num_ports) > 1)
1062 MLX5_SET(modify_hca_vport_context_in, in, port_num, port_num);
1064 ctx = MLX5_ADDR_OF(modify_hca_vport_context_in, in, hca_vport_context);
1065 MLX5_SET(hca_vport_context, ctx, field_select, req->field_select);
1066 MLX5_SET(hca_vport_context, ctx, sm_virt_aware, req->sm_virt_aware);
1067 MLX5_SET(hca_vport_context, ctx, has_smi, req->has_smi);
1068 MLX5_SET(hca_vport_context, ctx, has_raw, req->has_raw);
1069 MLX5_SET(hca_vport_context, ctx, vport_state_policy, req->policy);
1070 MLX5_SET(hca_vport_context, ctx, port_physical_state, req->phys_state);
1071 MLX5_SET(hca_vport_context, ctx, vport_state, req->vport_state);
1072 MLX5_SET64(hca_vport_context, ctx, port_guid, req->port_guid);
1073 MLX5_SET64(hca_vport_context, ctx, node_guid, req->node_guid);
1074 MLX5_SET(hca_vport_context, ctx, cap_mask1, req->cap_mask1);
1075 MLX5_SET(hca_vport_context, ctx, cap_mask1_field_select, req->cap_mask1_perm);
1076 MLX5_SET(hca_vport_context, ctx, cap_mask2, req->cap_mask2);
1077 MLX5_SET(hca_vport_context, ctx, cap_mask2_field_select, req->cap_mask2_perm);
1078 MLX5_SET(hca_vport_context, ctx, lid, req->lid);
1079 MLX5_SET(hca_vport_context, ctx, init_type_reply, req->init_type_reply);
1080 MLX5_SET(hca_vport_context, ctx, lmc, req->lmc);
1081 MLX5_SET(hca_vport_context, ctx, subnet_timeout, req->subnet_timeout);
1082 MLX5_SET(hca_vport_context, ctx, sm_lid, req->sm_lid);
1083 MLX5_SET(hca_vport_context, ctx, sm_sl, req->sm_sl);
1084 MLX5_SET(hca_vport_context, ctx, qkey_violation_counter, req->qkey_violation_counter);
1085 MLX5_SET(hca_vport_context, ctx, pkey_violation_counter, req->pkey_violation_counter);
1086 err = mlx5_cmd_exec(dev, in, in_sz, out, sizeof(out));
1091 EXPORT_SYMBOL_GPL(mlx5_core_modify_hca_vport_context);
1093 int mlx5_nic_vport_affiliate_multiport(struct mlx5_core_dev *master_mdev,
1094 struct mlx5_core_dev *port_mdev)
1096 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1100 in = kvzalloc(inlen, GFP_KERNEL);
1104 err = mlx5_nic_vport_enable_roce(port_mdev);
1108 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1109 MLX5_SET(modify_nic_vport_context_in, in,
1110 nic_vport_context.affiliated_vhca_id,
1111 MLX5_CAP_GEN(master_mdev, vhca_id));
1112 MLX5_SET(modify_nic_vport_context_in, in,
1113 nic_vport_context.affiliation_criteria,
1114 MLX5_CAP_GEN(port_mdev, affiliate_nic_vport_criteria));
1116 err = mlx5_modify_nic_vport_context(port_mdev, in, inlen);
1118 mlx5_nic_vport_disable_roce(port_mdev);
1124 EXPORT_SYMBOL_GPL(mlx5_nic_vport_affiliate_multiport);
1126 int mlx5_nic_vport_unaffiliate_multiport(struct mlx5_core_dev *port_mdev)
1128 int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
1132 in = kvzalloc(inlen, GFP_KERNEL);
1136 MLX5_SET(modify_nic_vport_context_in, in, field_select.affiliation, 1);
1137 MLX5_SET(modify_nic_vport_context_in, in,
1138 nic_vport_context.affiliated_vhca_id, 0);
1139 MLX5_SET(modify_nic_vport_context_in, in,
1140 nic_vport_context.affiliation_criteria, 0);
1142 err = mlx5_modify_nic_vport_context(port_mdev, in, inlen);
1144 mlx5_nic_vport_disable_roce(port_mdev);
1149 EXPORT_SYMBOL_GPL(mlx5_nic_vport_unaffiliate_multiport);
1151 u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev)
1153 int port_type_cap = MLX5_CAP_GEN(mdev, port_type);
1156 if (mdev->sys_image_guid)
1157 return mdev->sys_image_guid;
1159 if (port_type_cap == MLX5_CAP_PORT_TYPE_ETH)
1160 mlx5_query_nic_vport_system_image_guid(mdev, &tmp);
1162 mlx5_query_hca_vport_system_image_guid(mdev, &tmp);
1164 mdev->sys_image_guid = tmp;
1168 EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid);
1171 * mlx5_eswitch_get_total_vports - Get total vports of the eswitch
1173 * @dev: Pointer to core device
1175 * mlx5_eswitch_get_total_vports returns total number of vports for
1178 u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
1180 return MLX5_SPECIAL_VPORTS(dev) + mlx5_core_max_vfs(dev);
1182 EXPORT_SYMBOL(mlx5_eswitch_get_total_vports);