2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #ifdef CONFIG_MLX5_FPGA_IPSEC
36 #include <linux/mlx5/device.h>
38 #include "accel/ipsec.h"
39 #include "mlx5_core.h"
40 #include "fpga/ipsec.h"
42 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev)
44 return mlx5_fpga_ipsec_device_caps(mdev);
46 EXPORT_SYMBOL_GPL(mlx5_accel_ipsec_device_caps);
48 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev)
50 return mlx5_fpga_ipsec_counters_count(mdev);
53 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
56 return mlx5_fpga_ipsec_counters_read(mdev, counters, count);
59 void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
60 struct mlx5_accel_esp_xfrm *xfrm,
61 const __be32 saddr[4],
62 const __be32 daddr[4],
63 const __be32 spi, bool is_ipv6)
65 return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr, daddr,
69 void mlx5_accel_esp_free_hw_context(void *context)
71 mlx5_fpga_ipsec_delete_sa_ctx(context);
74 int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
76 return mlx5_fpga_ipsec_init(mdev);
79 void mlx5_accel_ipsec_build_fs_cmds(void)
81 mlx5_fpga_ipsec_build_fs_cmds();
84 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
86 mlx5_fpga_ipsec_cleanup(mdev);
89 struct mlx5_accel_esp_xfrm *
90 mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
91 const struct mlx5_accel_esp_xfrm_attrs *attrs,
94 struct mlx5_accel_esp_xfrm *xfrm;
96 xfrm = mlx5_fpga_esp_create_xfrm(mdev, attrs, flags);
103 EXPORT_SYMBOL_GPL(mlx5_accel_esp_create_xfrm);
105 void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
107 mlx5_fpga_esp_destroy_xfrm(xfrm);
109 EXPORT_SYMBOL_GPL(mlx5_accel_esp_destroy_xfrm);
111 int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
112 const struct mlx5_accel_esp_xfrm_attrs *attrs)
114 return mlx5_fpga_esp_modify_xfrm(xfrm, attrs);
116 EXPORT_SYMBOL_GPL(mlx5_accel_esp_modify_xfrm);