drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/pm_runtime.h>
  34 #include <linux/etherdevice.h>
  35 #ifdef CONFIG_IGB_DCA
  36 #include <linux/dca.h>
  37 #endif
  38 #include <linux/i2c.h>
  39 #include "igb.h"
  40
  41 #define MAJ 5
  42 #define MIN 6
  43 #define BUILD 0
  44 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  45 __stringify(BUILD) "-k"
  46
  47 enum queue_mode {
  48         QUEUE_MODE_STRICT_PRIORITY,
  49         QUEUE_MODE_STREAM_RESERVATION,
  50 };
  51
  52 enum tx_queue_prio {
  53         TX_QUEUE_PRIO_HIGH,
  54         TX_QUEUE_PRIO_LOW,
  55 };
  56
  57 char igb_driver_name[] = "igb";
  58 char igb_driver_version[] = DRV_VERSION;
  59 static const char igb_driver_string[] =
  60                                 "Intel(R) Gigabit Ethernet Network Driver";
  61 static const char igb_copyright[] =
  62                                 "Copyright (c) 2007-2014 Intel Corporation.";
  63
  64 static const struct e1000_info *igb_info_tbl[] = {
  65         [board_82575] = &e1000_82575_info,
  66 };
  67
  68 static const struct pci_device_id igb_pci_tbl[] = {
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 104         /* required last entry */
 105         {0, }
 106 };
 107
 108 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 109
 110 static int igb_setup_all_tx_resources(struct igb_adapter *);
 111 static int igb_setup_all_rx_resources(struct igb_adapter *);
 112 static void igb_free_all_tx_resources(struct igb_adapter *);
 113 static void igb_free_all_rx_resources(struct igb_adapter *);
 114 static void igb_setup_mrqc(struct igb_adapter *);
 115 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 116 static void igb_remove(struct pci_dev *pdev);
 117 static int igb_sw_init(struct igb_adapter *);
 118 int igb_open(struct net_device *);
 119 int igb_close(struct net_device *);
 120 static void igb_configure(struct igb_adapter *);
 121 static void igb_configure_tx(struct igb_adapter *);
 122 static void igb_configure_rx(struct igb_adapter *);
 123 static void igb_clean_all_tx_rings(struct igb_adapter *);
 124 static void igb_clean_all_rx_rings(struct igb_adapter *);
 125 static void igb_clean_tx_ring(struct igb_ring *);
 126 static void igb_clean_rx_ring(struct igb_ring *);
 127 static void igb_set_rx_mode(struct net_device *);
 128 static void igb_update_phy_info(struct timer_list *);
 129 static void igb_watchdog(struct timer_list *);
 130 static void igb_watchdog_task(struct work_struct *);
 131 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 132 static void igb_get_stats64(struct net_device *dev,
 133                             struct rtnl_link_stats64 *stats);
 134 static int igb_change_mtu(struct net_device *, int);
 135 static int igb_set_mac(struct net_device *, void *);
 136 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 137 static irqreturn_t igb_intr(int irq, void *);
 138 static irqreturn_t igb_intr_msi(int irq, void *);
 139 static irqreturn_t igb_msix_other(int irq, void *);
 140 static irqreturn_t igb_msix_ring(int irq, void *);
 141 #ifdef CONFIG_IGB_DCA
 142 static void igb_update_dca(struct igb_q_vector *);
 143 static void igb_setup_dca(struct igb_adapter *);
 144 #endif /* CONFIG_IGB_DCA */
 145 static int igb_poll(struct napi_struct *, int);
 146 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 147 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 148 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 149 static void igb_tx_timeout(struct net_device *);
 150 static void igb_reset_task(struct work_struct *);
 151 static void igb_vlan_mode(struct net_device *netdev,
 152                           netdev_features_t features);
 153 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 154 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 155 static void igb_restore_vlan(struct igb_adapter *);
 156 static void igb_rar_set_index(struct igb_adapter *, u32);
 157 static void igb_ping_all_vfs(struct igb_adapter *);
 158 static void igb_msg_task(struct igb_adapter *);
 159 static void igb_vmm_control(struct igb_adapter *);
 160 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 161 static void igb_flush_mac_table(struct igb_adapter *);
 162 static int igb_available_rars(struct igb_adapter *, u8);
 163 static void igb_set_default_mac_filter(struct igb_adapter *);
 164 static int igb_uc_sync(struct net_device *, const unsigned char *);
 165 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 166 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 167 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 168 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 169                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 170 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 171 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 172                                    bool setting);
 173 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 174                                 bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 179 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 180
 181 #ifdef CONFIG_PCI_IOV
 182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 183 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 184 static int igb_disable_sriov(struct pci_dev *dev);
 185 static int igb_pci_disable_sriov(struct pci_dev *dev);
 186 #endif
 187
 188 static int igb_suspend(struct device *);
 189 static int igb_resume(struct device *);
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 static const struct dev_pm_ops igb_pm_ops = {
 194         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 195         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 196                         igb_runtime_idle)
 197 };
 198 static void igb_shutdown(struct pci_dev *);
 199 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 200 #ifdef CONFIG_IGB_DCA
 201 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 202 static struct notifier_block dca_notifier = {
 203         .notifier_call  = igb_notify_dca,
 204         .next           = NULL,
 205         .priority       = 0
 206 };
 207 #endif
 208 #ifdef CONFIG_PCI_IOV
 209 static unsigned int max_vfs;
 210 module_param(max_vfs, uint, 0);
 211 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 212 #endif /* CONFIG_PCI_IOV */
 213
 214 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 215                      pci_channel_state_t);
 216 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 217 static void igb_io_resume(struct pci_dev *);
 218
 219 static const struct pci_error_handlers igb_err_handler = {
 220         .error_detected = igb_io_error_detected,
 221         .slot_reset = igb_io_slot_reset,
 222         .resume = igb_io_resume,
 223 };
 224
 225 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 226
 227 static struct pci_driver igb_driver = {
 228         .name     = igb_driver_name,
 229         .id_table = igb_pci_tbl,
 230         .probe    = igb_probe,
 231         .remove   = igb_remove,
 232 #ifdef CONFIG_PM
 233         .driver.pm = &igb_pm_ops,
 234 #endif
 235         .shutdown = igb_shutdown,
 236         .sriov_configure = igb_pci_sriov_configure,
 237         .err_handler = &igb_err_handler
 238 };
 239
 240 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 241 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 242 MODULE_LICENSE("GPL v2");
 243 MODULE_VERSION(DRV_VERSION);
 244
 245 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 246 static int debug = -1;
 247 module_param(debug, int, 0);
 248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 249
 250 struct igb_reg_info {
 251         u32 ofs;
 252         char *name;
 253 };
 254
 255 static const struct igb_reg_info igb_reg_info_tbl[] = {
 256
 257         /* General Registers */
 258         {E1000_CTRL, "CTRL"},
 259         {E1000_STATUS, "STATUS"},
 260         {E1000_CTRL_EXT, "CTRL_EXT"},
 261
 262         /* Interrupt Registers */
 263         {E1000_ICR, "ICR"},
 264
 265         /* RX Registers */
 266         {E1000_RCTL, "RCTL"},
 267         {E1000_RDLEN(0), "RDLEN"},
 268         {E1000_RDH(0), "RDH"},
 269         {E1000_RDT(0), "RDT"},
 270         {E1000_RXDCTL(0), "RXDCTL"},
 271         {E1000_RDBAL(0), "RDBAL"},
 272         {E1000_RDBAH(0), "RDBAH"},
 273
 274         /* TX Registers */
 275         {E1000_TCTL, "TCTL"},
 276         {E1000_TDBAL(0), "TDBAL"},
 277         {E1000_TDBAH(0), "TDBAH"},
 278         {E1000_TDLEN(0), "TDLEN"},
 279         {E1000_TDH(0), "TDH"},
 280         {E1000_TDT(0), "TDT"},
 281         {E1000_TXDCTL(0), "TXDCTL"},
 282         {E1000_TDFH, "TDFH"},
 283         {E1000_TDFT, "TDFT"},
 284         {E1000_TDFHS, "TDFHS"},
 285         {E1000_TDFPC, "TDFPC"},
 286
 287         /* List Terminator */
 288         {}
 289 };
 290
 291 /* igb_regdump - register printout routine */
 292 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 293 {
 294         int n = 0;
 295         char rname[16];
 296         u32 regs[8];
 297
 298         switch (reginfo->ofs) {
 299         case E1000_RDLEN(0):
 300                 for (n = 0; n < 4; n++)
 301                         regs[n] = rd32(E1000_RDLEN(n));
 302                 break;
 303         case E1000_RDH(0):
 304                 for (n = 0; n < 4; n++)
 305                         regs[n] = rd32(E1000_RDH(n));
 306                 break;
 307         case E1000_RDT(0):
 308                 for (n = 0; n < 4; n++)
 309                         regs[n] = rd32(E1000_RDT(n));
 310                 break;
 311         case E1000_RXDCTL(0):
 312                 for (n = 0; n < 4; n++)
 313                         regs[n] = rd32(E1000_RXDCTL(n));
 314                 break;
 315         case E1000_RDBAL(0):
 316                 for (n = 0; n < 4; n++)
 317                         regs[n] = rd32(E1000_RDBAL(n));
 318                 break;
 319         case E1000_RDBAH(0):
 320                 for (n = 0; n < 4; n++)
 321                         regs[n] = rd32(E1000_RDBAH(n));
 322                 break;
 323         case E1000_TDBAL(0):
 324                 for (n = 0; n < 4; n++)
 325                         regs[n] = rd32(E1000_RDBAL(n));
 326                 break;
 327         case E1000_TDBAH(0):
 328                 for (n = 0; n < 4; n++)
 329                         regs[n] = rd32(E1000_TDBAH(n));
 330                 break;
 331         case E1000_TDLEN(0):
 332                 for (n = 0; n < 4; n++)
 333                         regs[n] = rd32(E1000_TDLEN(n));
 334                 break;
 335         case E1000_TDH(0):
 336                 for (n = 0; n < 4; n++)
 337                         regs[n] = rd32(E1000_TDH(n));
 338                 break;
 339         case E1000_TDT(0):
 340                 for (n = 0; n < 4; n++)
 341                         regs[n] = rd32(E1000_TDT(n));
 342                 break;
 343         case E1000_TXDCTL(0):
 344                 for (n = 0; n < 4; n++)
 345                         regs[n] = rd32(E1000_TXDCTL(n));
 346                 break;
 347         default:
 348                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 349                 return;
 350         }
 351
 352         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 353         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 354                 regs[2], regs[3]);
 355 }
 356
 357 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 358 static void igb_dump(struct igb_adapter *adapter)
 359 {
 360         struct net_device *netdev = adapter->netdev;
 361         struct e1000_hw *hw = &adapter->hw;
 362         struct igb_reg_info *reginfo;
 363         struct igb_ring *tx_ring;
 364         union e1000_adv_tx_desc *tx_desc;
 365         struct my_u0 { u64 a; u64 b; } *u0;
 366         struct igb_ring *rx_ring;
 367         union e1000_adv_rx_desc *rx_desc;
 368         u32 staterr;
 369         u16 i, n;
 370
 371         if (!netif_msg_hw(adapter))
 372                 return;
 373
 374         /* Print netdevice Info */
 375         if (netdev) {
 376                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 377                 pr_info("Device Name     state            trans_start\n");
 378                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 379                         netdev->state, dev_trans_start(netdev));
 380         }
 381
 382         /* Print Registers */
 383         dev_info(&adapter->pdev->dev, "Register Dump\n");
 384         pr_info(" Register Name   Value\n");
 385         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 386              reginfo->name; reginfo++) {
 387                 igb_regdump(hw, reginfo);
 388         }
 389
 390         /* Print TX Ring Summary */
 391         if (!netdev || !netif_running(netdev))
 392                 goto exit;
 393
 394         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 395         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 396         for (n = 0; n < adapter->num_tx_queues; n++) {
 397                 struct igb_tx_buffer *buffer_info;
 398                 tx_ring = adapter->tx_ring[n];
 399                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 400                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 401                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 402                         (u64)dma_unmap_addr(buffer_info, dma),
 403                         dma_unmap_len(buffer_info, len),
 404                         buffer_info->next_to_watch,
 405                         (u64)buffer_info->time_stamp);
 406         }
 407
 408         /* Print TX Rings */
 409         if (!netif_msg_tx_done(adapter))
 410                 goto rx_ring_summary;
 411
 412         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 413
 414         /* Transmit Descriptor Formats
 415          *
 416          * Advanced Transmit Descriptor
 417          *   +--------------------------------------------------------------+
 418          * 0 |         Buffer Address [63:0]                                |
 419          *   +--------------------------------------------------------------+
 420          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 421          *   +--------------------------------------------------------------+
 422          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 423          */
 424
 425         for (n = 0; n < adapter->num_tx_queues; n++) {
 426                 tx_ring = adapter->tx_ring[n];
 427                 pr_info("------------------------------------\n");
 428                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 429                 pr_info("------------------------------------\n");
 430                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 431
 432                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 433                         const char *next_desc;
 434                         struct igb_tx_buffer *buffer_info;
 435                         tx_desc = IGB_TX_DESC(tx_ring, i);
 436                         buffer_info = &tx_ring->tx_buffer_info[i];
 437                         u0 = (struct my_u0 *)tx_desc;
 438                         if (i == tx_ring->next_to_use &&
 439                             i == tx_ring->next_to_clean)
 440                                 next_desc = " NTC/U";
 441                         else if (i == tx_ring->next_to_use)
 442                                 next_desc = " NTU";
 443                         else if (i == tx_ring->next_to_clean)
 444                                 next_desc = " NTC";
 445                         else
 446                                 next_desc = "";
 447
 448                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 449                                 i, le64_to_cpu(u0->a),
 450                                 le64_to_cpu(u0->b),
 451                                 (u64)dma_unmap_addr(buffer_info, dma),
 452                                 dma_unmap_len(buffer_info, len),
 453                                 buffer_info->next_to_watch,
 454                                 (u64)buffer_info->time_stamp,
 455                                 buffer_info->skb, next_desc);
 456
 457                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 458                                 print_hex_dump(KERN_INFO, "",
 459                                         DUMP_PREFIX_ADDRESS,
 460                                         16, 1, buffer_info->skb->data,
 461                                         dma_unmap_len(buffer_info, len),
 462                                         true);
 463                 }
 464         }
 465
 466         /* Print RX Rings Summary */
 467 rx_ring_summary:
 468         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 469         pr_info("Queue [NTU] [NTC]\n");
 470         for (n = 0; n < adapter->num_rx_queues; n++) {
 471                 rx_ring = adapter->rx_ring[n];
 472                 pr_info(" %5d %5X %5X\n",
 473                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 474         }
 475
 476         /* Print RX Rings */
 477         if (!netif_msg_rx_status(adapter))
 478                 goto exit;
 479
 480         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 481
 482         /* Advanced Receive Descriptor (Read) Format
 483          *    63                                           1        0
 484          *    +-----------------------------------------------------+
 485          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 486          *    +----------------------------------------------+------+
 487          *  8 |       Header Buffer Address [63:1]           |  DD  |
 488          *    +-----------------------------------------------------+
 489          *
 490          *
 491          * Advanced Receive Descriptor (Write-Back) Format
 492          *
 493          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 494          *   +------------------------------------------------------+
 495          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 496          *   | Checksum   Ident  |   |           |    | Type | Type |
 497          *   +------------------------------------------------------+
 498          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 499          *   +------------------------------------------------------+
 500          *   63       48 47    32 31            20 19               0
 501          */
 502
 503         for (n = 0; n < adapter->num_rx_queues; n++) {
 504                 rx_ring = adapter->rx_ring[n];
 505                 pr_info("------------------------------------\n");
 506                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 507                 pr_info("------------------------------------\n");
 508                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 509                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 510
 511                 for (i = 0; i < rx_ring->count; i++) {
 512                         const char *next_desc;
 513                         struct igb_rx_buffer *buffer_info;
 514                         buffer_info = &rx_ring->rx_buffer_info[i];
 515                         rx_desc = IGB_RX_DESC(rx_ring, i);
 516                         u0 = (struct my_u0 *)rx_desc;
 517                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 518
 519                         if (i == rx_ring->next_to_use)
 520                                 next_desc = " NTU";
 521                         else if (i == rx_ring->next_to_clean)
 522                                 next_desc = " NTC";
 523                         else
 524                                 next_desc = "";
 525
 526                         if (staterr & E1000_RXD_STAT_DD) {
 527                                 /* Descriptor Done */
 528                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 529                                         "RWB", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         next_desc);
 533                         } else {
 534                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 535                                         "R  ", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         (u64)buffer_info->dma,
 539                                         next_desc);
 540
 541                                 if (netif_msg_pktdata(adapter) &&
 542                                     buffer_info->dma && buffer_info->page) {
 543                                         print_hex_dump(KERN_INFO, "",
 544                                           DUMP_PREFIX_ADDRESS,
 545                                           16, 1,
 546                                           page_address(buffer_info->page) +
 547                                                       buffer_info->page_offset,
 548                                           igb_rx_bufsz(rx_ring), true);
 549                                 }
 550                         }
 551                 }
 552         }
 553
 554 exit:
 555         return;
 556 }
 557
 558 /**
 559  *  igb_get_i2c_data - Reads the I2C SDA data bit
 560  *  @hw: pointer to hardware structure
 561  *  @i2cctl: Current value of I2CCTL register
 562  *
 563  *  Returns the I2C data bit value
 564  **/
 565 static int igb_get_i2c_data(void *data)
 566 {
 567         struct igb_adapter *adapter = (struct igb_adapter *)data;
 568         struct e1000_hw *hw = &adapter->hw;
 569         s32 i2cctl = rd32(E1000_I2CPARAMS);
 570
 571         return !!(i2cctl & E1000_I2C_DATA_IN);
 572 }
 573
 574 /**
 575  *  igb_set_i2c_data - Sets the I2C data bit
 576  *  @data: pointer to hardware structure
 577  *  @state: I2C data value (0 or 1) to set
 578  *
 579  *  Sets the I2C data bit
 580  **/
 581 static void igb_set_i2c_data(void *data, int state)
 582 {
 583         struct igb_adapter *adapter = (struct igb_adapter *)data;
 584         struct e1000_hw *hw = &adapter->hw;
 585         s32 i2cctl = rd32(E1000_I2CPARAMS);
 586
 587         if (state)
 588                 i2cctl |= E1000_I2C_DATA_OUT;
 589         else
 590                 i2cctl &= ~E1000_I2C_DATA_OUT;
 591
 592         i2cctl &= ~E1000_I2C_DATA_OE_N;
 593         i2cctl |= E1000_I2C_CLK_OE_N;
 594         wr32(E1000_I2CPARAMS, i2cctl);
 595         wrfl();
 596
 597 }
 598
 599 /**
 600  *  igb_set_i2c_clk - Sets the I2C SCL clock
 601  *  @data: pointer to hardware structure
 602  *  @state: state to set clock
 603  *
 604  *  Sets the I2C clock line to state
 605  **/
 606 static void igb_set_i2c_clk(void *data, int state)
 607 {
 608         struct igb_adapter *adapter = (struct igb_adapter *)data;
 609         struct e1000_hw *hw = &adapter->hw;
 610         s32 i2cctl = rd32(E1000_I2CPARAMS);
 611
 612         if (state) {
 613                 i2cctl |= E1000_I2C_CLK_OUT;
 614                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 615         } else {
 616                 i2cctl &= ~E1000_I2C_CLK_OUT;
 617                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 618         }
 619         wr32(E1000_I2CPARAMS, i2cctl);
 620         wrfl();
 621 }
 622
 623 /**
 624  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 625  *  @data: pointer to hardware structure
 626  *
 627  *  Gets the I2C clock state
 628  **/
 629 static int igb_get_i2c_clk(void *data)
 630 {
 631         struct igb_adapter *adapter = (struct igb_adapter *)data;
 632         struct e1000_hw *hw = &adapter->hw;
 633         s32 i2cctl = rd32(E1000_I2CPARAMS);
 634
 635         return !!(i2cctl & E1000_I2C_CLK_IN);
 636 }
 637
 638 static const struct i2c_algo_bit_data igb_i2c_algo = {
 639         .setsda         = igb_set_i2c_data,
 640         .setscl         = igb_set_i2c_clk,
 641         .getsda         = igb_get_i2c_data,
 642         .getscl         = igb_get_i2c_clk,
 643         .udelay         = 5,
 644         .timeout        = 20,
 645 };
 646
 647 /**
 648  *  igb_get_hw_dev - return device
 649  *  @hw: pointer to hardware structure
 650  *
 651  *  used by hardware layer to print debugging information
 652  **/
 653 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 654 {
 655         struct igb_adapter *adapter = hw->back;
 656         return adapter->netdev;
 657 }
 658
 659 /**
 660  *  igb_init_module - Driver Registration Routine
 661  *
 662  *  igb_init_module is the first routine called when the driver is
 663  *  loaded. All it does is register with the PCI subsystem.
 664  **/
 665 static int __init igb_init_module(void)
 666 {
 667         int ret;
 668
 669         pr_info("%s - version %s\n",
 670                igb_driver_string, igb_driver_version);
 671         pr_info("%s\n", igb_copyright);
 672
 673 #ifdef CONFIG_IGB_DCA
 674         dca_register_notify(&dca_notifier);
 675 #endif
 676         ret = pci_register_driver(&igb_driver);
 677         return ret;
 678 }
 679
 680 module_init(igb_init_module);
 681
 682 /**
 683  *  igb_exit_module - Driver Exit Cleanup Routine
 684  *
 685  *  igb_exit_module is called just before the driver is removed
 686  *  from memory.
 687  **/
 688 static void __exit igb_exit_module(void)
 689 {
 690 #ifdef CONFIG_IGB_DCA
 691         dca_unregister_notify(&dca_notifier);
 692 #endif
 693         pci_unregister_driver(&igb_driver);
 694 }
 695
 696 module_exit(igb_exit_module);
 697
 698 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 699 /**
 700  *  igb_cache_ring_register - Descriptor ring to register mapping
 701  *  @adapter: board private structure to initialize
 702  *
 703  *  Once we know the feature-set enabled for the device, we'll cache
 704  *  the register offset the descriptor ring is assigned to.
 705  **/
 706 static void igb_cache_ring_register(struct igb_adapter *adapter)
 707 {
 708         int i = 0, j = 0;
 709         u32 rbase_offset = adapter->vfs_allocated_count;
 710
 711         switch (adapter->hw.mac.type) {
 712         case e1000_82576:
 713                 /* The queues are allocated for virtualization such that VF 0
 714                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 715                  * In order to avoid collision we start at the first free queue
 716                  * and continue consuming queues in the same sequence
 717                  */
 718                 if (adapter->vfs_allocated_count) {
 719                         for (; i < adapter->rss_queues; i++)
 720                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 721                                                                Q_IDX_82576(i);
 722                 }
 723                 /* Fall through */
 724         case e1000_82575:
 725         case e1000_82580:
 726         case e1000_i350:
 727         case e1000_i354:
 728         case e1000_i210:
 729         case e1000_i211:
 730                 /* Fall through */
 731         default:
 732                 for (; i < adapter->num_rx_queues; i++)
 733                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 734                 for (; j < adapter->num_tx_queues; j++)
 735                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 736                 break;
 737         }
 738 }
 739
 740 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 741 {
 742         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 743         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 744         u32 value = 0;
 745
 746         if (E1000_REMOVED(hw_addr))
 747                 return ~value;
 748
 749         value = readl(&hw_addr[reg]);
 750
 751         /* reads should not return all F's */
 752         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 753                 struct net_device *netdev = igb->netdev;
 754                 hw->hw_addr = NULL;
 755                 netdev_err(netdev, "PCIe link lost\n");
 756                 WARN(1, "igb: Failed to read reg 0x%x!\n", reg);
 757         }
 758
 759         return value;
 760 }
 761
 762 /**
 763  *  igb_write_ivar - configure ivar for given MSI-X vector
 764  *  @hw: pointer to the HW structure
 765  *  @msix_vector: vector number we are allocating to a given ring
 766  *  @index: row index of IVAR register to write within IVAR table
 767  *  @offset: column offset of in IVAR, should be multiple of 8
 768  *
 769  *  This function is intended to handle the writing of the IVAR register
 770  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 771  *  each containing an cause allocation for an Rx and Tx ring, and a
 772  *  variable number of rows depending on the number of queues supported.
 773  **/
 774 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 775                            int index, int offset)
 776 {
 777         u32 ivar = array_rd32(E1000_IVAR0, index);
 778
 779         /* clear any bits that are currently set */
 780         ivar &= ~((u32)0xFF << offset);
 781
 782         /* write vector and valid bit */
 783         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 784
 785         array_wr32(E1000_IVAR0, index, ivar);
 786 }
 787
 788 #define IGB_N0_QUEUE -1
 789 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 790 {
 791         struct igb_adapter *adapter = q_vector->adapter;
 792         struct e1000_hw *hw = &adapter->hw;
 793         int rx_queue = IGB_N0_QUEUE;
 794         int tx_queue = IGB_N0_QUEUE;
 795         u32 msixbm = 0;
 796
 797         if (q_vector->rx.ring)
 798                 rx_queue = q_vector->rx.ring->reg_idx;
 799         if (q_vector->tx.ring)
 800                 tx_queue = q_vector->tx.ring->reg_idx;
 801
 802         switch (hw->mac.type) {
 803         case e1000_82575:
 804                 /* The 82575 assigns vectors using a bitmask, which matches the
 805                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 806                  * or more queues to a vector, we write the appropriate bits
 807                  * into the MSIXBM register for that vector.
 808                  */
 809                 if (rx_queue > IGB_N0_QUEUE)
 810                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 811                 if (tx_queue > IGB_N0_QUEUE)
 812                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 813                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 814                         msixbm |= E1000_EIMS_OTHER;
 815                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 816                 q_vector->eims_value = msixbm;
 817                 break;
 818         case e1000_82576:
 819                 /* 82576 uses a table that essentially consists of 2 columns
 820                  * with 8 rows.  The ordering is column-major so we use the
 821                  * lower 3 bits as the row index, and the 4th bit as the
 822                  * column offset.
 823                  */
 824                 if (rx_queue > IGB_N0_QUEUE)
 825                         igb_write_ivar(hw, msix_vector,
 826                                        rx_queue & 0x7,
 827                                        (rx_queue & 0x8) << 1);
 828                 if (tx_queue > IGB_N0_QUEUE)
 829                         igb_write_ivar(hw, msix_vector,
 830                                        tx_queue & 0x7,
 831                                        ((tx_queue & 0x8) << 1) + 8);
 832                 q_vector->eims_value = BIT(msix_vector);
 833                 break;
 834         case e1000_82580:
 835         case e1000_i350:
 836         case e1000_i354:
 837         case e1000_i210:
 838         case e1000_i211:
 839                 /* On 82580 and newer adapters the scheme is similar to 82576
 840                  * however instead of ordering column-major we have things
 841                  * ordered row-major.  So we traverse the table by using
 842                  * bit 0 as the column offset, and the remaining bits as the
 843                  * row index.
 844                  */
 845                 if (rx_queue > IGB_N0_QUEUE)
 846                         igb_write_ivar(hw, msix_vector,
 847                                        rx_queue >> 1,
 848                                        (rx_queue & 0x1) << 4);
 849                 if (tx_queue > IGB_N0_QUEUE)
 850                         igb_write_ivar(hw, msix_vector,
 851                                        tx_queue >> 1,
 852                                        ((tx_queue & 0x1) << 4) + 8);
 853                 q_vector->eims_value = BIT(msix_vector);
 854                 break;
 855         default:
 856                 BUG();
 857                 break;
 858         }
 859
 860         /* add q_vector eims value to global eims_enable_mask */
 861         adapter->eims_enable_mask |= q_vector->eims_value;
 862
 863         /* configure q_vector to set itr on first interrupt */
 864         q_vector->set_itr = 1;
 865 }
 866
 867 /**
 868  *  igb_configure_msix - Configure MSI-X hardware
 869  *  @adapter: board private structure to initialize
 870  *
 871  *  igb_configure_msix sets up the hardware to properly
 872  *  generate MSI-X interrupts.
 873  **/
 874 static void igb_configure_msix(struct igb_adapter *adapter)
 875 {
 876         u32 tmp;
 877         int i, vector = 0;
 878         struct e1000_hw *hw = &adapter->hw;
 879
 880         adapter->eims_enable_mask = 0;
 881
 882         /* set vector for other causes, i.e. link changes */
 883         switch (hw->mac.type) {
 884         case e1000_82575:
 885                 tmp = rd32(E1000_CTRL_EXT);
 886                 /* enable MSI-X PBA support*/
 887                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 888
 889                 /* Auto-Mask interrupts upon ICR read. */
 890                 tmp |= E1000_CTRL_EXT_EIAME;
 891                 tmp |= E1000_CTRL_EXT_IRCA;
 892
 893                 wr32(E1000_CTRL_EXT, tmp);
 894
 895                 /* enable msix_other interrupt */
 896                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 897                 adapter->eims_other = E1000_EIMS_OTHER;
 898
 899                 break;
 900
 901         case e1000_82576:
 902         case e1000_82580:
 903         case e1000_i350:
 904         case e1000_i354:
 905         case e1000_i210:
 906         case e1000_i211:
 907                 /* Turn on MSI-X capability first, or our settings
 908                  * won't stick.  And it will take days to debug.
 909                  */
 910                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 911                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 912                      E1000_GPIE_NSICR);
 913
 914                 /* enable msix_other interrupt */
 915                 adapter->eims_other = BIT(vector);
 916                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 917
 918                 wr32(E1000_IVAR_MISC, tmp);
 919                 break;
 920         default:
 921                 /* do nothing, since nothing else supports MSI-X */
 922                 break;
 923         } /* switch (hw->mac.type) */
 924
 925         adapter->eims_enable_mask |= adapter->eims_other;
 926
 927         for (i = 0; i < adapter->num_q_vectors; i++)
 928                 igb_assign_vector(adapter->q_vector[i], vector++);
 929
 930         wrfl();
 931 }
 932
 933 /**
 934  *  igb_request_msix - Initialize MSI-X interrupts
 935  *  @adapter: board private structure to initialize
 936  *
 937  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 938  *  kernel.
 939  **/
 940 static int igb_request_msix(struct igb_adapter *adapter)
 941 {
 942         struct net_device *netdev = adapter->netdev;
 943         int i, err = 0, vector = 0, free_vector = 0;
 944
 945         err = request_irq(adapter->msix_entries[vector].vector,
 946                           igb_msix_other, 0, netdev->name, adapter);
 947         if (err)
 948                 goto err_out;
 949
 950         for (i = 0; i < adapter->num_q_vectors; i++) {
 951                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 952
 953                 vector++;
 954
 955                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 956
 957                 if (q_vector->rx.ring && q_vector->tx.ring)
 958                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 959                                 q_vector->rx.ring->queue_index);
 960                 else if (q_vector->tx.ring)
 961                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 962                                 q_vector->tx.ring->queue_index);
 963                 else if (q_vector->rx.ring)
 964                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 965                                 q_vector->rx.ring->queue_index);
 966                 else
 967                         sprintf(q_vector->name, "%s-unused", netdev->name);
 968
 969                 err = request_irq(adapter->msix_entries[vector].vector,
 970                                   igb_msix_ring, 0, q_vector->name,
 971                                   q_vector);
 972                 if (err)
 973                         goto err_free;
 974         }
 975
 976         igb_configure_msix(adapter);
 977         return 0;
 978
 979 err_free:
 980         /* free already assigned IRQs */
 981         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 982
 983         vector--;
 984         for (i = 0; i < vector; i++) {
 985                 free_irq(adapter->msix_entries[free_vector++].vector,
 986                          adapter->q_vector[i]);
 987         }
 988 err_out:
 989         return err;
 990 }
 991
 992 /**
 993  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 994  *  @adapter: board private structure to initialize
 995  *  @v_idx: Index of vector to be freed
 996  *
 997  *  This function frees the memory allocated to the q_vector.
 998  **/
 999 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1000 {
1001         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1002
1003         adapter->q_vector[v_idx] = NULL;
1004
1005         /* igb_get_stats64() might access the rings on this vector,
1006          * we must wait a grace period before freeing it.
1007          */
1008         if (q_vector)
1009                 kfree_rcu(q_vector, rcu);
1010 }
1011
1012 /**
1013  *  igb_reset_q_vector - Reset config for interrupt vector
1014  *  @adapter: board private structure to initialize
1015  *  @v_idx: Index of vector to be reset
1016  *
1017  *  If NAPI is enabled it will delete any references to the
1018  *  NAPI struct. This is preparation for igb_free_q_vector.
1019  **/
1020 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1021 {
1022         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1023
1024         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1025          * allocated. So, q_vector is NULL so we should stop here.
1026          */
1027         if (!q_vector)
1028                 return;
1029
1030         if (q_vector->tx.ring)
1031                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1032
1033         if (q_vector->rx.ring)
1034                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1035
1036         netif_napi_del(&q_vector->napi);
1037
1038 }
1039
1040 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1041 {
1042         int v_idx = adapter->num_q_vectors;
1043
1044         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1045                 pci_disable_msix(adapter->pdev);
1046         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1047                 pci_disable_msi(adapter->pdev);
1048
1049         while (v_idx--)
1050                 igb_reset_q_vector(adapter, v_idx);
1051 }
1052
1053 /**
1054  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1055  *  @adapter: board private structure to initialize
1056  *
1057  *  This function frees the memory allocated to the q_vectors.  In addition if
1058  *  NAPI is enabled it will delete any references to the NAPI struct prior
1059  *  to freeing the q_vector.
1060  **/
1061 static void igb_free_q_vectors(struct igb_adapter *adapter)
1062 {
1063         int v_idx = adapter->num_q_vectors;
1064
1065         adapter->num_tx_queues = 0;
1066         adapter->num_rx_queues = 0;
1067         adapter->num_q_vectors = 0;
1068
1069         while (v_idx--) {
1070                 igb_reset_q_vector(adapter, v_idx);
1071                 igb_free_q_vector(adapter, v_idx);
1072         }
1073 }
1074
1075 /**
1076  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1077  *  @adapter: board private structure to initialize
1078  *
1079  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1080  *  MSI-X interrupts allocated.
1081  */
1082 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1083 {
1084         igb_free_q_vectors(adapter);
1085         igb_reset_interrupt_capability(adapter);
1086 }
1087
1088 /**
1089  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1090  *  @adapter: board private structure to initialize
1091  *  @msix: boolean value of MSIX capability
1092  *
1093  *  Attempt to configure interrupts using the best available
1094  *  capabilities of the hardware and kernel.
1095  **/
1096 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1097 {
1098         int err;
1099         int numvecs, i;
1100
1101         if (!msix)
1102                 goto msi_only;
1103         adapter->flags |= IGB_FLAG_HAS_MSIX;
1104
1105         /* Number of supported queues. */
1106         adapter->num_rx_queues = adapter->rss_queues;
1107         if (adapter->vfs_allocated_count)
1108                 adapter->num_tx_queues = 1;
1109         else
1110                 adapter->num_tx_queues = adapter->rss_queues;
1111
1112         /* start with one vector for every Rx queue */
1113         numvecs = adapter->num_rx_queues;
1114
1115         /* if Tx handler is separate add 1 for every Tx queue */
1116         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1117                 numvecs += adapter->num_tx_queues;
1118
1119         /* store the number of vectors reserved for queues */
1120         adapter->num_q_vectors = numvecs;
1121
1122         /* add 1 vector for link status interrupts */
1123         numvecs++;
1124         for (i = 0; i < numvecs; i++)
1125                 adapter->msix_entries[i].entry = i;
1126
1127         err = pci_enable_msix_range(adapter->pdev,
1128                                     adapter->msix_entries,
1129                                     numvecs,
1130                                     numvecs);
1131         if (err > 0)
1132                 return;
1133
1134         igb_reset_interrupt_capability(adapter);
1135
1136         /* If we can't do MSI-X, try MSI */
1137 msi_only:
1138         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1139 #ifdef CONFIG_PCI_IOV
1140         /* disable SR-IOV for non MSI-X configurations */
1141         if (adapter->vf_data) {
1142                 struct e1000_hw *hw = &adapter->hw;
1143                 /* disable iov and allow time for transactions to clear */
1144                 pci_disable_sriov(adapter->pdev);
1145                 msleep(500);
1146
1147                 kfree(adapter->vf_mac_list);
1148                 adapter->vf_mac_list = NULL;
1149                 kfree(adapter->vf_data);
1150                 adapter->vf_data = NULL;
1151                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1152                 wrfl();
1153                 msleep(100);
1154                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1155         }
1156 #endif
1157         adapter->vfs_allocated_count = 0;
1158         adapter->rss_queues = 1;
1159         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1160         adapter->num_rx_queues = 1;
1161         adapter->num_tx_queues = 1;
1162         adapter->num_q_vectors = 1;
1163         if (!pci_enable_msi(adapter->pdev))
1164                 adapter->flags |= IGB_FLAG_HAS_MSI;
1165 }
1166
1167 static void igb_add_ring(struct igb_ring *ring,
1168                          struct igb_ring_container *head)
1169 {
1170         head->ring = ring;
1171         head->count++;
1172 }
1173
1174 /**
1175  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1176  *  @adapter: board private structure to initialize
1177  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1178  *  @v_idx: index of vector in adapter struct
1179  *  @txr_count: total number of Tx rings to allocate
1180  *  @txr_idx: index of first Tx ring to allocate
1181  *  @rxr_count: total number of Rx rings to allocate
1182  *  @rxr_idx: index of first Rx ring to allocate
1183  *
1184  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1185  **/
1186 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1187                               int v_count, int v_idx,
1188                               int txr_count, int txr_idx,
1189                               int rxr_count, int rxr_idx)
1190 {
1191         struct igb_q_vector *q_vector;
1192         struct igb_ring *ring;
1193         int ring_count;
1194         size_t size;
1195
1196         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1197         if (txr_count > 1 || rxr_count > 1)
1198                 return -ENOMEM;
1199
1200         ring_count = txr_count + rxr_count;
1201         size = struct_size(q_vector, ring, ring_count);
1202
1203         /* allocate q_vector and rings */
1204         q_vector = adapter->q_vector[v_idx];
1205         if (!q_vector) {
1206                 q_vector = kzalloc(size, GFP_KERNEL);
1207         } else if (size > ksize(q_vector)) {
1208                 kfree_rcu(q_vector, rcu);
1209                 q_vector = kzalloc(size, GFP_KERNEL);
1210         } else {
1211                 memset(q_vector, 0, size);
1212         }
1213         if (!q_vector)
1214                 return -ENOMEM;
1215
1216         /* initialize NAPI */
1217         netif_napi_add(adapter->netdev, &q_vector->napi,
1218                        igb_poll, 64);
1219
1220         /* tie q_vector and adapter together */
1221         adapter->q_vector[v_idx] = q_vector;
1222         q_vector->adapter = adapter;
1223
1224         /* initialize work limits */
1225         q_vector->tx.work_limit = adapter->tx_work_limit;
1226
1227         /* initialize ITR configuration */
1228         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1229         q_vector->itr_val = IGB_START_ITR;
1230
1231         /* initialize pointer to rings */
1232         ring = q_vector->ring;
1233
1234         /* intialize ITR */
1235         if (rxr_count) {
1236                 /* rx or rx/tx vector */
1237                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1238                         q_vector->itr_val = adapter->rx_itr_setting;
1239         } else {
1240                 /* tx only vector */
1241                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1242                         q_vector->itr_val = adapter->tx_itr_setting;
1243         }
1244
1245         if (txr_count) {
1246                 /* assign generic ring traits */
1247                 ring->dev = &adapter->pdev->dev;
1248                 ring->netdev = adapter->netdev;
1249
1250                 /* configure backlink on ring */
1251                 ring->q_vector = q_vector;
1252
1253                 /* update q_vector Tx values */
1254                 igb_add_ring(ring, &q_vector->tx);
1255
1256                 /* For 82575, context index must be unique per ring. */
1257                 if (adapter->hw.mac.type == e1000_82575)
1258                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1259
1260                 /* apply Tx specific ring traits */
1261                 ring->count = adapter->tx_ring_count;
1262                 ring->queue_index = txr_idx;
1263
1264                 ring->cbs_enable = false;
1265                 ring->idleslope = 0;
1266                 ring->sendslope = 0;
1267                 ring->hicredit = 0;
1268                 ring->locredit = 0;
1269
1270                 u64_stats_init(&ring->tx_syncp);
1271                 u64_stats_init(&ring->tx_syncp2);
1272
1273                 /* assign ring to adapter */
1274                 adapter->tx_ring[txr_idx] = ring;
1275
1276                 /* push pointer to next ring */
1277                 ring++;
1278         }
1279
1280         if (rxr_count) {
1281                 /* assign generic ring traits */
1282                 ring->dev = &adapter->pdev->dev;
1283                 ring->netdev = adapter->netdev;
1284
1285                 /* configure backlink on ring */
1286                 ring->q_vector = q_vector;
1287
1288                 /* update q_vector Rx values */
1289                 igb_add_ring(ring, &q_vector->rx);
1290
1291                 /* set flag indicating ring supports SCTP checksum offload */
1292                 if (adapter->hw.mac.type >= e1000_82576)
1293                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1294
1295                 /* On i350, i354, i210, and i211, loopback VLAN packets
1296                  * have the tag byte-swapped.
1297                  */
1298                 if (adapter->hw.mac.type >= e1000_i350)
1299                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1300
1301                 /* apply Rx specific ring traits */
1302                 ring->count = adapter->rx_ring_count;
1303                 ring->queue_index = rxr_idx;
1304
1305                 u64_stats_init(&ring->rx_syncp);
1306
1307                 /* assign ring to adapter */
1308                 adapter->rx_ring[rxr_idx] = ring;
1309         }
1310
1311         return 0;
1312 }
1313
1314
1315 /**
1316  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1317  *  @adapter: board private structure to initialize
1318  *
1319  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1320  *  return -ENOMEM.
1321  **/
1322 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1323 {
1324         int q_vectors = adapter->num_q_vectors;
1325         int rxr_remaining = adapter->num_rx_queues;
1326         int txr_remaining = adapter->num_tx_queues;
1327         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1328         int err;
1329
1330         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1331                 for (; rxr_remaining; v_idx++) {
1332                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1333                                                  0, 0, 1, rxr_idx);
1334
1335                         if (err)
1336                                 goto err_out;
1337
1338                         /* update counts and index */
1339                         rxr_remaining--;
1340                         rxr_idx++;
1341                 }
1342         }
1343
1344         for (; v_idx < q_vectors; v_idx++) {
1345                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1346                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1347
1348                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1349                                          tqpv, txr_idx, rqpv, rxr_idx);
1350
1351                 if (err)
1352                         goto err_out;
1353
1354                 /* update counts and index */
1355                 rxr_remaining -= rqpv;
1356                 txr_remaining -= tqpv;
1357                 rxr_idx++;
1358                 txr_idx++;
1359         }
1360
1361         return 0;
1362
1363 err_out:
1364         adapter->num_tx_queues = 0;
1365         adapter->num_rx_queues = 0;
1366         adapter->num_q_vectors = 0;
1367
1368         while (v_idx--)
1369                 igb_free_q_vector(adapter, v_idx);
1370
1371         return -ENOMEM;
1372 }
1373
1374 /**
1375  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1376  *  @adapter: board private structure to initialize
1377  *  @msix: boolean value of MSIX capability
1378  *
1379  *  This function initializes the interrupts and allocates all of the queues.
1380  **/
1381 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1382 {
1383         struct pci_dev *pdev = adapter->pdev;
1384         int err;
1385
1386         igb_set_interrupt_capability(adapter, msix);
1387
1388         err = igb_alloc_q_vectors(adapter);
1389         if (err) {
1390                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1391                 goto err_alloc_q_vectors;
1392         }
1393
1394         igb_cache_ring_register(adapter);
1395
1396         return 0;
1397
1398 err_alloc_q_vectors:
1399         igb_reset_interrupt_capability(adapter);
1400         return err;
1401 }
1402
1403 /**
1404  *  igb_request_irq - initialize interrupts
1405  *  @adapter: board private structure to initialize
1406  *
1407  *  Attempts to configure interrupts using the best available
1408  *  capabilities of the hardware and kernel.
1409  **/
1410 static int igb_request_irq(struct igb_adapter *adapter)
1411 {
1412         struct net_device *netdev = adapter->netdev;
1413         struct pci_dev *pdev = adapter->pdev;
1414         int err = 0;
1415
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 err = igb_request_msix(adapter);
1418                 if (!err)
1419                         goto request_done;
1420                 /* fall back to MSI */
1421                 igb_free_all_tx_resources(adapter);
1422                 igb_free_all_rx_resources(adapter);
1423
1424                 igb_clear_interrupt_scheme(adapter);
1425                 err = igb_init_interrupt_scheme(adapter, false);
1426                 if (err)
1427                         goto request_done;
1428
1429                 igb_setup_all_tx_resources(adapter);
1430                 igb_setup_all_rx_resources(adapter);
1431                 igb_configure(adapter);
1432         }
1433
1434         igb_assign_vector(adapter->q_vector[0], 0);
1435
1436         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1437                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1438                                   netdev->name, adapter);
1439                 if (!err)
1440                         goto request_done;
1441
1442                 /* fall back to legacy interrupts */
1443                 igb_reset_interrupt_capability(adapter);
1444                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1445         }
1446
1447         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1448                           netdev->name, adapter);
1449
1450         if (err)
1451                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1452                         err);
1453
1454 request_done:
1455         return err;
1456 }
1457
1458 static void igb_free_irq(struct igb_adapter *adapter)
1459 {
1460         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1461                 int vector = 0, i;
1462
1463                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1464
1465                 for (i = 0; i < adapter->num_q_vectors; i++)
1466                         free_irq(adapter->msix_entries[vector++].vector,
1467                                  adapter->q_vector[i]);
1468         } else {
1469                 free_irq(adapter->pdev->irq, adapter);
1470         }
1471 }
1472
1473 /**
1474  *  igb_irq_disable - Mask off interrupt generation on the NIC
1475  *  @adapter: board private structure
1476  **/
1477 static void igb_irq_disable(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480
1481         /* we need to be careful when disabling interrupts.  The VFs are also
1482          * mapped into these registers and so clearing the bits can cause
1483          * issues on the VF drivers so we only need to clear what we set
1484          */
1485         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1486                 u32 regval = rd32(E1000_EIAM);
1487
1488                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1489                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1490                 regval = rd32(E1000_EIAC);
1491                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1492         }
1493
1494         wr32(E1000_IAM, 0);
1495         wr32(E1000_IMC, ~0);
1496         wrfl();
1497         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1498                 int i;
1499
1500                 for (i = 0; i < adapter->num_q_vectors; i++)
1501                         synchronize_irq(adapter->msix_entries[i].vector);
1502         } else {
1503                 synchronize_irq(adapter->pdev->irq);
1504         }
1505 }
1506
1507 /**
1508  *  igb_irq_enable - Enable default interrupt generation settings
1509  *  @adapter: board private structure
1510  **/
1511 static void igb_irq_enable(struct igb_adapter *adapter)
1512 {
1513         struct e1000_hw *hw = &adapter->hw;
1514
1515         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1516                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1517                 u32 regval = rd32(E1000_EIAC);
1518
1519                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1520                 regval = rd32(E1000_EIAM);
1521                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1522                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1523                 if (adapter->vfs_allocated_count) {
1524                         wr32(E1000_MBVFIMR, 0xFF);
1525                         ims |= E1000_IMS_VMMB;
1526                 }
1527                 wr32(E1000_IMS, ims);
1528         } else {
1529                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1530                                 E1000_IMS_DRSTA);
1531                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1532                                 E1000_IMS_DRSTA);
1533         }
1534 }
1535
1536 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1537 {
1538         struct e1000_hw *hw = &adapter->hw;
1539         u16 pf_id = adapter->vfs_allocated_count;
1540         u16 vid = adapter->hw.mng_cookie.vlan_id;
1541         u16 old_vid = adapter->mng_vlan_id;
1542
1543         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1544                 /* add VID to filter table */
1545                 igb_vfta_set(hw, vid, pf_id, true, true);
1546                 adapter->mng_vlan_id = vid;
1547         } else {
1548                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1549         }
1550
1551         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1552             (vid != old_vid) &&
1553             !test_bit(old_vid, adapter->active_vlans)) {
1554                 /* remove VID from filter table */
1555                 igb_vfta_set(hw, vid, pf_id, false, true);
1556         }
1557 }
1558
1559 /**
1560  *  igb_release_hw_control - release control of the h/w to f/w
1561  *  @adapter: address of board private structure
1562  *
1563  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1564  *  For ASF and Pass Through versions of f/w this means that the
1565  *  driver is no longer loaded.
1566  **/
1567 static void igb_release_hw_control(struct igb_adapter *adapter)
1568 {
1569         struct e1000_hw *hw = &adapter->hw;
1570         u32 ctrl_ext;
1571
1572         /* Let firmware take over control of h/w */
1573         ctrl_ext = rd32(E1000_CTRL_EXT);
1574         wr32(E1000_CTRL_EXT,
1575                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1576 }
1577
1578 /**
1579  *  igb_get_hw_control - get control of the h/w from f/w
1580  *  @adapter: address of board private structure
1581  *
1582  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1583  *  For ASF and Pass Through versions of f/w this means that
1584  *  the driver is loaded.
1585  **/
1586 static void igb_get_hw_control(struct igb_adapter *adapter)
1587 {
1588         struct e1000_hw *hw = &adapter->hw;
1589         u32 ctrl_ext;
1590
1591         /* Let firmware know the driver has taken over */
1592         ctrl_ext = rd32(E1000_CTRL_EXT);
1593         wr32(E1000_CTRL_EXT,
1594                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1595 }
1596
1597 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1598 {
1599         struct net_device *netdev = adapter->netdev;
1600         struct e1000_hw *hw = &adapter->hw;
1601
1602         WARN_ON(hw->mac.type != e1000_i210);
1603
1604         if (enable)
1605                 adapter->flags |= IGB_FLAG_FQTSS;
1606         else
1607                 adapter->flags &= ~IGB_FLAG_FQTSS;
1608
1609         if (netif_running(netdev))
1610                 schedule_work(&adapter->reset_task);
1611 }
1612
1613 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1614 {
1615         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1616 }
1617
1618 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1619                                    enum tx_queue_prio prio)
1620 {
1621         u32 val;
1622
1623         WARN_ON(hw->mac.type != e1000_i210);
1624         WARN_ON(queue < 0 || queue > 4);
1625
1626         val = rd32(E1000_I210_TXDCTL(queue));
1627
1628         if (prio == TX_QUEUE_PRIO_HIGH)
1629                 val |= E1000_TXDCTL_PRIORITY;
1630         else
1631                 val &= ~E1000_TXDCTL_PRIORITY;
1632
1633         wr32(E1000_I210_TXDCTL(queue), val);
1634 }
1635
1636 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1637 {
1638         u32 val;
1639
1640         WARN_ON(hw->mac.type != e1000_i210);
1641         WARN_ON(queue < 0 || queue > 1);
1642
1643         val = rd32(E1000_I210_TQAVCC(queue));
1644
1645         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1646                 val |= E1000_TQAVCC_QUEUEMODE;
1647         else
1648                 val &= ~E1000_TQAVCC_QUEUEMODE;
1649
1650         wr32(E1000_I210_TQAVCC(queue), val);
1651 }
1652
1653 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1654 {
1655         int i;
1656
1657         for (i = 0; i < adapter->num_tx_queues; i++) {
1658                 if (adapter->tx_ring[i]->cbs_enable)
1659                         return true;
1660         }
1661
1662         return false;
1663 }
1664
1665 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1666 {
1667         int i;
1668
1669         for (i = 0; i < adapter->num_tx_queues; i++) {
1670                 if (adapter->tx_ring[i]->launchtime_enable)
1671                         return true;
1672         }
1673
1674         return false;
1675 }
1676
1677 /**
1678  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1679  *  @adapter: pointer to adapter struct
1680  *  @queue: queue number
1681  *
1682  *  Configure CBS and Launchtime for a given hardware queue.
1683  *  Parameters are retrieved from the correct Tx ring, so
1684  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1685  *  for setting those correctly prior to this function being called.
1686  **/
1687 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1688 {
1689         struct igb_ring *ring = adapter->tx_ring[queue];
1690         struct net_device *netdev = adapter->netdev;
1691         struct e1000_hw *hw = &adapter->hw;
1692         u32 tqavcc, tqavctrl;
1693         u16 value;
1694
1695         WARN_ON(hw->mac.type != e1000_i210);
1696         WARN_ON(queue < 0 || queue > 1);
1697
1698         /* If any of the Qav features is enabled, configure queues as SR and
1699          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1700          * as SP.
1701          */
1702         if (ring->cbs_enable || ring->launchtime_enable) {
1703                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1704                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1705         } else {
1706                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1707                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1708         }
1709
1710         /* If CBS is enabled, set DataTranARB and config its parameters. */
1711         if (ring->cbs_enable || queue == 0) {
1712                 /* i210 does not allow the queue 0 to be in the Strict
1713                  * Priority mode while the Qav mode is enabled, so,
1714                  * instead of disabling strict priority mode, we give
1715                  * queue 0 the maximum of credits possible.
1716                  *
1717                  * See section 8.12.19 of the i210 datasheet, "Note:
1718                  * Queue0 QueueMode must be set to 1b when
1719                  * TransmitMode is set to Qav."
1720                  */
1721                 if (queue == 0 && !ring->cbs_enable) {
1722                         /* max "linkspeed" idleslope in kbps */
1723                         ring->idleslope = 1000000;
1724                         ring->hicredit = ETH_FRAME_LEN;
1725                 }
1726
1727                 /* Always set data transfer arbitration to credit-based
1728                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1729                  * the queues.
1730                  */
1731                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1732                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1733                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1734
1735                 /* According to i210 datasheet section 7.2.7.7, we should set
1736                  * the 'idleSlope' field from TQAVCC register following the
1737                  * equation:
1738                  *
1739                  * For 100 Mbps link speed:
1740                  *
1741                  *     value = BW * 0x7735 * 0.2                          (E1)
1742                  *
1743                  * For 1000Mbps link speed:
1744                  *
1745                  *     value = BW * 0x7735 * 2                            (E2)
1746                  *
1747                  * E1 and E2 can be merged into one equation as shown below.
1748                  * Note that 'link-speed' is in Mbps.
1749                  *
1750                  *     value = BW * 0x7735 * 2 * link-speed
1751                  *                           --------------               (E3)
1752                  *                                1000
1753                  *
1754                  * 'BW' is the percentage bandwidth out of full link speed
1755                  * which can be found with the following equation. Note that
1756                  * idleSlope here is the parameter from this function which
1757                  * is in kbps.
1758                  *
1759                  *     BW =     idleSlope
1760                  *          -----------------                             (E4)
1761                  *          link-speed * 1000
1762                  *
1763                  * That said, we can come up with a generic equation to
1764                  * calculate the value we should set it TQAVCC register by
1765                  * replacing 'BW' in E3 by E4. The resulting equation is:
1766                  *
1767                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1768                  *         -----------------            --------------    (E5)
1769                  *         link-speed * 1000                 1000
1770                  *
1771                  * 'link-speed' is present in both sides of the fraction so
1772                  * it is canceled out. The final equation is the following:
1773                  *
1774                  *     value = idleSlope * 61034
1775                  *             -----------------                          (E6)
1776                  *                  1000000
1777                  *
1778                  * NOTE: For i210, given the above, we can see that idleslope
1779                  *       is represented in 16.38431 kbps units by the value at
1780                  *       the TQAVCC register (1Gbps / 61034), which reduces
1781                  *       the granularity for idleslope increments.
1782                  *       For instance, if you want to configure a 2576kbps
1783                  *       idleslope, the value to be written on the register
1784                  *       would have to be 157.23. If rounded down, you end
1785                  *       up with less bandwidth available than originally
1786                  *       required (~2572 kbps). If rounded up, you end up
1787                  *       with a higher bandwidth (~2589 kbps). Below the
1788                  *       approach we take is to always round up the
1789                  *       calculated value, so the resulting bandwidth might
1790                  *       be slightly higher for some configurations.
1791                  */
1792                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1793
1794                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1795                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1796                 tqavcc |= value;
1797                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1798
1799                 wr32(E1000_I210_TQAVHC(queue),
1800                      0x80000000 + ring->hicredit * 0x7735);
1801         } else {
1802
1803                 /* Set idleSlope to zero. */
1804                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1805                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1806                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1807
1808                 /* Set hiCredit to zero. */
1809                 wr32(E1000_I210_TQAVHC(queue), 0);
1810
1811                 /* If CBS is not enabled for any queues anymore, then return to
1812                  * the default state of Data Transmission Arbitration on
1813                  * TQAVCTRL.
1814                  */
1815                 if (!is_any_cbs_enabled(adapter)) {
1816                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1817                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1818                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1819                 }
1820         }
1821
1822         /* If LaunchTime is enabled, set DataTranTIM. */
1823         if (ring->launchtime_enable) {
1824                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1825                  * for any of the SR queues, and configure fetchtime delta.
1826                  * XXX NOTE:
1827                  *     - LaunchTime will be enabled for all SR queues.
1828                  *     - A fixed offset can be added relative to the launch
1829                  *       time of all packets if configured at reg LAUNCH_OS0.
1830                  *       We are keeping it as 0 for now (default value).
1831                  */
1832                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1833                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1834                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1835                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1836         } else {
1837                 /* If Launchtime is not enabled for any SR queues anymore,
1838                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1839                  * effectively disabling Launchtime.
1840                  */
1841                 if (!is_any_txtime_enabled(adapter)) {
1842                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1843                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1844                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1845                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1846                 }
1847         }
1848
1849         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1850          * CBS are not configurable by software so we don't do any 'controller
1851          * configuration' in respect to these parameters.
1852          */
1853
1854         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1855                    ring->cbs_enable ? "enabled" : "disabled",
1856                    ring->launchtime_enable ? "enabled" : "disabled",
1857                    queue,
1858                    ring->idleslope, ring->sendslope,
1859                    ring->hicredit, ring->locredit);
1860 }
1861
1862 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1863                                   bool enable)
1864 {
1865         struct igb_ring *ring;
1866
1867         if (queue < 0 || queue > adapter->num_tx_queues)
1868                 return -EINVAL;
1869
1870         ring = adapter->tx_ring[queue];
1871         ring->launchtime_enable = enable;
1872
1873         return 0;
1874 }
1875
1876 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1877                                bool enable, int idleslope, int sendslope,
1878                                int hicredit, int locredit)
1879 {
1880         struct igb_ring *ring;
1881
1882         if (queue < 0 || queue > adapter->num_tx_queues)
1883                 return -EINVAL;
1884
1885         ring = adapter->tx_ring[queue];
1886
1887         ring->cbs_enable = enable;
1888         ring->idleslope = idleslope;
1889         ring->sendslope = sendslope;
1890         ring->hicredit = hicredit;
1891         ring->locredit = locredit;
1892
1893         return 0;
1894 }
1895
1896 /**
1897  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1898  *  @adapter: pointer to adapter struct
1899  *
1900  *  Configure TQAVCTRL register switching the controller's Tx mode
1901  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1902  *  a call to igb_config_tx_modes() per queue so any previously saved
1903  *  Tx parameters are applied.
1904  **/
1905 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1906 {
1907         struct net_device *netdev = adapter->netdev;
1908         struct e1000_hw *hw = &adapter->hw;
1909         u32 val;
1910
1911         /* Only i210 controller supports changing the transmission mode. */
1912         if (hw->mac.type != e1000_i210)
1913                 return;
1914
1915         if (is_fqtss_enabled(adapter)) {
1916                 int i, max_queue;
1917
1918                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1919                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1920                  * so SP queues wait for SR ones.
1921                  */
1922                 val = rd32(E1000_I210_TQAVCTRL);
1923                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1924                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1925                 wr32(E1000_I210_TQAVCTRL, val);
1926
1927                 /* Configure Tx and Rx packet buffers sizes as described in
1928                  * i210 datasheet section 7.2.7.7.
1929                  */
1930                 val = rd32(E1000_TXPBS);
1931                 val &= ~I210_TXPBSIZE_MASK;
1932                 val |= I210_TXPBSIZE_PB0_8KB | I210_TXPBSIZE_PB1_8KB |
1933                         I210_TXPBSIZE_PB2_4KB | I210_TXPBSIZE_PB3_4KB;
1934                 wr32(E1000_TXPBS, val);
1935
1936                 val = rd32(E1000_RXPBS);
1937                 val &= ~I210_RXPBSIZE_MASK;
1938                 val |= I210_RXPBSIZE_PB_30KB;
1939                 wr32(E1000_RXPBS, val);
1940
1941                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1942                  * register should not exceed the buffer size programmed in
1943                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1944                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1945                  * 4kB / 64.
1946                  *
1947                  * However, when we do so, no frame from queue 2 and 3 are
1948                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1949                  * or _equal_ to the buffer size programmed in TXPBS. For this
1950                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1951                  */
1952                 val = (4096 - 1) / 64;
1953                 wr32(E1000_I210_DTXMXPKTSZ, val);
1954
1955                 /* Since FQTSS mode is enabled, apply any CBS configuration
1956                  * previously set. If no previous CBS configuration has been
1957                  * done, then the initial configuration is applied, which means
1958                  * CBS is disabled.
1959                  */
1960                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1961                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1962
1963                 for (i = 0; i < max_queue; i++) {
1964                         igb_config_tx_modes(adapter, i);
1965                 }
1966         } else {
1967                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1968                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1969                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1970
1971                 val = rd32(E1000_I210_TQAVCTRL);
1972                 /* According to Section 8.12.21, the other flags we've set when
1973                  * enabling FQTSS are not relevant when disabling FQTSS so we
1974                  * don't set they here.
1975                  */
1976                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1977                 wr32(E1000_I210_TQAVCTRL, val);
1978         }
1979
1980         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1981                    "enabled" : "disabled");
1982 }
1983
1984 /**
1985  *  igb_configure - configure the hardware for RX and TX
1986  *  @adapter: private board structure
1987  **/
1988 static void igb_configure(struct igb_adapter *adapter)
1989 {
1990         struct net_device *netdev = adapter->netdev;
1991         int i;
1992
1993         igb_get_hw_control(adapter);
1994         igb_set_rx_mode(netdev);
1995         igb_setup_tx_mode(adapter);
1996
1997         igb_restore_vlan(adapter);
1998
1999         igb_setup_tctl(adapter);
2000         igb_setup_mrqc(adapter);
2001         igb_setup_rctl(adapter);
2002
2003         igb_nfc_filter_restore(adapter);
2004         igb_configure_tx(adapter);
2005         igb_configure_rx(adapter);
2006
2007         igb_rx_fifo_flush_82575(&adapter->hw);
2008
2009         /* call igb_desc_unused which always leaves
2010          * at least 1 descriptor unused to make sure
2011          * next_to_use != next_to_clean
2012          */
2013         for (i = 0; i < adapter->num_rx_queues; i++) {
2014                 struct igb_ring *ring = adapter->rx_ring[i];
2015                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2016         }
2017 }
2018
2019 /**
2020  *  igb_power_up_link - Power up the phy/serdes link
2021  *  @adapter: address of board private structure
2022  **/
2023 void igb_power_up_link(struct igb_adapter *adapter)
2024 {
2025         igb_reset_phy(&adapter->hw);
2026
2027         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2028                 igb_power_up_phy_copper(&adapter->hw);
2029         else
2030                 igb_power_up_serdes_link_82575(&adapter->hw);
2031
2032         igb_setup_link(&adapter->hw);
2033 }
2034
2035 /**
2036  *  igb_power_down_link - Power down the phy/serdes link
2037  *  @adapter: address of board private structure
2038  */
2039 static void igb_power_down_link(struct igb_adapter *adapter)
2040 {
2041         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2042                 igb_power_down_phy_copper_82575(&adapter->hw);
2043         else
2044                 igb_shutdown_serdes_link_82575(&adapter->hw);
2045 }
2046
2047 /**
2048  * Detect and switch function for Media Auto Sense
2049  * @adapter: address of the board private structure
2050  **/
2051 static void igb_check_swap_media(struct igb_adapter *adapter)
2052 {
2053         struct e1000_hw *hw = &adapter->hw;
2054         u32 ctrl_ext, connsw;
2055         bool swap_now = false;
2056
2057         ctrl_ext = rd32(E1000_CTRL_EXT);
2058         connsw = rd32(E1000_CONNSW);
2059
2060         /* need to live swap if current media is copper and we have fiber/serdes
2061          * to go to.
2062          */
2063
2064         if ((hw->phy.media_type == e1000_media_type_copper) &&
2065             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2066                 swap_now = true;
2067         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2068                    !(connsw & E1000_CONNSW_SERDESD)) {
2069                 /* copper signal takes time to appear */
2070                 if (adapter->copper_tries < 4) {
2071                         adapter->copper_tries++;
2072                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2073                         wr32(E1000_CONNSW, connsw);
2074                         return;
2075                 } else {
2076                         adapter->copper_tries = 0;
2077                         if ((connsw & E1000_CONNSW_PHYSD) &&
2078                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2079                                 swap_now = true;
2080                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2081                                 wr32(E1000_CONNSW, connsw);
2082                         }
2083                 }
2084         }
2085
2086         if (!swap_now)
2087                 return;
2088
2089         switch (hw->phy.media_type) {
2090         case e1000_media_type_copper:
2091                 netdev_info(adapter->netdev,
2092                         "MAS: changing media to fiber/serdes\n");
2093                 ctrl_ext |=
2094                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2095                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2096                 adapter->copper_tries = 0;
2097                 break;
2098         case e1000_media_type_internal_serdes:
2099         case e1000_media_type_fiber:
2100                 netdev_info(adapter->netdev,
2101                         "MAS: changing media to copper\n");
2102                 ctrl_ext &=
2103                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2104                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2105                 break;
2106         default:
2107                 /* shouldn't get here during regular operation */
2108                 netdev_err(adapter->netdev,
2109                         "AMS: Invalid media type found, returning\n");
2110                 break;
2111         }
2112         wr32(E1000_CTRL_EXT, ctrl_ext);
2113 }
2114
2115 /**
2116  *  igb_up - Open the interface and prepare it to handle traffic
2117  *  @adapter: board private structure
2118  **/
2119 int igb_up(struct igb_adapter *adapter)
2120 {
2121         struct e1000_hw *hw = &adapter->hw;
2122         int i;
2123
2124         /* hardware has been reset, we need to reload some things */
2125         igb_configure(adapter);
2126
2127         clear_bit(__IGB_DOWN, &adapter->state);
2128
2129         for (i = 0; i < adapter->num_q_vectors; i++)
2130                 napi_enable(&(adapter->q_vector[i]->napi));
2131
2132         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2133                 igb_configure_msix(adapter);
2134         else
2135                 igb_assign_vector(adapter->q_vector[0], 0);
2136
2137         /* Clear any pending interrupts. */
2138         rd32(E1000_TSICR);
2139         rd32(E1000_ICR);
2140         igb_irq_enable(adapter);
2141
2142         /* notify VFs that reset has been completed */
2143         if (adapter->vfs_allocated_count) {
2144                 u32 reg_data = rd32(E1000_CTRL_EXT);
2145
2146                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2147                 wr32(E1000_CTRL_EXT, reg_data);
2148         }
2149
2150         netif_tx_start_all_queues(adapter->netdev);
2151
2152         /* start the watchdog. */
2153         hw->mac.get_link_status = 1;
2154         schedule_work(&adapter->watchdog_task);
2155
2156         if ((adapter->flags & IGB_FLAG_EEE) &&
2157             (!hw->dev_spec._82575.eee_disable))
2158                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2159
2160         return 0;
2161 }
2162
2163 void igb_down(struct igb_adapter *adapter)
2164 {
2165         struct net_device *netdev = adapter->netdev;
2166         struct e1000_hw *hw = &adapter->hw;
2167         u32 tctl, rctl;
2168         int i;
2169
2170         /* signal that we're down so the interrupt handler does not
2171          * reschedule our watchdog timer
2172          */
2173         set_bit(__IGB_DOWN, &adapter->state);
2174
2175         /* disable receives in the hardware */
2176         rctl = rd32(E1000_RCTL);
2177         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2178         /* flush and sleep below */
2179
2180         igb_nfc_filter_exit(adapter);
2181
2182         netif_carrier_off(netdev);
2183         netif_tx_stop_all_queues(netdev);
2184
2185         /* disable transmits in the hardware */
2186         tctl = rd32(E1000_TCTL);
2187         tctl &= ~E1000_TCTL_EN;
2188         wr32(E1000_TCTL, tctl);
2189         /* flush both disables and wait for them to finish */
2190         wrfl();
2191         usleep_range(10000, 11000);
2192
2193         igb_irq_disable(adapter);
2194
2195         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2196
2197         for (i = 0; i < adapter->num_q_vectors; i++) {
2198                 if (adapter->q_vector[i]) {
2199                         napi_synchronize(&adapter->q_vector[i]->napi);
2200                         napi_disable(&adapter->q_vector[i]->napi);
2201                 }
2202         }
2203
2204         del_timer_sync(&adapter->watchdog_timer);
2205         del_timer_sync(&adapter->phy_info_timer);
2206
2207         /* record the stats before reset*/
2208         spin_lock(&adapter->stats64_lock);
2209         igb_update_stats(adapter);
2210         spin_unlock(&adapter->stats64_lock);
2211
2212         adapter->link_speed = 0;
2213         adapter->link_duplex = 0;
2214
2215         if (!pci_channel_offline(adapter->pdev))
2216                 igb_reset(adapter);
2217
2218         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2219         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2220
2221         igb_clean_all_tx_rings(adapter);
2222         igb_clean_all_rx_rings(adapter);
2223 #ifdef CONFIG_IGB_DCA
2224
2225         /* since we reset the hardware DCA settings were cleared */
2226         igb_setup_dca(adapter);
2227 #endif
2228 }
2229
2230 void igb_reinit_locked(struct igb_adapter *adapter)
2231 {
2232         WARN_ON(in_interrupt());
2233         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2234                 usleep_range(1000, 2000);
2235         igb_down(adapter);
2236         igb_up(adapter);
2237         clear_bit(__IGB_RESETTING, &adapter->state);
2238 }
2239
2240 /** igb_enable_mas - Media Autosense re-enable after swap
2241  *
2242  * @adapter: adapter struct
2243  **/
2244 static void igb_enable_mas(struct igb_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247         u32 connsw = rd32(E1000_CONNSW);
2248
2249         /* configure for SerDes media detect */
2250         if ((hw->phy.media_type == e1000_media_type_copper) &&
2251             (!(connsw & E1000_CONNSW_SERDESD))) {
2252                 connsw |= E1000_CONNSW_ENRGSRC;
2253                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2254                 wr32(E1000_CONNSW, connsw);
2255                 wrfl();
2256         }
2257 }
2258
2259 void igb_reset(struct igb_adapter *adapter)
2260 {
2261         struct pci_dev *pdev = adapter->pdev;
2262         struct e1000_hw *hw = &adapter->hw;
2263         struct e1000_mac_info *mac = &hw->mac;
2264         struct e1000_fc_info *fc = &hw->fc;
2265         u32 pba, hwm;
2266
2267         /* Repartition Pba for greater than 9k mtu
2268          * To take effect CTRL.RST is required.
2269          */
2270         switch (mac->type) {
2271         case e1000_i350:
2272         case e1000_i354:
2273         case e1000_82580:
2274                 pba = rd32(E1000_RXPBS);
2275                 pba = igb_rxpbs_adjust_82580(pba);
2276                 break;
2277         case e1000_82576:
2278                 pba = rd32(E1000_RXPBS);
2279                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2280                 break;
2281         case e1000_82575:
2282         case e1000_i210:
2283         case e1000_i211:
2284         default:
2285                 pba = E1000_PBA_34K;
2286                 break;
2287         }
2288
2289         if (mac->type == e1000_82575) {
2290                 u32 min_rx_space, min_tx_space, needed_tx_space;
2291
2292                 /* write Rx PBA so that hardware can report correct Tx PBA */
2293                 wr32(E1000_PBA, pba);
2294
2295                 /* To maintain wire speed transmits, the Tx FIFO should be
2296                  * large enough to accommodate two full transmit packets,
2297                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2298                  * the Rx FIFO should be large enough to accommodate at least
2299                  * one full receive packet and is similarly rounded up and
2300                  * expressed in KB.
2301                  */
2302                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2303
2304                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2305                  * but don't include Ethernet FCS because hardware appends it.
2306                  * We only need to round down to the nearest 512 byte block
2307                  * count since the value we care about is 2 frames, not 1.
2308                  */
2309                 min_tx_space = adapter->max_frame_size;
2310                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2311                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2312
2313                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2314                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2315
2316                 /* If current Tx allocation is less than the min Tx FIFO size,
2317                  * and the min Tx FIFO size is less than the current Rx FIFO
2318                  * allocation, take space away from current Rx allocation.
2319                  */
2320                 if (needed_tx_space < pba) {
2321                         pba -= needed_tx_space;
2322
2323                         /* if short on Rx space, Rx wins and must trump Tx
2324                          * adjustment
2325                          */
2326                         if (pba < min_rx_space)
2327                                 pba = min_rx_space;
2328                 }
2329
2330                 /* adjust PBA for jumbo frames */
2331                 wr32(E1000_PBA, pba);
2332         }
2333
2334         /* flow control settings
2335          * The high water mark must be low enough to fit one full frame
2336          * after transmitting the pause frame.  As such we must have enough
2337          * space to allow for us to complete our current transmit and then
2338          * receive the frame that is in progress from the link partner.
2339          * Set it to:
2340          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2341          */
2342         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2343
2344         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2345         fc->low_water = fc->high_water - 16;
2346         fc->pause_time = 0xFFFF;
2347         fc->send_xon = 1;
2348         fc->current_mode = fc->requested_mode;
2349
2350         /* disable receive for all VFs and wait one second */
2351         if (adapter->vfs_allocated_count) {
2352                 int i;
2353
2354                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2355                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2356
2357                 /* ping all the active vfs to let them know we are going down */
2358                 igb_ping_all_vfs(adapter);
2359
2360                 /* disable transmits and receives */
2361                 wr32(E1000_VFRE, 0);
2362                 wr32(E1000_VFTE, 0);
2363         }
2364
2365         /* Allow time for pending master requests to run */
2366         hw->mac.ops.reset_hw(hw);
2367         wr32(E1000_WUC, 0);
2368
2369         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2370                 /* need to resetup here after media swap */
2371                 adapter->ei.get_invariants(hw);
2372                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2373         }
2374         if ((mac->type == e1000_82575) &&
2375             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2376                 igb_enable_mas(adapter);
2377         }
2378         if (hw->mac.ops.init_hw(hw))
2379                 dev_err(&pdev->dev, "Hardware Error\n");
2380
2381         /* RAR registers were cleared during init_hw, clear mac table */
2382         igb_flush_mac_table(adapter);
2383         __dev_uc_unsync(adapter->netdev, NULL);
2384
2385         /* Recover default RAR entry */
2386         igb_set_default_mac_filter(adapter);
2387
2388         /* Flow control settings reset on hardware reset, so guarantee flow
2389          * control is off when forcing speed.
2390          */
2391         if (!hw->mac.autoneg)
2392                 igb_force_mac_fc(hw);
2393
2394         igb_init_dmac(adapter, pba);
2395 #ifdef CONFIG_IGB_HWMON
2396         /* Re-initialize the thermal sensor on i350 devices. */
2397         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2398                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2399                         /* If present, re-initialize the external thermal sensor
2400                          * interface.
2401                          */
2402                         if (adapter->ets)
2403                                 mac->ops.init_thermal_sensor_thresh(hw);
2404                 }
2405         }
2406 #endif
2407         /* Re-establish EEE setting */
2408         if (hw->phy.media_type == e1000_media_type_copper) {
2409                 switch (mac->type) {
2410                 case e1000_i350:
2411                 case e1000_i210:
2412                 case e1000_i211:
2413                         igb_set_eee_i350(hw, true, true);
2414                         break;
2415                 case e1000_i354:
2416                         igb_set_eee_i354(hw, true, true);
2417                         break;
2418                 default:
2419                         break;
2420                 }
2421         }
2422         if (!netif_running(adapter->netdev))
2423                 igb_power_down_link(adapter);
2424
2425         igb_update_mng_vlan(adapter);
2426
2427         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2428         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2429
2430         /* Re-enable PTP, where applicable. */
2431         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2432                 igb_ptp_reset(adapter);
2433
2434         igb_get_phy_info(hw);
2435 }
2436
2437 static netdev_features_t igb_fix_features(struct net_device *netdev,
2438         netdev_features_t features)
2439 {
2440         /* Since there is no support for separate Rx/Tx vlan accel
2441          * enable/disable make sure Tx flag is always in same state as Rx.
2442          */
2443         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2444                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2445         else
2446                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2447
2448         return features;
2449 }
2450
2451 static int igb_set_features(struct net_device *netdev,
2452         netdev_features_t features)
2453 {
2454         netdev_features_t changed = netdev->features ^ features;
2455         struct igb_adapter *adapter = netdev_priv(netdev);
2456
2457         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2458                 igb_vlan_mode(netdev, features);
2459
2460         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2461                 return 0;
2462
2463         if (!(features & NETIF_F_NTUPLE)) {
2464                 struct hlist_node *node2;
2465                 struct igb_nfc_filter *rule;
2466
2467                 spin_lock(&adapter->nfc_lock);
2468                 hlist_for_each_entry_safe(rule, node2,
2469                                           &adapter->nfc_filter_list, nfc_node) {
2470                         igb_erase_filter(adapter, rule);
2471                         hlist_del(&rule->nfc_node);
2472                         kfree(rule);
2473                 }
2474                 spin_unlock(&adapter->nfc_lock);
2475                 adapter->nfc_filter_count = 0;
2476         }
2477
2478         netdev->features = features;
2479
2480         if (netif_running(netdev))
2481                 igb_reinit_locked(adapter);
2482         else
2483                 igb_reset(adapter);
2484
2485         return 1;
2486 }
2487
2488 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2489                            struct net_device *dev,
2490                            const unsigned char *addr, u16 vid,
2491                            u16 flags,
2492                            struct netlink_ext_ack *extack)
2493 {
2494         /* guarantee we can provide a unique filter for the unicast address */
2495         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2496                 struct igb_adapter *adapter = netdev_priv(dev);
2497                 int vfn = adapter->vfs_allocated_count;
2498
2499                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2500                         return -ENOMEM;
2501         }
2502
2503         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2504 }
2505
2506 #define IGB_MAX_MAC_HDR_LEN     127
2507 #define IGB_MAX_NETWORK_HDR_LEN 511
2508
2509 static netdev_features_t
2510 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2511                    netdev_features_t features)
2512 {
2513         unsigned int network_hdr_len, mac_hdr_len;
2514
2515         /* Make certain the headers can be described by a context descriptor */
2516         mac_hdr_len = skb_network_header(skb) - skb->data;
2517         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2518                 return features & ~(NETIF_F_HW_CSUM |
2519                                     NETIF_F_SCTP_CRC |
2520                                     NETIF_F_HW_VLAN_CTAG_TX |
2521                                     NETIF_F_TSO |
2522                                     NETIF_F_TSO6);
2523
2524         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2525         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2526                 return features & ~(NETIF_F_HW_CSUM |
2527                                     NETIF_F_SCTP_CRC |
2528                                     NETIF_F_TSO |
2529                                     NETIF_F_TSO6);
2530
2531         /* We can only support IPV4 TSO in tunnels if we can mangle the
2532          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2533          */
2534         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2535                 features &= ~NETIF_F_TSO;
2536
2537         return features;
2538 }
2539
2540 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2541 {
2542         if (!is_fqtss_enabled(adapter)) {
2543                 enable_fqtss(adapter, true);
2544                 return;
2545         }
2546
2547         igb_config_tx_modes(adapter, queue);
2548
2549         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2550                 enable_fqtss(adapter, false);
2551 }
2552
2553 static int igb_offload_cbs(struct igb_adapter *adapter,
2554                            struct tc_cbs_qopt_offload *qopt)
2555 {
2556         struct e1000_hw *hw = &adapter->hw;
2557         int err;
2558
2559         /* CBS offloading is only supported by i210 controller. */
2560         if (hw->mac.type != e1000_i210)
2561                 return -EOPNOTSUPP;
2562
2563         /* CBS offloading is only supported by queue 0 and queue 1. */
2564         if (qopt->queue < 0 || qopt->queue > 1)
2565                 return -EINVAL;
2566
2567         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2568                                   qopt->idleslope, qopt->sendslope,
2569                                   qopt->hicredit, qopt->locredit);
2570         if (err)
2571                 return err;
2572
2573         igb_offload_apply(adapter, qopt->queue);
2574
2575         return 0;
2576 }
2577
2578 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2579 #define VLAN_PRIO_FULL_MASK (0x07)
2580
2581 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2582                                 struct flow_cls_offload *f,
2583                                 int traffic_class,
2584                                 struct igb_nfc_filter *input)
2585 {
2586         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2587         struct flow_dissector *dissector = rule->match.dissector;
2588         struct netlink_ext_ack *extack = f->common.extack;
2589
2590         if (dissector->used_keys &
2591             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2592               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2593               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2594               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2595                 NL_SET_ERR_MSG_MOD(extack,
2596                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2597                 return -EOPNOTSUPP;
2598         }
2599
2600         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2601                 struct flow_match_eth_addrs match;
2602
2603                 flow_rule_match_eth_addrs(rule, &match);
2604                 if (!is_zero_ether_addr(match.mask->dst)) {
2605                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2606                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2607                                 return -EINVAL;
2608                         }
2609
2610                         input->filter.match_flags |=
2611                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2612                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2613                 }
2614
2615                 if (!is_zero_ether_addr(match.mask->src)) {
2616                         if (!is_broadcast_ether_addr(match.mask->src)) {
2617                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2618                                 return -EINVAL;
2619                         }
2620
2621                         input->filter.match_flags |=
2622                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2623                         ether_addr_copy(input->filter.src_addr, match.key->src);
2624                 }
2625         }
2626
2627         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2628                 struct flow_match_basic match;
2629
2630                 flow_rule_match_basic(rule, &match);
2631                 if (match.mask->n_proto) {
2632                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2633                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2634                                 return -EINVAL;
2635                         }
2636
2637                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2638                         input->filter.etype = match.key->n_proto;
2639                 }
2640         }
2641
2642         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2643                 struct flow_match_vlan match;
2644
2645                 flow_rule_match_vlan(rule, &match);
2646                 if (match.mask->vlan_priority) {
2647                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2648                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2649                                 return -EINVAL;
2650                         }
2651
2652                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2653                         input->filter.vlan_tci = match.key->vlan_priority;
2654                 }
2655         }
2656
2657         input->action = traffic_class;
2658         input->cookie = f->cookie;
2659
2660         return 0;
2661 }
2662
2663 static int igb_configure_clsflower(struct igb_adapter *adapter,
2664                                    struct flow_cls_offload *cls_flower)
2665 {
2666         struct netlink_ext_ack *extack = cls_flower->common.extack;
2667         struct igb_nfc_filter *filter, *f;
2668         int err, tc;
2669
2670         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2671         if (tc < 0) {
2672                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2673                 return -EINVAL;
2674         }
2675
2676         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2677         if (!filter)
2678                 return -ENOMEM;
2679
2680         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2681         if (err < 0)
2682                 goto err_parse;
2683
2684         spin_lock(&adapter->nfc_lock);
2685
2686         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2687                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2688                         err = -EEXIST;
2689                         NL_SET_ERR_MSG_MOD(extack,
2690                                            "This filter is already set in ethtool");
2691                         goto err_locked;
2692                 }
2693         }
2694
2695         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2696                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2697                         err = -EEXIST;
2698                         NL_SET_ERR_MSG_MOD(extack,
2699                                            "This filter is already set in cls_flower");
2700                         goto err_locked;
2701                 }
2702         }
2703
2704         err = igb_add_filter(adapter, filter);
2705         if (err < 0) {
2706                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2707                 goto err_locked;
2708         }
2709
2710         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2711
2712         spin_unlock(&adapter->nfc_lock);
2713
2714         return 0;
2715
2716 err_locked:
2717         spin_unlock(&adapter->nfc_lock);
2718
2719 err_parse:
2720         kfree(filter);
2721
2722         return err;
2723 }
2724
2725 static int igb_delete_clsflower(struct igb_adapter *adapter,
2726                                 struct flow_cls_offload *cls_flower)
2727 {
2728         struct igb_nfc_filter *filter;
2729         int err;
2730
2731         spin_lock(&adapter->nfc_lock);
2732
2733         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2734                 if (filter->cookie == cls_flower->cookie)
2735                         break;
2736
2737         if (!filter) {
2738                 err = -ENOENT;
2739                 goto out;
2740         }
2741
2742         err = igb_erase_filter(adapter, filter);
2743         if (err < 0)
2744                 goto out;
2745
2746         hlist_del(&filter->nfc_node);
2747         kfree(filter);
2748
2749 out:
2750         spin_unlock(&adapter->nfc_lock);
2751
2752         return err;
2753 }
2754
2755 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2756                                    struct flow_cls_offload *cls_flower)
2757 {
2758         switch (cls_flower->command) {
2759         case FLOW_CLS_REPLACE:
2760                 return igb_configure_clsflower(adapter, cls_flower);
2761         case FLOW_CLS_DESTROY:
2762                 return igb_delete_clsflower(adapter, cls_flower);
2763         case FLOW_CLS_STATS:
2764                 return -EOPNOTSUPP;
2765         default:
2766                 return -EOPNOTSUPP;
2767         }
2768 }
2769
2770 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2771                                  void *cb_priv)
2772 {
2773         struct igb_adapter *adapter = cb_priv;
2774
2775         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2776                 return -EOPNOTSUPP;
2777
2778         switch (type) {
2779         case TC_SETUP_CLSFLOWER:
2780                 return igb_setup_tc_cls_flower(adapter, type_data);
2781
2782         default:
2783                 return -EOPNOTSUPP;
2784         }
2785 }
2786
2787 static int igb_offload_txtime(struct igb_adapter *adapter,
2788                               struct tc_etf_qopt_offload *qopt)
2789 {
2790         struct e1000_hw *hw = &adapter->hw;
2791         int err;
2792
2793         /* Launchtime offloading is only supported by i210 controller. */
2794         if (hw->mac.type != e1000_i210)
2795                 return -EOPNOTSUPP;
2796
2797         /* Launchtime offloading is only supported by queues 0 and 1. */
2798         if (qopt->queue < 0 || qopt->queue > 1)
2799                 return -EINVAL;
2800
2801         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2802         if (err)
2803                 return err;
2804
2805         igb_offload_apply(adapter, qopt->queue);
2806
2807         return 0;
2808 }
2809
2810 static LIST_HEAD(igb_block_cb_list);
2811
2812 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2813                         void *type_data)
2814 {
2815         struct igb_adapter *adapter = netdev_priv(dev);
2816
2817         switch (type) {
2818         case TC_SETUP_QDISC_CBS:
2819                 return igb_offload_cbs(adapter, type_data);
2820         case TC_SETUP_BLOCK:
2821                 return flow_block_cb_setup_simple(type_data,
2822                                                   &igb_block_cb_list,
2823                                                   igb_setup_tc_block_cb,
2824                                                   adapter, adapter, true);
2825
2826         case TC_SETUP_QDISC_ETF:
2827                 return igb_offload_txtime(adapter, type_data);
2828
2829         default:
2830                 return -EOPNOTSUPP;
2831         }
2832 }
2833
2834 static const struct net_device_ops igb_netdev_ops = {
2835         .ndo_open               = igb_open,
2836         .ndo_stop               = igb_close,
2837         .ndo_start_xmit         = igb_xmit_frame,
2838         .ndo_get_stats64        = igb_get_stats64,
2839         .ndo_set_rx_mode        = igb_set_rx_mode,
2840         .ndo_set_mac_address    = igb_set_mac,
2841         .ndo_change_mtu         = igb_change_mtu,
2842         .ndo_do_ioctl           = igb_ioctl,
2843         .ndo_tx_timeout         = igb_tx_timeout,
2844         .ndo_validate_addr      = eth_validate_addr,
2845         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2846         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2847         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2848         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2849         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2850         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2851         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
2852         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2853         .ndo_fix_features       = igb_fix_features,
2854         .ndo_set_features       = igb_set_features,
2855         .ndo_fdb_add            = igb_ndo_fdb_add,
2856         .ndo_features_check     = igb_features_check,
2857         .ndo_setup_tc           = igb_setup_tc,
2858 };
2859
2860 /**
2861  * igb_set_fw_version - Configure version string for ethtool
2862  * @adapter: adapter struct
2863  **/
2864 void igb_set_fw_version(struct igb_adapter *adapter)
2865 {
2866         struct e1000_hw *hw = &adapter->hw;
2867         struct e1000_fw_version fw;
2868
2869         igb_get_fw_version(hw, &fw);
2870
2871         switch (hw->mac.type) {
2872         case e1000_i210:
2873         case e1000_i211:
2874                 if (!(igb_get_flash_presence_i210(hw))) {
2875                         snprintf(adapter->fw_version,
2876                                  sizeof(adapter->fw_version),
2877                                  "%2d.%2d-%d",
2878                                  fw.invm_major, fw.invm_minor,
2879                                  fw.invm_img_type);
2880                         break;
2881                 }
2882                 /* fall through */
2883         default:
2884                 /* if option is rom valid, display its version too */
2885                 if (fw.or_valid) {
2886                         snprintf(adapter->fw_version,
2887                                  sizeof(adapter->fw_version),
2888                                  "%d.%d, 0x%08x, %d.%d.%d",
2889                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2890                                  fw.or_major, fw.or_build, fw.or_patch);
2891                 /* no option rom */
2892                 } else if (fw.etrack_id != 0X0000) {
2893                         snprintf(adapter->fw_version,
2894                             sizeof(adapter->fw_version),
2895                             "%d.%d, 0x%08x",
2896                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2897                 } else {
2898                 snprintf(adapter->fw_version,
2899                     sizeof(adapter->fw_version),
2900                     "%d.%d.%d",
2901                     fw.eep_major, fw.eep_minor, fw.eep_build);
2902                 }
2903                 break;
2904         }
2905 }
2906
2907 /**
2908  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2909  *
2910  * @adapter: adapter struct
2911  **/
2912 static void igb_init_mas(struct igb_adapter *adapter)
2913 {
2914         struct e1000_hw *hw = &adapter->hw;
2915         u16 eeprom_data;
2916
2917         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2918         switch (hw->bus.func) {
2919         case E1000_FUNC_0:
2920                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2921                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2922                         netdev_info(adapter->netdev,
2923                                 "MAS: Enabling Media Autosense for port %d\n",
2924                                 hw->bus.func);
2925                 }
2926                 break;
2927         case E1000_FUNC_1:
2928                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2929                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2930                         netdev_info(adapter->netdev,
2931                                 "MAS: Enabling Media Autosense for port %d\n",
2932                                 hw->bus.func);
2933                 }
2934                 break;
2935         case E1000_FUNC_2:
2936                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2937                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2938                         netdev_info(adapter->netdev,
2939                                 "MAS: Enabling Media Autosense for port %d\n",
2940                                 hw->bus.func);
2941                 }
2942                 break;
2943         case E1000_FUNC_3:
2944                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2945                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2946                         netdev_info(adapter->netdev,
2947                                 "MAS: Enabling Media Autosense for port %d\n",
2948                                 hw->bus.func);
2949                 }
2950                 break;
2951         default:
2952                 /* Shouldn't get here */
2953                 netdev_err(adapter->netdev,
2954                         "MAS: Invalid port configuration, returning\n");
2955                 break;
2956         }
2957 }
2958
2959 /**
2960  *  igb_init_i2c - Init I2C interface
2961  *  @adapter: pointer to adapter structure
2962  **/
2963 static s32 igb_init_i2c(struct igb_adapter *adapter)
2964 {
2965         s32 status = 0;
2966
2967         /* I2C interface supported on i350 devices */
2968         if (adapter->hw.mac.type != e1000_i350)
2969                 return 0;
2970
2971         /* Initialize the i2c bus which is controlled by the registers.
2972          * This bus will use the i2c_algo_bit structue that implements
2973          * the protocol through toggling of the 4 bits in the register.
2974          */
2975         adapter->i2c_adap.owner = THIS_MODULE;
2976         adapter->i2c_algo = igb_i2c_algo;
2977         adapter->i2c_algo.data = adapter;
2978         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2979         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2980         strlcpy(adapter->i2c_adap.name, "igb BB",
2981                 sizeof(adapter->i2c_adap.name));
2982         status = i2c_bit_add_bus(&adapter->i2c_adap);
2983         return status;
2984 }
2985
2986 /**
2987  *  igb_probe - Device Initialization Routine
2988  *  @pdev: PCI device information struct
2989  *  @ent: entry in igb_pci_tbl
2990  *
2991  *  Returns 0 on success, negative on failure
2992  *
2993  *  igb_probe initializes an adapter identified by a pci_dev structure.
2994  *  The OS initialization, configuring of the adapter private structure,
2995  *  and a hardware reset occur.
2996  **/
2997 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2998 {
2999         struct net_device *netdev;
3000         struct igb_adapter *adapter;
3001         struct e1000_hw *hw;
3002         u16 eeprom_data = 0;
3003         s32 ret_val;
3004         static int global_quad_port_a; /* global quad port a indication */
3005         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3006         int err, pci_using_dac;
3007         u8 part_str[E1000_PBANUM_LENGTH];
3008
3009         /* Catch broken hardware that put the wrong VF device ID in
3010          * the PCIe SR-IOV capability.
3011          */
3012         if (pdev->is_virtfn) {
3013                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
3014                         pci_name(pdev), pdev->vendor, pdev->device);
3015                 return -EINVAL;
3016         }
3017
3018         err = pci_enable_device_mem(pdev);
3019         if (err)
3020                 return err;
3021
3022         pci_using_dac = 0;
3023         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3024         if (!err) {
3025                 pci_using_dac = 1;
3026         } else {
3027                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3028                 if (err) {
3029                         dev_err(&pdev->dev,
3030                                 "No usable DMA configuration, aborting\n");
3031                         goto err_dma;
3032                 }
3033         }
3034
3035         err = pci_request_mem_regions(pdev, igb_driver_name);
3036         if (err)
3037                 goto err_pci_reg;
3038
3039         pci_enable_pcie_error_reporting(pdev);
3040
3041         pci_set_master(pdev);
3042         pci_save_state(pdev);
3043
3044         err = -ENOMEM;
3045         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3046                                    IGB_MAX_TX_QUEUES);
3047         if (!netdev)
3048                 goto err_alloc_etherdev;
3049
3050         SET_NETDEV_DEV(netdev, &pdev->dev);
3051
3052         pci_set_drvdata(pdev, netdev);
3053         adapter = netdev_priv(netdev);
3054         adapter->netdev = netdev;
3055         adapter->pdev = pdev;
3056         hw = &adapter->hw;
3057         hw->back = adapter;
3058         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3059
3060         err = -EIO;
3061         adapter->io_addr = pci_iomap(pdev, 0, 0);
3062         if (!adapter->io_addr)
3063                 goto err_ioremap;
3064         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3065         hw->hw_addr = adapter->io_addr;
3066
3067         netdev->netdev_ops = &igb_netdev_ops;
3068         igb_set_ethtool_ops(netdev);
3069         netdev->watchdog_timeo = 5 * HZ;
3070
3071         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3072
3073         netdev->mem_start = pci_resource_start(pdev, 0);
3074         netdev->mem_end = pci_resource_end(pdev, 0);
3075
3076         /* PCI config space info */
3077         hw->vendor_id = pdev->vendor;
3078         hw->device_id = pdev->device;
3079         hw->revision_id = pdev->revision;
3080         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3081         hw->subsystem_device_id = pdev->subsystem_device;
3082
3083         /* Copy the default MAC, PHY and NVM function pointers */
3084         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3085         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3086         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3087         /* Initialize skew-specific constants */
3088         err = ei->get_invariants(hw);
3089         if (err)
3090                 goto err_sw_init;
3091
3092         /* setup the private structure */
3093         err = igb_sw_init(adapter);
3094         if (err)
3095                 goto err_sw_init;
3096
3097         igb_get_bus_info_pcie(hw);
3098
3099         hw->phy.autoneg_wait_to_complete = false;
3100
3101         /* Copper options */
3102         if (hw->phy.media_type == e1000_media_type_copper) {
3103                 hw->phy.mdix = AUTO_ALL_MODES;
3104                 hw->phy.disable_polarity_correction = false;
3105                 hw->phy.ms_type = e1000_ms_hw_default;
3106         }
3107
3108         if (igb_check_reset_block(hw))
3109                 dev_info(&pdev->dev,
3110                         "PHY reset is blocked due to SOL/IDER session.\n");
3111
3112         /* features is initialized to 0 in allocation, it might have bits
3113          * set by igb_sw_init so we should use an or instead of an
3114          * assignment.
3115          */
3116         netdev->features |= NETIF_F_SG |
3117                             NETIF_F_TSO |
3118                             NETIF_F_TSO6 |
3119                             NETIF_F_RXHASH |
3120                             NETIF_F_RXCSUM |
3121                             NETIF_F_HW_CSUM;
3122
3123         if (hw->mac.type >= e1000_82576)
3124                 netdev->features |= NETIF_F_SCTP_CRC;
3125
3126         if (hw->mac.type >= e1000_i350)
3127                 netdev->features |= NETIF_F_HW_TC;
3128
3129 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3130                                   NETIF_F_GSO_GRE_CSUM | \
3131                                   NETIF_F_GSO_IPXIP4 | \
3132                                   NETIF_F_GSO_IPXIP6 | \
3133                                   NETIF_F_GSO_UDP_TUNNEL | \
3134                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3135
3136         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3137         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3138
3139         /* copy netdev features into list of user selectable features */
3140         netdev->hw_features |= netdev->features |
3141                                NETIF_F_HW_VLAN_CTAG_RX |
3142                                NETIF_F_HW_VLAN_CTAG_TX |
3143                                NETIF_F_RXALL;
3144
3145         if (hw->mac.type >= e1000_i350)
3146                 netdev->hw_features |= NETIF_F_NTUPLE;
3147
3148         if (pci_using_dac)
3149                 netdev->features |= NETIF_F_HIGHDMA;
3150
3151         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3152         netdev->mpls_features |= NETIF_F_HW_CSUM;
3153         netdev->hw_enc_features |= netdev->vlan_features;
3154
3155         /* set this bit last since it cannot be part of vlan_features */
3156         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3157                             NETIF_F_HW_VLAN_CTAG_RX |
3158                             NETIF_F_HW_VLAN_CTAG_TX;
3159
3160         netdev->priv_flags |= IFF_SUPP_NOFCS;
3161
3162         netdev->priv_flags |= IFF_UNICAST_FLT;
3163
3164         /* MTU range: 68 - 9216 */
3165         netdev->min_mtu = ETH_MIN_MTU;
3166         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3167
3168         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3169
3170         /* before reading the NVM, reset the controller to put the device in a
3171          * known good starting state
3172          */
3173         hw->mac.ops.reset_hw(hw);
3174
3175         /* make sure the NVM is good , i211/i210 parts can have special NVM
3176          * that doesn't contain a checksum
3177          */
3178         switch (hw->mac.type) {
3179         case e1000_i210:
3180         case e1000_i211:
3181                 if (igb_get_flash_presence_i210(hw)) {
3182                         if (hw->nvm.ops.validate(hw) < 0) {
3183                                 dev_err(&pdev->dev,
3184                                         "The NVM Checksum Is Not Valid\n");
3185                                 err = -EIO;
3186                                 goto err_eeprom;
3187                         }
3188                 }
3189                 break;
3190         default:
3191                 if (hw->nvm.ops.validate(hw) < 0) {
3192                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3193                         err = -EIO;
3194                         goto err_eeprom;
3195                 }
3196                 break;
3197         }
3198
3199         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3200                 /* copy the MAC address out of the NVM */
3201                 if (hw->mac.ops.read_mac_addr(hw))
3202                         dev_err(&pdev->dev, "NVM Read Error\n");
3203         }
3204
3205         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3206
3207         if (!is_valid_ether_addr(netdev->dev_addr)) {
3208                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3209                 err = -EIO;
3210                 goto err_eeprom;
3211         }
3212
3213         igb_set_default_mac_filter(adapter);
3214
3215         /* get firmware version for ethtool -i */
3216         igb_set_fw_version(adapter);
3217
3218         /* configure RXPBSIZE and TXPBSIZE */
3219         if (hw->mac.type == e1000_i210) {
3220                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3221                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3222         }
3223
3224         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3225         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3226
3227         INIT_WORK(&adapter->reset_task, igb_reset_task);
3228         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3229
3230         /* Initialize link properties that are user-changeable */
3231         adapter->fc_autoneg = true;
3232         hw->mac.autoneg = true;
3233         hw->phy.autoneg_advertised = 0x2f;
3234
3235         hw->fc.requested_mode = e1000_fc_default;
3236         hw->fc.current_mode = e1000_fc_default;
3237
3238         igb_validate_mdi_setting(hw);
3239
3240         /* By default, support wake on port A */
3241         if (hw->bus.func == 0)
3242                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3243
3244         /* Check the NVM for wake support on non-port A ports */
3245         if (hw->mac.type >= e1000_82580)
3246                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3247                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3248                                  &eeprom_data);
3249         else if (hw->bus.func == 1)
3250                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3251
3252         if (eeprom_data & IGB_EEPROM_APME)
3253                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3254
3255         /* now that we have the eeprom settings, apply the special cases where
3256          * the eeprom may be wrong or the board simply won't support wake on
3257          * lan on a particular port
3258          */
3259         switch (pdev->device) {
3260         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3261                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3262                 break;
3263         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3264         case E1000_DEV_ID_82576_FIBER:
3265         case E1000_DEV_ID_82576_SERDES:
3266                 /* Wake events only supported on port A for dual fiber
3267                  * regardless of eeprom setting
3268                  */
3269                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3270                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3271                 break;
3272         case E1000_DEV_ID_82576_QUAD_COPPER:
3273         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3274                 /* if quad port adapter, disable WoL on all but port A */
3275                 if (global_quad_port_a != 0)
3276                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3277                 else
3278                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3279                 /* Reset for multiple quad port adapters */
3280                 if (++global_quad_port_a == 4)
3281                         global_quad_port_a = 0;
3282                 break;
3283         default:
3284                 /* If the device can't wake, don't set software support */
3285                 if (!device_can_wakeup(&adapter->pdev->dev))
3286                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3287         }
3288
3289         /* initialize the wol settings based on the eeprom settings */
3290         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3291                 adapter->wol |= E1000_WUFC_MAG;
3292
3293         /* Some vendors want WoL disabled by default, but still supported */
3294         if ((hw->mac.type == e1000_i350) &&
3295             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3296                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3297                 adapter->wol = 0;
3298         }
3299
3300         /* Some vendors want the ability to Use the EEPROM setting as
3301          * enable/disable only, and not for capability
3302          */
3303         if (((hw->mac.type == e1000_i350) ||
3304              (hw->mac.type == e1000_i354)) &&
3305             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3306                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3307                 adapter->wol = 0;
3308         }
3309         if (hw->mac.type == e1000_i350) {
3310                 if (((pdev->subsystem_device == 0x5001) ||
3311                      (pdev->subsystem_device == 0x5002)) &&
3312                                 (hw->bus.func == 0)) {
3313                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3314                         adapter->wol = 0;
3315                 }
3316                 if (pdev->subsystem_device == 0x1F52)
3317                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3318         }
3319
3320         device_set_wakeup_enable(&adapter->pdev->dev,
3321                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3322
3323         /* reset the hardware with the new settings */
3324         igb_reset(adapter);
3325
3326         /* Init the I2C interface */
3327         err = igb_init_i2c(adapter);
3328         if (err) {
3329                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3330                 goto err_eeprom;
3331         }
3332
3333         /* let the f/w know that the h/w is now under the control of the
3334          * driver.
3335          */
3336         igb_get_hw_control(adapter);
3337
3338         strcpy(netdev->name, "eth%d");
3339         err = register_netdev(netdev);
3340         if (err)
3341                 goto err_register;
3342
3343         /* carrier off reporting is important to ethtool even BEFORE open */
3344         netif_carrier_off(netdev);
3345
3346 #ifdef CONFIG_IGB_DCA
3347         if (dca_add_requester(&pdev->dev) == 0) {
3348                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3349                 dev_info(&pdev->dev, "DCA enabled\n");
3350                 igb_setup_dca(adapter);
3351         }
3352
3353 #endif
3354 #ifdef CONFIG_IGB_HWMON
3355         /* Initialize the thermal sensor on i350 devices. */
3356         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3357                 u16 ets_word;
3358
3359                 /* Read the NVM to determine if this i350 device supports an
3360                  * external thermal sensor.
3361                  */
3362                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3363                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3364                         adapter->ets = true;
3365                 else
3366                         adapter->ets = false;
3367                 if (igb_sysfs_init(adapter))
3368                         dev_err(&pdev->dev,
3369                                 "failed to allocate sysfs resources\n");
3370         } else {
3371                 adapter->ets = false;
3372         }
3373 #endif
3374         /* Check if Media Autosense is enabled */
3375         adapter->ei = *ei;
3376         if (hw->dev_spec._82575.mas_capable)
3377                 igb_init_mas(adapter);
3378
3379         /* do hw tstamp init after resetting */
3380         igb_ptp_init(adapter);
3381
3382         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3383         /* print bus type/speed/width info, not applicable to i354 */
3384         if (hw->mac.type != e1000_i354) {
3385                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3386                          netdev->name,
3387                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3388                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3389                            "unknown"),
3390                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3391                           "Width x4" :
3392                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3393                           "Width x2" :
3394                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3395                           "Width x1" : "unknown"), netdev->dev_addr);
3396         }
3397
3398         if ((hw->mac.type >= e1000_i210 ||
3399              igb_get_flash_presence_i210(hw))) {
3400                 ret_val = igb_read_part_string(hw, part_str,
3401                                                E1000_PBANUM_LENGTH);
3402         } else {
3403                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3404         }
3405
3406         if (ret_val)
3407                 strcpy(part_str, "Unknown");
3408         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3409         dev_info(&pdev->dev,
3410                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3411                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3412                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3413                 adapter->num_rx_queues, adapter->num_tx_queues);
3414         if (hw->phy.media_type == e1000_media_type_copper) {
3415                 switch (hw->mac.type) {
3416                 case e1000_i350:
3417                 case e1000_i210:
3418                 case e1000_i211:
3419                         /* Enable EEE for internal copper PHY devices */
3420                         err = igb_set_eee_i350(hw, true, true);
3421                         if ((!err) &&
3422                             (!hw->dev_spec._82575.eee_disable)) {
3423                                 adapter->eee_advert =
3424                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3425                                 adapter->flags |= IGB_FLAG_EEE;
3426                         }
3427                         break;
3428                 case e1000_i354:
3429                         if ((rd32(E1000_CTRL_EXT) &
3430                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3431                                 err = igb_set_eee_i354(hw, true, true);
3432                                 if ((!err) &&
3433                                         (!hw->dev_spec._82575.eee_disable)) {
3434                                         adapter->eee_advert =
3435                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3436                                         adapter->flags |= IGB_FLAG_EEE;
3437                                 }
3438                         }
3439                         break;
3440                 default:
3441                         break;
3442                 }
3443         }
3444
3445         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NEVER_SKIP);
3446
3447         pm_runtime_put_noidle(&pdev->dev);
3448         return 0;
3449
3450 err_register:
3451         igb_release_hw_control(adapter);
3452         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3453 err_eeprom:
3454         if (!igb_check_reset_block(hw))
3455                 igb_reset_phy(hw);
3456
3457         if (hw->flash_address)
3458                 iounmap(hw->flash_address);
3459 err_sw_init:
3460         kfree(adapter->mac_table);
3461         kfree(adapter->shadow_vfta);
3462         igb_clear_interrupt_scheme(adapter);
3463 #ifdef CONFIG_PCI_IOV
3464         igb_disable_sriov(pdev);
3465 #endif
3466         pci_iounmap(pdev, adapter->io_addr);
3467 err_ioremap:
3468         free_netdev(netdev);
3469 err_alloc_etherdev:
3470         pci_release_mem_regions(pdev);
3471 err_pci_reg:
3472 err_dma:
3473         pci_disable_device(pdev);
3474         return err;
3475 }
3476
3477 #ifdef CONFIG_PCI_IOV
3478 static int igb_disable_sriov(struct pci_dev *pdev)
3479 {
3480         struct net_device *netdev = pci_get_drvdata(pdev);
3481         struct igb_adapter *adapter = netdev_priv(netdev);
3482         struct e1000_hw *hw = &adapter->hw;
3483
3484         /* reclaim resources allocated to VFs */
3485         if (adapter->vf_data) {
3486                 /* disable iov and allow time for transactions to clear */
3487                 if (pci_vfs_assigned(pdev)) {
3488                         dev_warn(&pdev->dev,
3489                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3490                         return -EPERM;
3491                 } else {
3492                         pci_disable_sriov(pdev);
3493                         msleep(500);
3494                 }
3495
3496                 kfree(adapter->vf_mac_list);
3497                 adapter->vf_mac_list = NULL;
3498                 kfree(adapter->vf_data);
3499                 adapter->vf_data = NULL;
3500                 adapter->vfs_allocated_count = 0;
3501                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3502                 wrfl();
3503                 msleep(100);
3504                 dev_info(&pdev->dev, "IOV Disabled\n");
3505
3506                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3507                 adapter->flags |= IGB_FLAG_DMAC;
3508         }
3509
3510         return 0;
3511 }
3512
3513 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3514 {
3515         struct net_device *netdev = pci_get_drvdata(pdev);
3516         struct igb_adapter *adapter = netdev_priv(netdev);
3517         int old_vfs = pci_num_vf(pdev);
3518         struct vf_mac_filter *mac_list;
3519         int err = 0;
3520         int num_vf_mac_filters, i;
3521
3522         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3523                 err = -EPERM;
3524                 goto out;
3525         }
3526         if (!num_vfs)
3527                 goto out;
3528
3529         if (old_vfs) {
3530                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3531                          old_vfs, max_vfs);
3532                 adapter->vfs_allocated_count = old_vfs;
3533         } else
3534                 adapter->vfs_allocated_count = num_vfs;
3535
3536         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3537                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3538
3539         /* if allocation failed then we do not support SR-IOV */
3540         if (!adapter->vf_data) {
3541                 adapter->vfs_allocated_count = 0;
3542                 err = -ENOMEM;
3543                 goto out;
3544         }
3545
3546         /* Due to the limited number of RAR entries calculate potential
3547          * number of MAC filters available for the VFs. Reserve entries
3548          * for PF default MAC, PF MAC filters and at least one RAR entry
3549          * for each VF for VF MAC.
3550          */
3551         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3552                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3553                               adapter->vfs_allocated_count);
3554
3555         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3556                                        sizeof(struct vf_mac_filter),
3557                                        GFP_KERNEL);
3558
3559         mac_list = adapter->vf_mac_list;
3560         INIT_LIST_HEAD(&adapter->vf_macs.l);
3561
3562         if (adapter->vf_mac_list) {
3563                 /* Initialize list of VF MAC filters */
3564                 for (i = 0; i < num_vf_mac_filters; i++) {
3565                         mac_list->vf = -1;
3566                         mac_list->free = true;
3567                         list_add(&mac_list->l, &adapter->vf_macs.l);
3568                         mac_list++;
3569                 }
3570         } else {
3571                 /* If we could not allocate memory for the VF MAC filters
3572                  * we can continue without this feature but warn user.
3573                  */
3574                 dev_err(&pdev->dev,
3575                         "Unable to allocate memory for VF MAC filter list\n");
3576         }
3577
3578         /* only call pci_enable_sriov() if no VFs are allocated already */
3579         if (!old_vfs) {
3580                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3581                 if (err)
3582                         goto err_out;
3583         }
3584         dev_info(&pdev->dev, "%d VFs allocated\n",
3585                  adapter->vfs_allocated_count);
3586         for (i = 0; i < adapter->vfs_allocated_count; i++)
3587                 igb_vf_configure(adapter, i);
3588
3589         /* DMA Coalescing is not supported in IOV mode. */
3590         adapter->flags &= ~IGB_FLAG_DMAC;
3591         goto out;
3592
3593 err_out:
3594         kfree(adapter->vf_mac_list);
3595         adapter->vf_mac_list = NULL;
3596         kfree(adapter->vf_data);
3597         adapter->vf_data = NULL;
3598         adapter->vfs_allocated_count = 0;
3599 out:
3600         return err;
3601 }
3602
3603 #endif
3604 /**
3605  *  igb_remove_i2c - Cleanup  I2C interface
3606  *  @adapter: pointer to adapter structure
3607  **/
3608 static void igb_remove_i2c(struct igb_adapter *adapter)
3609 {
3610         /* free the adapter bus structure */
3611         i2c_del_adapter(&adapter->i2c_adap);
3612 }
3613
3614 /**
3615  *  igb_remove - Device Removal Routine
3616  *  @pdev: PCI device information struct
3617  *
3618  *  igb_remove is called by the PCI subsystem to alert the driver
3619  *  that it should release a PCI device.  The could be caused by a
3620  *  Hot-Plug event, or because the driver is going to be removed from
3621  *  memory.
3622  **/
3623 static void igb_remove(struct pci_dev *pdev)
3624 {
3625         struct net_device *netdev = pci_get_drvdata(pdev);
3626         struct igb_adapter *adapter = netdev_priv(netdev);
3627         struct e1000_hw *hw = &adapter->hw;
3628
3629         pm_runtime_get_noresume(&pdev->dev);
3630 #ifdef CONFIG_IGB_HWMON
3631         igb_sysfs_exit(adapter);
3632 #endif
3633         igb_remove_i2c(adapter);
3634         igb_ptp_stop(adapter);
3635         /* The watchdog timer may be rescheduled, so explicitly
3636          * disable watchdog from being rescheduled.
3637          */
3638         set_bit(__IGB_DOWN, &adapter->state);
3639         del_timer_sync(&adapter->watchdog_timer);
3640         del_timer_sync(&adapter->phy_info_timer);
3641
3642         cancel_work_sync(&adapter->reset_task);
3643         cancel_work_sync(&adapter->watchdog_task);
3644
3645 #ifdef CONFIG_IGB_DCA
3646         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3647                 dev_info(&pdev->dev, "DCA disabled\n");
3648                 dca_remove_requester(&pdev->dev);
3649                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3650                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3651         }
3652 #endif
3653
3654         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3655          * would have already happened in close and is redundant.
3656          */
3657         igb_release_hw_control(adapter);
3658
3659 #ifdef CONFIG_PCI_IOV
3660         igb_disable_sriov(pdev);
3661 #endif
3662
3663         unregister_netdev(netdev);
3664
3665         igb_clear_interrupt_scheme(adapter);
3666
3667         pci_iounmap(pdev, adapter->io_addr);
3668         if (hw->flash_address)
3669                 iounmap(hw->flash_address);
3670         pci_release_mem_regions(pdev);
3671
3672         kfree(adapter->mac_table);
3673         kfree(adapter->shadow_vfta);
3674         free_netdev(netdev);
3675
3676         pci_disable_pcie_error_reporting(pdev);
3677
3678         pci_disable_device(pdev);
3679 }
3680
3681 /**
3682  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3683  *  @adapter: board private structure to initialize
3684  *
3685  *  This function initializes the vf specific data storage and then attempts to
3686  *  allocate the VFs.  The reason for ordering it this way is because it is much
3687  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3688  *  the memory for the VFs.
3689  **/
3690 static void igb_probe_vfs(struct igb_adapter *adapter)
3691 {
3692 #ifdef CONFIG_PCI_IOV
3693         struct pci_dev *pdev = adapter->pdev;
3694         struct e1000_hw *hw = &adapter->hw;
3695
3696         /* Virtualization features not supported on i210 family. */
3697         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3698                 return;
3699
3700         /* Of the below we really only want the effect of getting
3701          * IGB_FLAG_HAS_MSIX set (if available), without which
3702          * igb_enable_sriov() has no effect.
3703          */
3704         igb_set_interrupt_capability(adapter, true);
3705         igb_reset_interrupt_capability(adapter);
3706
3707         pci_sriov_set_totalvfs(pdev, 7);
3708         igb_enable_sriov(pdev, max_vfs);
3709
3710 #endif /* CONFIG_PCI_IOV */
3711 }
3712
3713 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3714 {
3715         struct e1000_hw *hw = &adapter->hw;
3716         unsigned int max_rss_queues;
3717
3718         /* Determine the maximum number of RSS queues supported. */
3719         switch (hw->mac.type) {
3720         case e1000_i211:
3721                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3722                 break;
3723         case e1000_82575:
3724         case e1000_i210:
3725                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3726                 break;
3727         case e1000_i350:
3728                 /* I350 cannot do RSS and SR-IOV at the same time */
3729                 if (!!adapter->vfs_allocated_count) {
3730                         max_rss_queues = 1;
3731                         break;
3732                 }
3733                 /* fall through */
3734         case e1000_82576:
3735                 if (!!adapter->vfs_allocated_count) {
3736                         max_rss_queues = 2;
3737                         break;
3738                 }
3739                 /* fall through */
3740         case e1000_82580:
3741         case e1000_i354:
3742         default:
3743                 max_rss_queues = IGB_MAX_RX_QUEUES;
3744                 break;
3745         }
3746
3747         return max_rss_queues;
3748 }
3749
3750 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3751 {
3752         u32 max_rss_queues;
3753
3754         max_rss_queues = igb_get_max_rss_queues(adapter);
3755         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3756
3757         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3758 }
3759
3760 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3761                               const u32 max_rss_queues)
3762 {
3763         struct e1000_hw *hw = &adapter->hw;
3764
3765         /* Determine if we need to pair queues. */
3766         switch (hw->mac.type) {
3767         case e1000_82575:
3768         case e1000_i211:
3769                 /* Device supports enough interrupts without queue pairing. */
3770                 break;
3771         case e1000_82576:
3772         case e1000_82580:
3773         case e1000_i350:
3774         case e1000_i354:
3775         case e1000_i210:
3776         default:
3777                 /* If rss_queues > half of max_rss_queues, pair the queues in
3778                  * order to conserve interrupts due to limited supply.
3779                  */
3780                 if (adapter->rss_queues > (max_rss_queues / 2))
3781                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3782                 else
3783                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3784                 break;
3785         }
3786 }
3787
3788 /**
3789  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3790  *  @adapter: board private structure to initialize
3791  *
3792  *  igb_sw_init initializes the Adapter private data structure.
3793  *  Fields are initialized based on PCI device information and
3794  *  OS network device settings (MTU size).
3795  **/
3796 static int igb_sw_init(struct igb_adapter *adapter)
3797 {
3798         struct e1000_hw *hw = &adapter->hw;
3799         struct net_device *netdev = adapter->netdev;
3800         struct pci_dev *pdev = adapter->pdev;
3801
3802         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3803
3804         /* set default ring sizes */
3805         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3806         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3807
3808         /* set default ITR values */
3809         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3810         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3811
3812         /* set default work limits */
3813         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3814
3815         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3816                                   VLAN_HLEN;
3817         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3818
3819         spin_lock_init(&adapter->nfc_lock);
3820         spin_lock_init(&adapter->stats64_lock);
3821 #ifdef CONFIG_PCI_IOV
3822         switch (hw->mac.type) {
3823         case e1000_82576:
3824         case e1000_i350:
3825                 if (max_vfs > 7) {
3826                         dev_warn(&pdev->dev,
3827                                  "Maximum of 7 VFs per PF, using max\n");
3828                         max_vfs = adapter->vfs_allocated_count = 7;
3829                 } else
3830                         adapter->vfs_allocated_count = max_vfs;
3831                 if (adapter->vfs_allocated_count)
3832                         dev_warn(&pdev->dev,
3833                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3834                 break;
3835         default:
3836                 break;
3837         }
3838 #endif /* CONFIG_PCI_IOV */
3839
3840         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3841         adapter->flags |= IGB_FLAG_HAS_MSIX;
3842
3843         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
3844                                      sizeof(struct igb_mac_addr),
3845                                      GFP_KERNEL);
3846         if (!adapter->mac_table)
3847                 return -ENOMEM;
3848
3849         igb_probe_vfs(adapter);
3850
3851         igb_init_queue_configuration(adapter);
3852
3853         /* Setup and initialize a copy of the hw vlan table array */
3854         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3855                                        GFP_KERNEL);
3856         if (!adapter->shadow_vfta)
3857                 return -ENOMEM;
3858
3859         /* This call may decrease the number of queues */
3860         if (igb_init_interrupt_scheme(adapter, true)) {
3861                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3862                 return -ENOMEM;
3863         }
3864
3865         /* Explicitly disable IRQ since the NIC can be in any state. */
3866         igb_irq_disable(adapter);
3867
3868         if (hw->mac.type >= e1000_i350)
3869                 adapter->flags &= ~IGB_FLAG_DMAC;
3870
3871         set_bit(__IGB_DOWN, &adapter->state);
3872         return 0;
3873 }
3874
3875 /**
3876  *  igb_open - Called when a network interface is made active
3877  *  @netdev: network interface device structure
3878  *
3879  *  Returns 0 on success, negative value on failure
3880  *
3881  *  The open entry point is called when a network interface is made
3882  *  active by the system (IFF_UP).  At this point all resources needed
3883  *  for transmit and receive operations are allocated, the interrupt
3884  *  handler is registered with the OS, the watchdog timer is started,
3885  *  and the stack is notified that the interface is ready.
3886  **/
3887 static int __igb_open(struct net_device *netdev, bool resuming)
3888 {
3889         struct igb_adapter *adapter = netdev_priv(netdev);
3890         struct e1000_hw *hw = &adapter->hw;
3891         struct pci_dev *pdev = adapter->pdev;
3892         int err;
3893         int i;
3894
3895         /* disallow open during test */
3896         if (test_bit(__IGB_TESTING, &adapter->state)) {
3897                 WARN_ON(resuming);
3898                 return -EBUSY;
3899         }
3900
3901         if (!resuming)
3902                 pm_runtime_get_sync(&pdev->dev);
3903
3904         netif_carrier_off(netdev);
3905
3906         /* allocate transmit descriptors */
3907         err = igb_setup_all_tx_resources(adapter);
3908         if (err)
3909                 goto err_setup_tx;
3910
3911         /* allocate receive descriptors */
3912         err = igb_setup_all_rx_resources(adapter);
3913         if (err)
3914                 goto err_setup_rx;
3915
3916         igb_power_up_link(adapter);
3917
3918         /* before we allocate an interrupt, we must be ready to handle it.
3919          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3920          * as soon as we call pci_request_irq, so we have to setup our
3921          * clean_rx handler before we do so.
3922          */
3923         igb_configure(adapter);
3924
3925         err = igb_request_irq(adapter);
3926         if (err)
3927                 goto err_req_irq;
3928
3929         /* Notify the stack of the actual queue counts. */
3930         err = netif_set_real_num_tx_queues(adapter->netdev,
3931                                            adapter->num_tx_queues);
3932         if (err)
3933                 goto err_set_queues;
3934
3935         err = netif_set_real_num_rx_queues(adapter->netdev,
3936                                            adapter->num_rx_queues);
3937         if (err)
3938                 goto err_set_queues;
3939
3940         /* From here on the code is the same as igb_up() */
3941         clear_bit(__IGB_DOWN, &adapter->state);
3942
3943         for (i = 0; i < adapter->num_q_vectors; i++)
3944                 napi_enable(&(adapter->q_vector[i]->napi));
3945
3946         /* Clear any pending interrupts. */
3947         rd32(E1000_TSICR);
3948         rd32(E1000_ICR);
3949
3950         igb_irq_enable(adapter);
3951
3952         /* notify VFs that reset has been completed */
3953         if (adapter->vfs_allocated_count) {
3954                 u32 reg_data = rd32(E1000_CTRL_EXT);
3955
3956                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3957                 wr32(E1000_CTRL_EXT, reg_data);
3958         }
3959
3960         netif_tx_start_all_queues(netdev);
3961
3962         if (!resuming)
3963                 pm_runtime_put(&pdev->dev);
3964
3965         /* start the watchdog. */
3966         hw->mac.get_link_status = 1;
3967         schedule_work(&adapter->watchdog_task);
3968
3969         return 0;
3970
3971 err_set_queues:
3972         igb_free_irq(adapter);
3973 err_req_irq:
3974         igb_release_hw_control(adapter);
3975         igb_power_down_link(adapter);
3976         igb_free_all_rx_resources(adapter);
3977 err_setup_rx:
3978         igb_free_all_tx_resources(adapter);
3979 err_setup_tx:
3980         igb_reset(adapter);
3981         if (!resuming)
3982                 pm_runtime_put(&pdev->dev);
3983
3984         return err;
3985 }
3986
3987 int igb_open(struct net_device *netdev)
3988 {
3989         return __igb_open(netdev, false);
3990 }
3991
3992 /**
3993  *  igb_close - Disables a network interface
3994  *  @netdev: network interface device structure
3995  *
3996  *  Returns 0, this is not allowed to fail
3997  *
3998  *  The close entry point is called when an interface is de-activated
3999  *  by the OS.  The hardware is still under the driver's control, but
4000  *  needs to be disabled.  A global MAC reset is issued to stop the
4001  *  hardware, and all transmit and receive resources are freed.
4002  **/
4003 static int __igb_close(struct net_device *netdev, bool suspending)
4004 {
4005         struct igb_adapter *adapter = netdev_priv(netdev);
4006         struct pci_dev *pdev = adapter->pdev;
4007
4008         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4009
4010         if (!suspending)
4011                 pm_runtime_get_sync(&pdev->dev);
4012
4013         igb_down(adapter);
4014         igb_free_irq(adapter);
4015
4016         igb_free_all_tx_resources(adapter);
4017         igb_free_all_rx_resources(adapter);
4018
4019         if (!suspending)
4020                 pm_runtime_put_sync(&pdev->dev);
4021         return 0;
4022 }
4023
4024 int igb_close(struct net_device *netdev)
4025 {
4026         if (netif_device_present(netdev) || netdev->dismantle)
4027                 return __igb_close(netdev, false);
4028         return 0;
4029 }
4030
4031 /**
4032  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4033  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4034  *
4035  *  Return 0 on success, negative on failure
4036  **/
4037 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4038 {
4039         struct device *dev = tx_ring->dev;
4040         int size;
4041
4042         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4043
4044         tx_ring->tx_buffer_info = vmalloc(size);
4045         if (!tx_ring->tx_buffer_info)
4046                 goto err;
4047
4048         /* round up to nearest 4K */
4049         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4050         tx_ring->size = ALIGN(tx_ring->size, 4096);
4051
4052         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4053                                            &tx_ring->dma, GFP_KERNEL);
4054         if (!tx_ring->desc)
4055                 goto err;
4056
4057         tx_ring->next_to_use = 0;
4058         tx_ring->next_to_clean = 0;
4059
4060         return 0;
4061
4062 err:
4063         vfree(tx_ring->tx_buffer_info);
4064         tx_ring->tx_buffer_info = NULL;
4065         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4066         return -ENOMEM;
4067 }
4068
4069 /**
4070  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4071  *                               (Descriptors) for all queues
4072  *  @adapter: board private structure
4073  *
4074  *  Return 0 on success, negative on failure
4075  **/
4076 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4077 {
4078         struct pci_dev *pdev = adapter->pdev;
4079         int i, err = 0;
4080
4081         for (i = 0; i < adapter->num_tx_queues; i++) {
4082                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4083                 if (err) {
4084                         dev_err(&pdev->dev,
4085                                 "Allocation for Tx Queue %u failed\n", i);
4086                         for (i--; i >= 0; i--)
4087                                 igb_free_tx_resources(adapter->tx_ring[i]);
4088                         break;
4089                 }
4090         }
4091
4092         return err;
4093 }
4094
4095 /**
4096  *  igb_setup_tctl - configure the transmit control registers
4097  *  @adapter: Board private structure
4098  **/
4099 void igb_setup_tctl(struct igb_adapter *adapter)
4100 {
4101         struct e1000_hw *hw = &adapter->hw;
4102         u32 tctl;
4103
4104         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4105         wr32(E1000_TXDCTL(0), 0);
4106
4107         /* Program the Transmit Control Register */
4108         tctl = rd32(E1000_TCTL);
4109         tctl &= ~E1000_TCTL_CT;
4110         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4111                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4112
4113         igb_config_collision_dist(hw);
4114
4115         /* Enable transmits */
4116         tctl |= E1000_TCTL_EN;
4117
4118         wr32(E1000_TCTL, tctl);
4119 }
4120
4121 /**
4122  *  igb_configure_tx_ring - Configure transmit ring after Reset
4123  *  @adapter: board private structure
4124  *  @ring: tx ring to configure
4125  *
4126  *  Configure a transmit ring after a reset.
4127  **/
4128 void igb_configure_tx_ring(struct igb_adapter *adapter,
4129                            struct igb_ring *ring)
4130 {
4131         struct e1000_hw *hw = &adapter->hw;
4132         u32 txdctl = 0;
4133         u64 tdba = ring->dma;
4134         int reg_idx = ring->reg_idx;
4135
4136         wr32(E1000_TDLEN(reg_idx),
4137              ring->count * sizeof(union e1000_adv_tx_desc));
4138         wr32(E1000_TDBAL(reg_idx),
4139              tdba & 0x00000000ffffffffULL);
4140         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4141
4142         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4143         wr32(E1000_TDH(reg_idx), 0);
4144         writel(0, ring->tail);
4145
4146         txdctl |= IGB_TX_PTHRESH;
4147         txdctl |= IGB_TX_HTHRESH << 8;
4148         txdctl |= IGB_TX_WTHRESH << 16;
4149
4150         /* reinitialize tx_buffer_info */
4151         memset(ring->tx_buffer_info, 0,
4152                sizeof(struct igb_tx_buffer) * ring->count);
4153
4154         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4155         wr32(E1000_TXDCTL(reg_idx), txdctl);
4156 }
4157
4158 /**
4159  *  igb_configure_tx - Configure transmit Unit after Reset
4160  *  @adapter: board private structure
4161  *
4162  *  Configure the Tx unit of the MAC after a reset.
4163  **/
4164 static void igb_configure_tx(struct igb_adapter *adapter)
4165 {
4166         struct e1000_hw *hw = &adapter->hw;
4167         int i;
4168
4169         /* disable the queues */
4170         for (i = 0; i < adapter->num_tx_queues; i++)
4171                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4172
4173         wrfl();
4174         usleep_range(10000, 20000);
4175
4176         for (i = 0; i < adapter->num_tx_queues; i++)
4177                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4178 }
4179
4180 /**
4181  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4182  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4183  *
4184  *  Returns 0 on success, negative on failure
4185  **/
4186 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4187 {
4188         struct device *dev = rx_ring->dev;
4189         int size;
4190
4191         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4192
4193         rx_ring->rx_buffer_info = vmalloc(size);
4194         if (!rx_ring->rx_buffer_info)
4195                 goto err;
4196
4197         /* Round up to nearest 4K */
4198         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4199         rx_ring->size = ALIGN(rx_ring->size, 4096);
4200
4201         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4202                                            &rx_ring->dma, GFP_KERNEL);
4203         if (!rx_ring->desc)
4204                 goto err;
4205
4206         rx_ring->next_to_alloc = 0;
4207         rx_ring->next_to_clean = 0;
4208         rx_ring->next_to_use = 0;
4209
4210         return 0;
4211
4212 err:
4213         vfree(rx_ring->rx_buffer_info);
4214         rx_ring->rx_buffer_info = NULL;
4215         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4216         return -ENOMEM;
4217 }
4218
4219 /**
4220  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4221  *                               (Descriptors) for all queues
4222  *  @adapter: board private structure
4223  *
4224  *  Return 0 on success, negative on failure
4225  **/
4226 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4227 {
4228         struct pci_dev *pdev = adapter->pdev;
4229         int i, err = 0;
4230
4231         for (i = 0; i < adapter->num_rx_queues; i++) {
4232                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4233                 if (err) {
4234                         dev_err(&pdev->dev,
4235                                 "Allocation for Rx Queue %u failed\n", i);
4236                         for (i--; i >= 0; i--)
4237                                 igb_free_rx_resources(adapter->rx_ring[i]);
4238                         break;
4239                 }
4240         }
4241
4242         return err;
4243 }
4244
4245 /**
4246  *  igb_setup_mrqc - configure the multiple receive queue control registers
4247  *  @adapter: Board private structure
4248  **/
4249 static void igb_setup_mrqc(struct igb_adapter *adapter)
4250 {
4251         struct e1000_hw *hw = &adapter->hw;
4252         u32 mrqc, rxcsum;
4253         u32 j, num_rx_queues;
4254         u32 rss_key[10];
4255
4256         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4257         for (j = 0; j < 10; j++)
4258                 wr32(E1000_RSSRK(j), rss_key[j]);
4259
4260         num_rx_queues = adapter->rss_queues;
4261
4262         switch (hw->mac.type) {
4263         case e1000_82576:
4264                 /* 82576 supports 2 RSS queues for SR-IOV */
4265                 if (adapter->vfs_allocated_count)
4266                         num_rx_queues = 2;
4267                 break;
4268         default:
4269                 break;
4270         }
4271
4272         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4273                 for (j = 0; j < IGB_RETA_SIZE; j++)
4274                         adapter->rss_indir_tbl[j] =
4275                         (j * num_rx_queues) / IGB_RETA_SIZE;
4276                 adapter->rss_indir_tbl_init = num_rx_queues;
4277         }
4278         igb_write_rss_indir_tbl(adapter);
4279
4280         /* Disable raw packet checksumming so that RSS hash is placed in
4281          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4282          * offloads as they are enabled by default
4283          */
4284         rxcsum = rd32(E1000_RXCSUM);
4285         rxcsum |= E1000_RXCSUM_PCSD;
4286
4287         if (adapter->hw.mac.type >= e1000_82576)
4288                 /* Enable Receive Checksum Offload for SCTP */
4289                 rxcsum |= E1000_RXCSUM_CRCOFL;
4290
4291         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4292         wr32(E1000_RXCSUM, rxcsum);
4293
4294         /* Generate RSS hash based on packet types, TCP/UDP
4295          * port numbers and/or IPv4/v6 src and dst addresses
4296          */
4297         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4298                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4299                E1000_MRQC_RSS_FIELD_IPV6 |
4300                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4301                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4302
4303         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4304                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4305         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4306                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4307
4308         /* If VMDq is enabled then we set the appropriate mode for that, else
4309          * we default to RSS so that an RSS hash is calculated per packet even
4310          * if we are only using one queue
4311          */
4312         if (adapter->vfs_allocated_count) {
4313                 if (hw->mac.type > e1000_82575) {
4314                         /* Set the default pool for the PF's first queue */
4315                         u32 vtctl = rd32(E1000_VT_CTL);
4316
4317                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4318                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4319                         vtctl |= adapter->vfs_allocated_count <<
4320                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4321                         wr32(E1000_VT_CTL, vtctl);
4322                 }
4323                 if (adapter->rss_queues > 1)
4324                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4325                 else
4326                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4327         } else {
4328                 if (hw->mac.type != e1000_i211)
4329                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4330         }
4331         igb_vmm_control(adapter);
4332
4333         wr32(E1000_MRQC, mrqc);
4334 }
4335
4336 /**
4337  *  igb_setup_rctl - configure the receive control registers
4338  *  @adapter: Board private structure
4339  **/
4340 void igb_setup_rctl(struct igb_adapter *adapter)
4341 {
4342         struct e1000_hw *hw = &adapter->hw;
4343         u32 rctl;
4344
4345         rctl = rd32(E1000_RCTL);
4346
4347         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4348         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4349
4350         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4351                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4352
4353         /* enable stripping of CRC. It's unlikely this will break BMC
4354          * redirection as it did with e1000. Newer features require
4355          * that the HW strips the CRC.
4356          */
4357         rctl |= E1000_RCTL_SECRC;
4358
4359         /* disable store bad packets and clear size bits. */
4360         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4361
4362         /* enable LPE to allow for reception of jumbo frames */
4363         rctl |= E1000_RCTL_LPE;
4364
4365         /* disable queue 0 to prevent tail write w/o re-config */
4366         wr32(E1000_RXDCTL(0), 0);
4367
4368         /* Attention!!!  For SR-IOV PF driver operations you must enable
4369          * queue drop for all VF and PF queues to prevent head of line blocking
4370          * if an un-trusted VF does not provide descriptors to hardware.
4371          */
4372         if (adapter->vfs_allocated_count) {
4373                 /* set all queue drop enable bits */
4374                 wr32(E1000_QDE, ALL_QUEUES);
4375         }
4376
4377         /* This is useful for sniffing bad packets. */
4378         if (adapter->netdev->features & NETIF_F_RXALL) {
4379                 /* UPE and MPE will be handled by normal PROMISC logic
4380                  * in e1000e_set_rx_mode
4381                  */
4382                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4383                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4384                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4385
4386                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4387                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4388                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4389                  * and that breaks VLANs.
4390                  */
4391         }
4392
4393         wr32(E1000_RCTL, rctl);
4394 }
4395
4396 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4397                                    int vfn)
4398 {
4399         struct e1000_hw *hw = &adapter->hw;
4400         u32 vmolr;
4401
4402         if (size > MAX_JUMBO_FRAME_SIZE)
4403                 size = MAX_JUMBO_FRAME_SIZE;
4404
4405         vmolr = rd32(E1000_VMOLR(vfn));
4406         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4407         vmolr |= size | E1000_VMOLR_LPE;
4408         wr32(E1000_VMOLR(vfn), vmolr);
4409
4410         return 0;
4411 }
4412
4413 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4414                                          int vfn, bool enable)
4415 {
4416         struct e1000_hw *hw = &adapter->hw;
4417         u32 val, reg;
4418
4419         if (hw->mac.type < e1000_82576)
4420                 return;
4421
4422         if (hw->mac.type == e1000_i350)
4423                 reg = E1000_DVMOLR(vfn);
4424         else
4425                 reg = E1000_VMOLR(vfn);
4426
4427         val = rd32(reg);
4428         if (enable)
4429                 val |= E1000_VMOLR_STRVLAN;
4430         else
4431                 val &= ~(E1000_VMOLR_STRVLAN);
4432         wr32(reg, val);
4433 }
4434
4435 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4436                                  int vfn, bool aupe)
4437 {
4438         struct e1000_hw *hw = &adapter->hw;
4439         u32 vmolr;
4440
4441         /* This register exists only on 82576 and newer so if we are older then
4442          * we should exit and do nothing
4443          */
4444         if (hw->mac.type < e1000_82576)
4445                 return;
4446
4447         vmolr = rd32(E1000_VMOLR(vfn));
4448         if (aupe)
4449                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4450         else
4451                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4452
4453         /* clear all bits that might not be set */
4454         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4455
4456         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4457                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4458         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4459          * multicast packets
4460          */
4461         if (vfn <= adapter->vfs_allocated_count)
4462                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4463
4464         wr32(E1000_VMOLR(vfn), vmolr);
4465 }
4466
4467 /**
4468  *  igb_configure_rx_ring - Configure a receive ring after Reset
4469  *  @adapter: board private structure
4470  *  @ring: receive ring to be configured
4471  *
4472  *  Configure the Rx unit of the MAC after a reset.
4473  **/
4474 void igb_configure_rx_ring(struct igb_adapter *adapter,
4475                            struct igb_ring *ring)
4476 {
4477         struct e1000_hw *hw = &adapter->hw;
4478         union e1000_adv_rx_desc *rx_desc;
4479         u64 rdba = ring->dma;
4480         int reg_idx = ring->reg_idx;
4481         u32 srrctl = 0, rxdctl = 0;
4482
4483         /* disable the queue */
4484         wr32(E1000_RXDCTL(reg_idx), 0);
4485
4486         /* Set DMA base address registers */
4487         wr32(E1000_RDBAL(reg_idx),
4488              rdba & 0x00000000ffffffffULL);
4489         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4490         wr32(E1000_RDLEN(reg_idx),
4491              ring->count * sizeof(union e1000_adv_rx_desc));
4492
4493         /* initialize head and tail */
4494         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4495         wr32(E1000_RDH(reg_idx), 0);
4496         writel(0, ring->tail);
4497
4498         /* set descriptor configuration */
4499         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4500         if (ring_uses_large_buffer(ring))
4501                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4502         else
4503                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4504         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4505         if (hw->mac.type >= e1000_82580)
4506                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4507         /* Only set Drop Enable if we are supporting multiple queues */
4508         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
4509                 srrctl |= E1000_SRRCTL_DROP_EN;
4510
4511         wr32(E1000_SRRCTL(reg_idx), srrctl);
4512
4513         /* set filtering for VMDQ pools */
4514         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4515
4516         rxdctl |= IGB_RX_PTHRESH;
4517         rxdctl |= IGB_RX_HTHRESH << 8;
4518         rxdctl |= IGB_RX_WTHRESH << 16;
4519
4520         /* initialize rx_buffer_info */
4521         memset(ring->rx_buffer_info, 0,
4522                sizeof(struct igb_rx_buffer) * ring->count);
4523
4524         /* initialize Rx descriptor 0 */
4525         rx_desc = IGB_RX_DESC(ring, 0);
4526         rx_desc->wb.upper.length = 0;
4527
4528         /* enable receive descriptor fetching */
4529         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4530         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4531 }
4532
4533 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4534                                   struct igb_ring *rx_ring)
4535 {
4536         /* set build_skb and buffer size flags */
4537         clear_ring_build_skb_enabled(rx_ring);
4538         clear_ring_uses_large_buffer(rx_ring);
4539
4540         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4541                 return;
4542
4543         set_ring_build_skb_enabled(rx_ring);
4544
4545 #if (PAGE_SIZE < 8192)
4546         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4547                 return;
4548
4549         set_ring_uses_large_buffer(rx_ring);
4550 #endif
4551 }
4552
4553 /**
4554  *  igb_configure_rx - Configure receive Unit after Reset
4555  *  @adapter: board private structure
4556  *
4557  *  Configure the Rx unit of the MAC after a reset.
4558  **/
4559 static void igb_configure_rx(struct igb_adapter *adapter)
4560 {
4561         int i;
4562
4563         /* set the correct pool for the PF default MAC address in entry 0 */
4564         igb_set_default_mac_filter(adapter);
4565
4566         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4567          * the Base and Length of the Rx Descriptor Ring
4568          */
4569         for (i = 0; i < adapter->num_rx_queues; i++) {
4570                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4571
4572                 igb_set_rx_buffer_len(adapter, rx_ring);
4573                 igb_configure_rx_ring(adapter, rx_ring);
4574         }
4575 }
4576
4577 /**
4578  *  igb_free_tx_resources - Free Tx Resources per Queue
4579  *  @tx_ring: Tx descriptor ring for a specific queue
4580  *
4581  *  Free all transmit software resources
4582  **/
4583 void igb_free_tx_resources(struct igb_ring *tx_ring)
4584 {
4585         igb_clean_tx_ring(tx_ring);
4586
4587         vfree(tx_ring->tx_buffer_info);
4588         tx_ring->tx_buffer_info = NULL;
4589
4590         /* if not set, then don't free */
4591         if (!tx_ring->desc)
4592                 return;
4593
4594         dma_free_coherent(tx_ring->dev, tx_ring->size,
4595                           tx_ring->desc, tx_ring->dma);
4596
4597         tx_ring->desc = NULL;
4598 }
4599
4600 /**
4601  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4602  *  @adapter: board private structure
4603  *
4604  *  Free all transmit software resources
4605  **/
4606 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4607 {
4608         int i;
4609
4610         for (i = 0; i < adapter->num_tx_queues; i++)
4611                 if (adapter->tx_ring[i])
4612                         igb_free_tx_resources(adapter->tx_ring[i]);
4613 }
4614
4615 /**
4616  *  igb_clean_tx_ring - Free Tx Buffers
4617  *  @tx_ring: ring to be cleaned
4618  **/
4619 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4620 {
4621         u16 i = tx_ring->next_to_clean;
4622         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4623
4624         while (i != tx_ring->next_to_use) {
4625                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4626
4627                 /* Free all the Tx ring sk_buffs */
4628                 dev_kfree_skb_any(tx_buffer->skb);
4629
4630                 /* unmap skb header data */
4631                 dma_unmap_single(tx_ring->dev,
4632                                  dma_unmap_addr(tx_buffer, dma),
4633                                  dma_unmap_len(tx_buffer, len),
4634                                  DMA_TO_DEVICE);
4635
4636                 /* check for eop_desc to determine the end of the packet */
4637                 eop_desc = tx_buffer->next_to_watch;
4638                 tx_desc = IGB_TX_DESC(tx_ring, i);
4639
4640                 /* unmap remaining buffers */
4641                 while (tx_desc != eop_desc) {
4642                         tx_buffer++;
4643                         tx_desc++;
4644                         i++;
4645                         if (unlikely(i == tx_ring->count)) {
4646                                 i = 0;
4647                                 tx_buffer = tx_ring->tx_buffer_info;
4648                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4649                         }
4650
4651                         /* unmap any remaining paged data */
4652                         if (dma_unmap_len(tx_buffer, len))
4653                                 dma_unmap_page(tx_ring->dev,
4654                                                dma_unmap_addr(tx_buffer, dma),
4655                                                dma_unmap_len(tx_buffer, len),
4656                                                DMA_TO_DEVICE);
4657                 }
4658
4659                 /* move us one more past the eop_desc for start of next pkt */
4660                 tx_buffer++;
4661                 i++;
4662                 if (unlikely(i == tx_ring->count)) {
4663                         i = 0;
4664                         tx_buffer = tx_ring->tx_buffer_info;
4665                 }
4666         }
4667
4668         /* reset BQL for queue */
4669         netdev_tx_reset_queue(txring_txq(tx_ring));
4670
4671         /* reset next_to_use and next_to_clean */
4672         tx_ring->next_to_use = 0;
4673         tx_ring->next_to_clean = 0;
4674 }
4675
4676 /**
4677  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4678  *  @adapter: board private structure
4679  **/
4680 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4681 {
4682         int i;
4683
4684         for (i = 0; i < adapter->num_tx_queues; i++)
4685                 if (adapter->tx_ring[i])
4686                         igb_clean_tx_ring(adapter->tx_ring[i]);
4687 }
4688
4689 /**
4690  *  igb_free_rx_resources - Free Rx Resources
4691  *  @rx_ring: ring to clean the resources from
4692  *
4693  *  Free all receive software resources
4694  **/
4695 void igb_free_rx_resources(struct igb_ring *rx_ring)
4696 {
4697         igb_clean_rx_ring(rx_ring);
4698
4699         vfree(rx_ring->rx_buffer_info);
4700         rx_ring->rx_buffer_info = NULL;
4701
4702         /* if not set, then don't free */
4703         if (!rx_ring->desc)
4704                 return;
4705
4706         dma_free_coherent(rx_ring->dev, rx_ring->size,
4707                           rx_ring->desc, rx_ring->dma);
4708
4709         rx_ring->desc = NULL;
4710 }
4711
4712 /**
4713  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4714  *  @adapter: board private structure
4715  *
4716  *  Free all receive software resources
4717  **/
4718 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4719 {
4720         int i;
4721
4722         for (i = 0; i < adapter->num_rx_queues; i++)
4723                 if (adapter->rx_ring[i])
4724                         igb_free_rx_resources(adapter->rx_ring[i]);
4725 }
4726
4727 /**
4728  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4729  *  @rx_ring: ring to free buffers from
4730  **/
4731 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4732 {
4733         u16 i = rx_ring->next_to_clean;
4734
4735         if (rx_ring->skb)
4736                 dev_kfree_skb(rx_ring->skb);
4737         rx_ring->skb = NULL;
4738
4739         /* Free all the Rx ring sk_buffs */
4740         while (i != rx_ring->next_to_alloc) {
4741                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4742
4743                 /* Invalidate cache lines that may have been written to by
4744                  * device so that we avoid corrupting memory.
4745                  */
4746                 dma_sync_single_range_for_cpu(rx_ring->dev,
4747                                               buffer_info->dma,
4748                                               buffer_info->page_offset,
4749                                               igb_rx_bufsz(rx_ring),
4750                                               DMA_FROM_DEVICE);
4751
4752                 /* free resources associated with mapping */
4753                 dma_unmap_page_attrs(rx_ring->dev,
4754                                      buffer_info->dma,
4755                                      igb_rx_pg_size(rx_ring),
4756                                      DMA_FROM_DEVICE,
4757                                      IGB_RX_DMA_ATTR);
4758                 __page_frag_cache_drain(buffer_info->page,
4759                                         buffer_info->pagecnt_bias);
4760
4761                 i++;
4762                 if (i == rx_ring->count)
4763                         i = 0;
4764         }
4765
4766         rx_ring->next_to_alloc = 0;
4767         rx_ring->next_to_clean = 0;
4768         rx_ring->next_to_use = 0;
4769 }
4770
4771 /**
4772  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4773  *  @adapter: board private structure
4774  **/
4775 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4776 {
4777         int i;
4778
4779         for (i = 0; i < adapter->num_rx_queues; i++)
4780                 if (adapter->rx_ring[i])
4781                         igb_clean_rx_ring(adapter->rx_ring[i]);
4782 }
4783
4784 /**
4785  *  igb_set_mac - Change the Ethernet Address of the NIC
4786  *  @netdev: network interface device structure
4787  *  @p: pointer to an address structure
4788  *
4789  *  Returns 0 on success, negative on failure
4790  **/
4791 static int igb_set_mac(struct net_device *netdev, void *p)
4792 {
4793         struct igb_adapter *adapter = netdev_priv(netdev);
4794         struct e1000_hw *hw = &adapter->hw;
4795         struct sockaddr *addr = p;
4796
4797         if (!is_valid_ether_addr(addr->sa_data))
4798                 return -EADDRNOTAVAIL;
4799
4800         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4801         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4802
4803         /* set the correct pool for the new PF MAC address in entry 0 */
4804         igb_set_default_mac_filter(adapter);
4805
4806         return 0;
4807 }
4808
4809 /**
4810  *  igb_write_mc_addr_list - write multicast addresses to MTA
4811  *  @netdev: network interface device structure
4812  *
4813  *  Writes multicast address list to the MTA hash table.
4814  *  Returns: -ENOMEM on failure
4815  *           0 on no addresses written
4816  *           X on writing X addresses to MTA
4817  **/
4818 static int igb_write_mc_addr_list(struct net_device *netdev)
4819 {
4820         struct igb_adapter *adapter = netdev_priv(netdev);
4821         struct e1000_hw *hw = &adapter->hw;
4822         struct netdev_hw_addr *ha;
4823         u8  *mta_list;
4824         int i;
4825
4826         if (netdev_mc_empty(netdev)) {
4827                 /* nothing to program, so clear mc list */
4828                 igb_update_mc_addr_list(hw, NULL, 0);
4829                 igb_restore_vf_multicasts(adapter);
4830                 return 0;
4831         }
4832
4833         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
4834         if (!mta_list)
4835                 return -ENOMEM;
4836
4837         /* The shared function expects a packed array of only addresses. */
4838         i = 0;
4839         netdev_for_each_mc_addr(ha, netdev)
4840                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4841
4842         igb_update_mc_addr_list(hw, mta_list, i);
4843         kfree(mta_list);
4844
4845         return netdev_mc_count(netdev);
4846 }
4847
4848 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4849 {
4850         struct e1000_hw *hw = &adapter->hw;
4851         u32 i, pf_id;
4852
4853         switch (hw->mac.type) {
4854         case e1000_i210:
4855         case e1000_i211:
4856         case e1000_i350:
4857                 /* VLAN filtering needed for VLAN prio filter */
4858                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4859                         break;
4860                 /* fall through */
4861         case e1000_82576:
4862         case e1000_82580:
4863         case e1000_i354:
4864                 /* VLAN filtering needed for pool filtering */
4865                 if (adapter->vfs_allocated_count)
4866                         break;
4867                 /* fall through */
4868         default:
4869                 return 1;
4870         }
4871
4872         /* We are already in VLAN promisc, nothing to do */
4873         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4874                 return 0;
4875
4876         if (!adapter->vfs_allocated_count)
4877                 goto set_vfta;
4878
4879         /* Add PF to all active pools */
4880         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4881
4882         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4883                 u32 vlvf = rd32(E1000_VLVF(i));
4884
4885                 vlvf |= BIT(pf_id);
4886                 wr32(E1000_VLVF(i), vlvf);
4887         }
4888
4889 set_vfta:
4890         /* Set all bits in the VLAN filter table array */
4891         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4892                 hw->mac.ops.write_vfta(hw, i, ~0U);
4893
4894         /* Set flag so we don't redo unnecessary work */
4895         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4896
4897         return 0;
4898 }
4899
4900 #define VFTA_BLOCK_SIZE 8
4901 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4902 {
4903         struct e1000_hw *hw = &adapter->hw;
4904         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4905         u32 vid_start = vfta_offset * 32;
4906         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4907         u32 i, vid, word, bits, pf_id;
4908
4909         /* guarantee that we don't scrub out management VLAN */
4910         vid = adapter->mng_vlan_id;
4911         if (vid >= vid_start && vid < vid_end)
4912                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4913
4914         if (!adapter->vfs_allocated_count)
4915                 goto set_vfta;
4916
4917         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4918
4919         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4920                 u32 vlvf = rd32(E1000_VLVF(i));
4921
4922                 /* pull VLAN ID from VLVF */
4923                 vid = vlvf & VLAN_VID_MASK;
4924
4925                 /* only concern ourselves with a certain range */
4926                 if (vid < vid_start || vid >= vid_end)
4927                         continue;
4928
4929                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4930                         /* record VLAN ID in VFTA */
4931                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4932
4933                         /* if PF is part of this then continue */
4934                         if (test_bit(vid, adapter->active_vlans))
4935                                 continue;
4936                 }
4937
4938                 /* remove PF from the pool */
4939                 bits = ~BIT(pf_id);
4940                 bits &= rd32(E1000_VLVF(i));
4941                 wr32(E1000_VLVF(i), bits);
4942         }
4943
4944 set_vfta:
4945         /* extract values from active_vlans and write back to VFTA */
4946         for (i = VFTA_BLOCK_SIZE; i--;) {
4947                 vid = (vfta_offset + i) * 32;
4948                 word = vid / BITS_PER_LONG;
4949                 bits = vid % BITS_PER_LONG;
4950
4951                 vfta[i] |= adapter->active_vlans[word] >> bits;
4952
4953                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4954         }
4955 }
4956
4957 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4958 {
4959         u32 i;
4960
4961         /* We are not in VLAN promisc, nothing to do */
4962         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4963                 return;
4964
4965         /* Set flag so we don't redo unnecessary work */
4966         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4967
4968         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4969                 igb_scrub_vfta(adapter, i);
4970 }
4971
4972 /**
4973  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4974  *  @netdev: network interface device structure
4975  *
4976  *  The set_rx_mode entry point is called whenever the unicast or multicast
4977  *  address lists or the network interface flags are updated.  This routine is
4978  *  responsible for configuring the hardware for proper unicast, multicast,
4979  *  promiscuous mode, and all-multi behavior.
4980  **/
4981 static void igb_set_rx_mode(struct net_device *netdev)
4982 {
4983         struct igb_adapter *adapter = netdev_priv(netdev);
4984         struct e1000_hw *hw = &adapter->hw;
4985         unsigned int vfn = adapter->vfs_allocated_count;
4986         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
4987         int count;
4988
4989         /* Check for Promiscuous and All Multicast modes */
4990         if (netdev->flags & IFF_PROMISC) {
4991                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4992                 vmolr |= E1000_VMOLR_MPME;
4993
4994                 /* enable use of UTA filter to force packets to default pool */
4995                 if (hw->mac.type == e1000_82576)
4996                         vmolr |= E1000_VMOLR_ROPE;
4997         } else {
4998                 if (netdev->flags & IFF_ALLMULTI) {
4999                         rctl |= E1000_RCTL_MPE;
5000                         vmolr |= E1000_VMOLR_MPME;
5001                 } else {
5002                         /* Write addresses to the MTA, if the attempt fails
5003                          * then we should just turn on promiscuous mode so
5004                          * that we can at least receive multicast traffic
5005                          */
5006                         count = igb_write_mc_addr_list(netdev);
5007                         if (count < 0) {
5008                                 rctl |= E1000_RCTL_MPE;
5009                                 vmolr |= E1000_VMOLR_MPME;
5010                         } else if (count) {
5011                                 vmolr |= E1000_VMOLR_ROMPE;
5012                         }
5013                 }
5014         }
5015
5016         /* Write addresses to available RAR registers, if there is not
5017          * sufficient space to store all the addresses then enable
5018          * unicast promiscuous mode
5019          */
5020         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5021                 rctl |= E1000_RCTL_UPE;
5022                 vmolr |= E1000_VMOLR_ROPE;
5023         }
5024
5025         /* enable VLAN filtering by default */
5026         rctl |= E1000_RCTL_VFE;
5027
5028         /* disable VLAN filtering for modes that require it */
5029         if ((netdev->flags & IFF_PROMISC) ||
5030             (netdev->features & NETIF_F_RXALL)) {
5031                 /* if we fail to set all rules then just clear VFE */
5032                 if (igb_vlan_promisc_enable(adapter))
5033                         rctl &= ~E1000_RCTL_VFE;
5034         } else {
5035                 igb_vlan_promisc_disable(adapter);
5036         }
5037
5038         /* update state of unicast, multicast, and VLAN filtering modes */
5039         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5040                                      E1000_RCTL_VFE);
5041         wr32(E1000_RCTL, rctl);
5042
5043 #if (PAGE_SIZE < 8192)
5044         if (!adapter->vfs_allocated_count) {
5045                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5046                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5047         }
5048 #endif
5049         wr32(E1000_RLPML, rlpml);
5050
5051         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5052          * the VMOLR to enable the appropriate modes.  Without this workaround
5053          * we will have issues with VLAN tag stripping not being done for frames
5054          * that are only arriving because we are the default pool
5055          */
5056         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5057                 return;
5058
5059         /* set UTA to appropriate mode */
5060         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5061
5062         vmolr |= rd32(E1000_VMOLR(vfn)) &
5063                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5064
5065         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5066         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5067 #if (PAGE_SIZE < 8192)
5068         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5069                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5070         else
5071 #endif
5072                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5073         vmolr |= E1000_VMOLR_LPE;
5074
5075         wr32(E1000_VMOLR(vfn), vmolr);
5076
5077         igb_restore_vf_multicasts(adapter);
5078 }
5079
5080 static void igb_check_wvbr(struct igb_adapter *adapter)
5081 {
5082         struct e1000_hw *hw = &adapter->hw;
5083         u32 wvbr = 0;
5084
5085         switch (hw->mac.type) {
5086         case e1000_82576:
5087         case e1000_i350:
5088                 wvbr = rd32(E1000_WVBR);
5089                 if (!wvbr)
5090                         return;
5091                 break;
5092         default:
5093                 break;
5094         }
5095
5096         adapter->wvbr |= wvbr;
5097 }
5098
5099 #define IGB_STAGGERED_QUEUE_OFFSET 8
5100
5101 static void igb_spoof_check(struct igb_adapter *adapter)
5102 {
5103         int j;
5104
5105         if (!adapter->wvbr)
5106                 return;
5107
5108         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5109                 if (adapter->wvbr & BIT(j) ||
5110                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5111                         dev_warn(&adapter->pdev->dev,
5112                                 "Spoof event(s) detected on VF %d\n", j);
5113                         adapter->wvbr &=
5114                                 ~(BIT(j) |
5115                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5116                 }
5117         }
5118 }
5119
5120 /* Need to wait a few seconds after link up to get diagnostic information from
5121  * the phy
5122  */
5123 static void igb_update_phy_info(struct timer_list *t)
5124 {
5125         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5126         igb_get_phy_info(&adapter->hw);
5127 }
5128
5129 /**
5130  *  igb_has_link - check shared code for link and determine up/down
5131  *  @adapter: pointer to driver private info
5132  **/
5133 bool igb_has_link(struct igb_adapter *adapter)
5134 {
5135         struct e1000_hw *hw = &adapter->hw;
5136         bool link_active = false;
5137
5138         /* get_link_status is set on LSC (link status) interrupt or
5139          * rx sequence error interrupt.  get_link_status will stay
5140          * false until the e1000_check_for_link establishes link
5141          * for copper adapters ONLY
5142          */
5143         switch (hw->phy.media_type) {
5144         case e1000_media_type_copper:
5145                 if (!hw->mac.get_link_status)
5146                         return true;
5147                 /* fall through */
5148         case e1000_media_type_internal_serdes:
5149                 hw->mac.ops.check_for_link(hw);
5150                 link_active = !hw->mac.get_link_status;
5151                 break;
5152         default:
5153         case e1000_media_type_unknown:
5154                 break;
5155         }
5156
5157         if (((hw->mac.type == e1000_i210) ||
5158              (hw->mac.type == e1000_i211)) &&
5159              (hw->phy.id == I210_I_PHY_ID)) {
5160                 if (!netif_carrier_ok(adapter->netdev)) {
5161                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5162                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5163                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5164                         adapter->link_check_timeout = jiffies;
5165                 }
5166         }
5167
5168         return link_active;
5169 }
5170
5171 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5172 {
5173         bool ret = false;
5174         u32 ctrl_ext, thstat;
5175
5176         /* check for thermal sensor event on i350 copper only */
5177         if (hw->mac.type == e1000_i350) {
5178                 thstat = rd32(E1000_THSTAT);
5179                 ctrl_ext = rd32(E1000_CTRL_EXT);
5180
5181                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5182                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5183                         ret = !!(thstat & event);
5184         }
5185
5186         return ret;
5187 }
5188
5189 /**
5190  *  igb_check_lvmmc - check for malformed packets received
5191  *  and indicated in LVMMC register
5192  *  @adapter: pointer to adapter
5193  **/
5194 static void igb_check_lvmmc(struct igb_adapter *adapter)
5195 {
5196         struct e1000_hw *hw = &adapter->hw;
5197         u32 lvmmc;
5198
5199         lvmmc = rd32(E1000_LVMMC);
5200         if (lvmmc) {
5201                 if (unlikely(net_ratelimit())) {
5202                         netdev_warn(adapter->netdev,
5203                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5204                                     lvmmc);
5205                 }
5206         }
5207 }
5208
5209 /**
5210  *  igb_watchdog - Timer Call-back
5211  *  @data: pointer to adapter cast into an unsigned long
5212  **/
5213 static void igb_watchdog(struct timer_list *t)
5214 {
5215         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5216         /* Do the rest outside of interrupt context */
5217         schedule_work(&adapter->watchdog_task);
5218 }
5219
5220 static void igb_watchdog_task(struct work_struct *work)
5221 {
5222         struct igb_adapter *adapter = container_of(work,
5223                                                    struct igb_adapter,
5224                                                    watchdog_task);
5225         struct e1000_hw *hw = &adapter->hw;
5226         struct e1000_phy_info *phy = &hw->phy;
5227         struct net_device *netdev = adapter->netdev;
5228         u32 link;
5229         int i;
5230         u32 connsw;
5231         u16 phy_data, retry_count = 20;
5232
5233         link = igb_has_link(adapter);
5234
5235         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5236                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5237                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5238                 else
5239                         link = false;
5240         }
5241
5242         /* Force link down if we have fiber to swap to */
5243         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5244                 if (hw->phy.media_type == e1000_media_type_copper) {
5245                         connsw = rd32(E1000_CONNSW);
5246                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5247                                 link = 0;
5248                 }
5249         }
5250         if (link) {
5251                 /* Perform a reset if the media type changed. */
5252                 if (hw->dev_spec._82575.media_changed) {
5253                         hw->dev_spec._82575.media_changed = false;
5254                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5255                         igb_reset(adapter);
5256                 }
5257                 /* Cancel scheduled suspend requests. */
5258                 pm_runtime_resume(netdev->dev.parent);
5259
5260                 if (!netif_carrier_ok(netdev)) {
5261                         u32 ctrl;
5262
5263                         hw->mac.ops.get_speed_and_duplex(hw,
5264                                                          &adapter->link_speed,
5265                                                          &adapter->link_duplex);
5266
5267                         ctrl = rd32(E1000_CTRL);
5268                         /* Links status message must follow this format */
5269                         netdev_info(netdev,
5270                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5271                                netdev->name,
5272                                adapter->link_speed,
5273                                adapter->link_duplex == FULL_DUPLEX ?
5274                                "Full" : "Half",
5275                                (ctrl & E1000_CTRL_TFCE) &&
5276                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5277                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5278                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5279
5280                         /* disable EEE if enabled */
5281                         if ((adapter->flags & IGB_FLAG_EEE) &&
5282                                 (adapter->link_duplex == HALF_DUPLEX)) {
5283                                 dev_info(&adapter->pdev->dev,
5284                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5285                                 adapter->hw.dev_spec._82575.eee_disable = true;
5286                                 adapter->flags &= ~IGB_FLAG_EEE;
5287                         }
5288
5289                         /* check if SmartSpeed worked */
5290                         igb_check_downshift(hw);
5291                         if (phy->speed_downgraded)
5292                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5293
5294                         /* check for thermal sensor event */
5295                         if (igb_thermal_sensor_event(hw,
5296                             E1000_THSTAT_LINK_THROTTLE))
5297                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5298
5299                         /* adjust timeout factor according to speed/duplex */
5300                         adapter->tx_timeout_factor = 1;
5301                         switch (adapter->link_speed) {
5302                         case SPEED_10:
5303                                 adapter->tx_timeout_factor = 14;
5304                                 break;
5305                         case SPEED_100:
5306                                 /* maybe add some timeout factor ? */
5307                                 break;
5308                         }
5309
5310                         if (adapter->link_speed != SPEED_1000)
5311                                 goto no_wait;
5312
5313                         /* wait for Remote receiver status OK */
5314 retry_read_status:
5315                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5316                                               &phy_data)) {
5317                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5318                                     retry_count) {
5319                                         msleep(100);
5320                                         retry_count--;
5321                                         goto retry_read_status;
5322                                 } else if (!retry_count) {
5323                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5324                                 }
5325                         } else {
5326                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5327                         }
5328 no_wait:
5329                         netif_carrier_on(netdev);
5330
5331                         igb_ping_all_vfs(adapter);
5332                         igb_check_vf_rate_limit(adapter);
5333
5334                         /* link state has changed, schedule phy info update */
5335                         if (!test_bit(__IGB_DOWN, &adapter->state))
5336                                 mod_timer(&adapter->phy_info_timer,
5337                                           round_jiffies(jiffies + 2 * HZ));
5338                 }
5339         } else {
5340                 if (netif_carrier_ok(netdev)) {
5341                         adapter->link_speed = 0;
5342                         adapter->link_duplex = 0;
5343
5344                         /* check for thermal sensor event */
5345                         if (igb_thermal_sensor_event(hw,
5346                             E1000_THSTAT_PWR_DOWN)) {
5347                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5348                         }
5349
5350                         /* Links status message must follow this format */
5351                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5352                                netdev->name);
5353                         netif_carrier_off(netdev);
5354
5355                         igb_ping_all_vfs(adapter);
5356
5357                         /* link state has changed, schedule phy info update */
5358                         if (!test_bit(__IGB_DOWN, &adapter->state))
5359                                 mod_timer(&adapter->phy_info_timer,
5360                                           round_jiffies(jiffies + 2 * HZ));
5361
5362                         /* link is down, time to check for alternate media */
5363                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5364                                 igb_check_swap_media(adapter);
5365                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5366                                         schedule_work(&adapter->reset_task);
5367                                         /* return immediately */
5368                                         return;
5369                                 }
5370                         }
5371                         pm_schedule_suspend(netdev->dev.parent,
5372                                             MSEC_PER_SEC * 5);
5373
5374                 /* also check for alternate media here */
5375                 } else if (!netif_carrier_ok(netdev) &&
5376                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5377                         igb_check_swap_media(adapter);
5378                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5379                                 schedule_work(&adapter->reset_task);
5380                                 /* return immediately */
5381                                 return;
5382                         }
5383                 }
5384         }
5385
5386         spin_lock(&adapter->stats64_lock);
5387         igb_update_stats(adapter);
5388         spin_unlock(&adapter->stats64_lock);
5389
5390         for (i = 0; i < adapter->num_tx_queues; i++) {
5391                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5392                 if (!netif_carrier_ok(netdev)) {
5393                         /* We've lost link, so the controller stops DMA,
5394                          * but we've got queued Tx work that's never going
5395                          * to get done, so reset controller to flush Tx.
5396                          * (Do the reset outside of interrupt context).
5397                          */
5398                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5399                                 adapter->tx_timeout_count++;
5400                                 schedule_work(&adapter->reset_task);
5401                                 /* return immediately since reset is imminent */
5402                                 return;
5403                         }
5404                 }
5405
5406                 /* Force detection of hung controller every watchdog period */
5407                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5408         }
5409
5410         /* Cause software interrupt to ensure Rx ring is cleaned */
5411         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5412                 u32 eics = 0;
5413
5414                 for (i = 0; i < adapter->num_q_vectors; i++)
5415                         eics |= adapter->q_vector[i]->eims_value;
5416                 wr32(E1000_EICS, eics);
5417         } else {
5418                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5419         }
5420
5421         igb_spoof_check(adapter);
5422         igb_ptp_rx_hang(adapter);
5423         igb_ptp_tx_hang(adapter);
5424
5425         /* Check LVMMC register on i350/i354 only */
5426         if ((adapter->hw.mac.type == e1000_i350) ||
5427             (adapter->hw.mac.type == e1000_i354))
5428                 igb_check_lvmmc(adapter);
5429
5430         /* Reset the timer */
5431         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5432                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5433                         mod_timer(&adapter->watchdog_timer,
5434                                   round_jiffies(jiffies +  HZ));
5435                 else
5436                         mod_timer(&adapter->watchdog_timer,
5437                                   round_jiffies(jiffies + 2 * HZ));
5438         }
5439 }
5440
5441 enum latency_range {
5442         lowest_latency = 0,
5443         low_latency = 1,
5444         bulk_latency = 2,
5445         latency_invalid = 255
5446 };
5447
5448 /**
5449  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5450  *  @q_vector: pointer to q_vector
5451  *
5452  *  Stores a new ITR value based on strictly on packet size.  This
5453  *  algorithm is less sophisticated than that used in igb_update_itr,
5454  *  due to the difficulty of synchronizing statistics across multiple
5455  *  receive rings.  The divisors and thresholds used by this function
5456  *  were determined based on theoretical maximum wire speed and testing
5457  *  data, in order to minimize response time while increasing bulk
5458  *  throughput.
5459  *  This functionality is controlled by ethtool's coalescing settings.
5460  *  NOTE:  This function is called only when operating in a multiqueue
5461  *         receive environment.
5462  **/
5463 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5464 {
5465         int new_val = q_vector->itr_val;
5466         int avg_wire_size = 0;
5467         struct igb_adapter *adapter = q_vector->adapter;
5468         unsigned int packets;
5469
5470         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5471          * ints/sec - ITR timer value of 120 ticks.
5472          */
5473         if (adapter->link_speed != SPEED_1000) {
5474                 new_val = IGB_4K_ITR;
5475                 goto set_itr_val;
5476         }
5477
5478         packets = q_vector->rx.total_packets;
5479         if (packets)
5480                 avg_wire_size = q_vector->rx.total_bytes / packets;
5481
5482         packets = q_vector->tx.total_packets;
5483         if (packets)
5484                 avg_wire_size = max_t(u32, avg_wire_size,
5485                                       q_vector->tx.total_bytes / packets);
5486
5487         /* if avg_wire_size isn't set no work was done */
5488         if (!avg_wire_size)
5489                 goto clear_counts;
5490
5491         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5492         avg_wire_size += 24;
5493
5494         /* Don't starve jumbo frames */
5495         avg_wire_size = min(avg_wire_size, 3000);
5496
5497         /* Give a little boost to mid-size frames */
5498         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5499                 new_val = avg_wire_size / 3;
5500         else
5501                 new_val = avg_wire_size / 2;
5502
5503         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5504         if (new_val < IGB_20K_ITR &&
5505             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5506              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5507                 new_val = IGB_20K_ITR;
5508
5509 set_itr_val:
5510         if (new_val != q_vector->itr_val) {
5511                 q_vector->itr_val = new_val;
5512                 q_vector->set_itr = 1;
5513         }
5514 clear_counts:
5515         q_vector->rx.total_bytes = 0;
5516         q_vector->rx.total_packets = 0;
5517         q_vector->tx.total_bytes = 0;
5518         q_vector->tx.total_packets = 0;
5519 }
5520
5521 /**
5522  *  igb_update_itr - update the dynamic ITR value based on statistics
5523  *  @q_vector: pointer to q_vector
5524  *  @ring_container: ring info to update the itr for
5525  *
5526  *  Stores a new ITR value based on packets and byte
5527  *  counts during the last interrupt.  The advantage of per interrupt
5528  *  computation is faster updates and more accurate ITR for the current
5529  *  traffic pattern.  Constants in this function were computed
5530  *  based on theoretical maximum wire speed and thresholds were set based
5531  *  on testing data as well as attempting to minimize response time
5532  *  while increasing bulk throughput.
5533  *  This functionality is controlled by ethtool's coalescing settings.
5534  *  NOTE:  These calculations are only valid when operating in a single-
5535  *         queue environment.
5536  **/
5537 static void igb_update_itr(struct igb_q_vector *q_vector,
5538                            struct igb_ring_container *ring_container)
5539 {
5540         unsigned int packets = ring_container->total_packets;
5541         unsigned int bytes = ring_container->total_bytes;
5542         u8 itrval = ring_container->itr;
5543
5544         /* no packets, exit with status unchanged */
5545         if (packets == 0)
5546                 return;
5547
5548         switch (itrval) {
5549         case lowest_latency:
5550                 /* handle TSO and jumbo frames */
5551                 if (bytes/packets > 8000)
5552                         itrval = bulk_latency;
5553                 else if ((packets < 5) && (bytes > 512))
5554                         itrval = low_latency;
5555                 break;
5556         case low_latency:  /* 50 usec aka 20000 ints/s */
5557                 if (bytes > 10000) {
5558                         /* this if handles the TSO accounting */
5559                         if (bytes/packets > 8000)
5560                                 itrval = bulk_latency;
5561                         else if ((packets < 10) || ((bytes/packets) > 1200))
5562                                 itrval = bulk_latency;
5563                         else if ((packets > 35))
5564                                 itrval = lowest_latency;
5565                 } else if (bytes/packets > 2000) {
5566                         itrval = bulk_latency;
5567                 } else if (packets <= 2 && bytes < 512) {
5568                         itrval = lowest_latency;
5569                 }
5570                 break;
5571         case bulk_latency: /* 250 usec aka 4000 ints/s */
5572                 if (bytes > 25000) {
5573                         if (packets > 35)
5574                                 itrval = low_latency;
5575                 } else if (bytes < 1500) {
5576                         itrval = low_latency;
5577                 }
5578                 break;
5579         }
5580
5581         /* clear work counters since we have the values we need */
5582         ring_container->total_bytes = 0;
5583         ring_container->total_packets = 0;
5584
5585         /* write updated itr to ring container */
5586         ring_container->itr = itrval;
5587 }
5588
5589 static void igb_set_itr(struct igb_q_vector *q_vector)
5590 {
5591         struct igb_adapter *adapter = q_vector->adapter;
5592         u32 new_itr = q_vector->itr_val;
5593         u8 current_itr = 0;
5594
5595         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5596         if (adapter->link_speed != SPEED_1000) {
5597                 current_itr = 0;
5598                 new_itr = IGB_4K_ITR;
5599                 goto set_itr_now;
5600         }
5601
5602         igb_update_itr(q_vector, &q_vector->tx);
5603         igb_update_itr(q_vector, &q_vector->rx);
5604
5605         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5606
5607         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5608         if (current_itr == lowest_latency &&
5609             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5610              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5611                 current_itr = low_latency;
5612
5613         switch (current_itr) {
5614         /* counts and packets in update_itr are dependent on these numbers */
5615         case lowest_latency:
5616                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5617                 break;
5618         case low_latency:
5619                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5620                 break;
5621         case bulk_latency:
5622                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5623                 break;
5624         default:
5625                 break;
5626         }
5627
5628 set_itr_now:
5629         if (new_itr != q_vector->itr_val) {
5630                 /* this attempts to bias the interrupt rate towards Bulk
5631                  * by adding intermediate steps when interrupt rate is
5632                  * increasing
5633                  */
5634                 new_itr = new_itr > q_vector->itr_val ?
5635                           max((new_itr * q_vector->itr_val) /
5636                           (new_itr + (q_vector->itr_val >> 2)),
5637                           new_itr) : new_itr;
5638                 /* Don't write the value here; it resets the adapter's
5639                  * internal timer, and causes us to delay far longer than
5640                  * we should between interrupts.  Instead, we write the ITR
5641                  * value at the beginning of the next interrupt so the timing
5642                  * ends up being correct.
5643                  */
5644                 q_vector->itr_val = new_itr;
5645                 q_vector->set_itr = 1;
5646         }
5647 }
5648
5649 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5650                             struct igb_tx_buffer *first,
5651                             u32 vlan_macip_lens, u32 type_tucmd,
5652                             u32 mss_l4len_idx)
5653 {
5654         struct e1000_adv_tx_context_desc *context_desc;
5655         u16 i = tx_ring->next_to_use;
5656         struct timespec64 ts;
5657
5658         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5659
5660         i++;
5661         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5662
5663         /* set bits to identify this as an advanced context descriptor */
5664         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5665
5666         /* For 82575, context index must be unique per ring. */
5667         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5668                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5669
5670         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5671         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5672         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5673
5674         /* We assume there is always a valid tx time available. Invalid times
5675          * should have been handled by the upper layers.
5676          */
5677         if (tx_ring->launchtime_enable) {
5678                 ts = ns_to_timespec64(first->skb->tstamp);
5679                 first->skb->tstamp = 0;
5680                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5681         } else {
5682                 context_desc->seqnum_seed = 0;
5683         }
5684 }
5685
5686 static int igb_tso(struct igb_ring *tx_ring,
5687                    struct igb_tx_buffer *first,
5688                    u8 *hdr_len)
5689 {
5690         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5691         struct sk_buff *skb = first->skb;
5692         union {
5693                 struct iphdr *v4;
5694                 struct ipv6hdr *v6;
5695                 unsigned char *hdr;
5696         } ip;
5697         union {
5698                 struct tcphdr *tcp;
5699                 unsigned char *hdr;
5700         } l4;
5701         u32 paylen, l4_offset;
5702         int err;
5703
5704         if (skb->ip_summed != CHECKSUM_PARTIAL)
5705                 return 0;
5706
5707         if (!skb_is_gso(skb))
5708                 return 0;
5709
5710         err = skb_cow_head(skb, 0);
5711         if (err < 0)
5712                 return err;
5713
5714         ip.hdr = skb_network_header(skb);
5715         l4.hdr = skb_checksum_start(skb);
5716
5717         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5718         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5719
5720         /* initialize outer IP header fields */
5721         if (ip.v4->version == 4) {
5722                 unsigned char *csum_start = skb_checksum_start(skb);
5723                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5724
5725                 /* IP header will have to cancel out any data that
5726                  * is not a part of the outer IP header
5727                  */
5728                 ip.v4->check = csum_fold(csum_partial(trans_start,
5729                                                       csum_start - trans_start,
5730                                                       0));
5731                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5732
5733                 ip.v4->tot_len = 0;
5734                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5735                                    IGB_TX_FLAGS_CSUM |
5736                                    IGB_TX_FLAGS_IPV4;
5737         } else {
5738                 ip.v6->payload_len = 0;
5739                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5740                                    IGB_TX_FLAGS_CSUM;
5741         }
5742
5743         /* determine offset of inner transport header */
5744         l4_offset = l4.hdr - skb->data;
5745
5746         /* compute length of segmentation header */
5747         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5748
5749         /* remove payload length from inner checksum */
5750         paylen = skb->len - l4_offset;
5751         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5752
5753         /* update gso size and bytecount with header size */
5754         first->gso_segs = skb_shinfo(skb)->gso_segs;
5755         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5756
5757         /* MSS L4LEN IDX */
5758         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5759         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5760
5761         /* VLAN MACLEN IPLEN */
5762         vlan_macip_lens = l4.hdr - ip.hdr;
5763         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5764         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5765
5766         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5767                         type_tucmd, mss_l4len_idx);
5768
5769         return 1;
5770 }
5771
5772 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5773 {
5774         unsigned int offset = 0;
5775
5776         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5777
5778         return offset == skb_checksum_start_offset(skb);
5779 }
5780
5781 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5782 {
5783         struct sk_buff *skb = first->skb;
5784         u32 vlan_macip_lens = 0;
5785         u32 type_tucmd = 0;
5786
5787         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5788 csum_failed:
5789                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5790                     !tx_ring->launchtime_enable)
5791                         return;
5792                 goto no_csum;
5793         }
5794
5795         switch (skb->csum_offset) {
5796         case offsetof(struct tcphdr, check):
5797                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5798                 /* fall through */
5799         case offsetof(struct udphdr, check):
5800                 break;
5801         case offsetof(struct sctphdr, checksum):
5802                 /* validate that this is actually an SCTP request */
5803                 if (((first->protocol == htons(ETH_P_IP)) &&
5804                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5805                     ((first->protocol == htons(ETH_P_IPV6)) &&
5806                      igb_ipv6_csum_is_sctp(skb))) {
5807                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5808                         break;
5809                 }
5810                 /* fall through */
5811         default:
5812                 skb_checksum_help(skb);
5813                 goto csum_failed;
5814         }
5815
5816         /* update TX checksum flag */
5817         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5818         vlan_macip_lens = skb_checksum_start_offset(skb) -
5819                           skb_network_offset(skb);
5820 no_csum:
5821         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5822         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5823
5824         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
5825 }
5826
5827 #define IGB_SET_FLAG(_input, _flag, _result) \
5828         ((_flag <= _result) ? \
5829          ((u32)(_input & _flag) * (_result / _flag)) : \
5830          ((u32)(_input & _flag) / (_flag / _result)))
5831
5832 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5833 {
5834         /* set type for advanced descriptor with frame checksum insertion */
5835         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5836                        E1000_ADVTXD_DCMD_DEXT |
5837                        E1000_ADVTXD_DCMD_IFCS;
5838
5839         /* set HW vlan bit if vlan is present */
5840         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5841                                  (E1000_ADVTXD_DCMD_VLE));
5842
5843         /* set segmentation bits for TSO */
5844         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5845                                  (E1000_ADVTXD_DCMD_TSE));
5846
5847         /* set timestamp bit if present */
5848         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5849                                  (E1000_ADVTXD_MAC_TSTAMP));
5850
5851         /* insert frame checksum */
5852         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5853
5854         return cmd_type;
5855 }
5856
5857 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5858                                  union e1000_adv_tx_desc *tx_desc,
5859                                  u32 tx_flags, unsigned int paylen)
5860 {
5861         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5862
5863         /* 82575 requires a unique index per ring */
5864         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5865                 olinfo_status |= tx_ring->reg_idx << 4;
5866
5867         /* insert L4 checksum */
5868         olinfo_status |= IGB_SET_FLAG(tx_flags,
5869                                       IGB_TX_FLAGS_CSUM,
5870                                       (E1000_TXD_POPTS_TXSM << 8));
5871
5872         /* insert IPv4 checksum */
5873         olinfo_status |= IGB_SET_FLAG(tx_flags,
5874                                       IGB_TX_FLAGS_IPV4,
5875                                       (E1000_TXD_POPTS_IXSM << 8));
5876
5877         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5878 }
5879
5880 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5881 {
5882         struct net_device *netdev = tx_ring->netdev;
5883
5884         netif_stop_subqueue(netdev, tx_ring->queue_index);
5885
5886         /* Herbert's original patch had:
5887          *  smp_mb__after_netif_stop_queue();
5888          * but since that doesn't exist yet, just open code it.
5889          */
5890         smp_mb();
5891
5892         /* We need to check again in a case another CPU has just
5893          * made room available.
5894          */
5895         if (igb_desc_unused(tx_ring) < size)
5896                 return -EBUSY;
5897
5898         /* A reprieve! */
5899         netif_wake_subqueue(netdev, tx_ring->queue_index);
5900
5901         u64_stats_update_begin(&tx_ring->tx_syncp2);
5902         tx_ring->tx_stats.restart_queue2++;
5903         u64_stats_update_end(&tx_ring->tx_syncp2);
5904
5905         return 0;
5906 }
5907
5908 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5909 {
5910         if (igb_desc_unused(tx_ring) >= size)
5911                 return 0;
5912         return __igb_maybe_stop_tx(tx_ring, size);
5913 }
5914
5915 static int igb_tx_map(struct igb_ring *tx_ring,
5916                       struct igb_tx_buffer *first,
5917                       const u8 hdr_len)
5918 {
5919         struct sk_buff *skb = first->skb;
5920         struct igb_tx_buffer *tx_buffer;
5921         union e1000_adv_tx_desc *tx_desc;
5922         struct skb_frag_struct *frag;
5923         dma_addr_t dma;
5924         unsigned int data_len, size;
5925         u32 tx_flags = first->tx_flags;
5926         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5927         u16 i = tx_ring->next_to_use;
5928
5929         tx_desc = IGB_TX_DESC(tx_ring, i);
5930
5931         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5932
5933         size = skb_headlen(skb);
5934         data_len = skb->data_len;
5935
5936         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5937
5938         tx_buffer = first;
5939
5940         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5941                 if (dma_mapping_error(tx_ring->dev, dma))
5942                         goto dma_error;
5943
5944                 /* record length, and DMA address */
5945                 dma_unmap_len_set(tx_buffer, len, size);
5946                 dma_unmap_addr_set(tx_buffer, dma, dma);
5947
5948                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5949
5950                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5951                         tx_desc->read.cmd_type_len =
5952                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5953
5954                         i++;
5955                         tx_desc++;
5956                         if (i == tx_ring->count) {
5957                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5958                                 i = 0;
5959                         }
5960                         tx_desc->read.olinfo_status = 0;
5961
5962                         dma += IGB_MAX_DATA_PER_TXD;
5963                         size -= IGB_MAX_DATA_PER_TXD;
5964
5965                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5966                 }
5967
5968                 if (likely(!data_len))
5969                         break;
5970
5971                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5972
5973                 i++;
5974                 tx_desc++;
5975                 if (i == tx_ring->count) {
5976                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5977                         i = 0;
5978                 }
5979                 tx_desc->read.olinfo_status = 0;
5980
5981                 size = skb_frag_size(frag);
5982                 data_len -= size;
5983
5984                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5985                                        size, DMA_TO_DEVICE);
5986
5987                 tx_buffer = &tx_ring->tx_buffer_info[i];
5988         }
5989
5990         /* write last descriptor with RS and EOP bits */
5991         cmd_type |= size | IGB_TXD_DCMD;
5992         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5993
5994         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5995
5996         /* set the timestamp */
5997         first->time_stamp = jiffies;
5998
5999         skb_tx_timestamp(skb);
6000
6001         /* Force memory writes to complete before letting h/w know there
6002          * are new descriptors to fetch.  (Only applicable for weak-ordered
6003          * memory model archs, such as IA-64).
6004          *
6005          * We also need this memory barrier to make certain all of the
6006          * status bits have been updated before next_to_watch is written.
6007          */
6008         dma_wmb();
6009
6010         /* set next_to_watch value indicating a packet is present */
6011         first->next_to_watch = tx_desc;
6012
6013         i++;
6014         if (i == tx_ring->count)
6015                 i = 0;
6016
6017         tx_ring->next_to_use = i;
6018
6019         /* Make sure there is space in the ring for the next send. */
6020         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6021
6022         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6023                 writel(i, tx_ring->tail);
6024         }
6025         return 0;
6026
6027 dma_error:
6028         dev_err(tx_ring->dev, "TX DMA map failed\n");
6029         tx_buffer = &tx_ring->tx_buffer_info[i];
6030
6031         /* clear dma mappings for failed tx_buffer_info map */
6032         while (tx_buffer != first) {
6033                 if (dma_unmap_len(tx_buffer, len))
6034                         dma_unmap_page(tx_ring->dev,
6035                                        dma_unmap_addr(tx_buffer, dma),
6036                                        dma_unmap_len(tx_buffer, len),
6037                                        DMA_TO_DEVICE);
6038                 dma_unmap_len_set(tx_buffer, len, 0);
6039
6040                 if (i-- == 0)
6041                         i += tx_ring->count;
6042                 tx_buffer = &tx_ring->tx_buffer_info[i];
6043         }
6044
6045         if (dma_unmap_len(tx_buffer, len))
6046                 dma_unmap_single(tx_ring->dev,
6047                                  dma_unmap_addr(tx_buffer, dma),
6048                                  dma_unmap_len(tx_buffer, len),
6049                                  DMA_TO_DEVICE);
6050         dma_unmap_len_set(tx_buffer, len, 0);
6051
6052         dev_kfree_skb_any(tx_buffer->skb);
6053         tx_buffer->skb = NULL;
6054
6055         tx_ring->next_to_use = i;
6056
6057         return -1;
6058 }
6059
6060 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6061                                 struct igb_ring *tx_ring)
6062 {
6063         struct igb_tx_buffer *first;
6064         int tso;
6065         u32 tx_flags = 0;
6066         unsigned short f;
6067         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6068         __be16 protocol = vlan_get_protocol(skb);
6069         u8 hdr_len = 0;
6070
6071         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6072          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6073          *       + 2 desc gap to keep tail from touching head,
6074          *       + 1 desc for context descriptor,
6075          * otherwise try next time
6076          */
6077         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6078                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6079
6080         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6081                 /* this is a hard error */
6082                 return NETDEV_TX_BUSY;
6083         }
6084
6085         /* record the location of the first descriptor for this packet */
6086         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6087         first->skb = skb;
6088         first->bytecount = skb->len;
6089         first->gso_segs = 1;
6090
6091         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6092                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6093
6094                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6095                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6096                                            &adapter->state)) {
6097                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6098                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6099
6100                         adapter->ptp_tx_skb = skb_get(skb);
6101                         adapter->ptp_tx_start = jiffies;
6102                         if (adapter->hw.mac.type == e1000_82576)
6103                                 schedule_work(&adapter->ptp_tx_work);
6104                 } else {
6105                         adapter->tx_hwtstamp_skipped++;
6106                 }
6107         }
6108
6109         if (skb_vlan_tag_present(skb)) {
6110                 tx_flags |= IGB_TX_FLAGS_VLAN;
6111                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6112         }
6113
6114         /* record initial flags and protocol */
6115         first->tx_flags = tx_flags;
6116         first->protocol = protocol;
6117
6118         tso = igb_tso(tx_ring, first, &hdr_len);
6119         if (tso < 0)
6120                 goto out_drop;
6121         else if (!tso)
6122                 igb_tx_csum(tx_ring, first);
6123
6124         if (igb_tx_map(tx_ring, first, hdr_len))
6125                 goto cleanup_tx_tstamp;
6126
6127         return NETDEV_TX_OK;
6128
6129 out_drop:
6130         dev_kfree_skb_any(first->skb);
6131         first->skb = NULL;
6132 cleanup_tx_tstamp:
6133         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6134                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6135
6136                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6137                 adapter->ptp_tx_skb = NULL;
6138                 if (adapter->hw.mac.type == e1000_82576)
6139                         cancel_work_sync(&adapter->ptp_tx_work);
6140                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6141         }
6142
6143         return NETDEV_TX_OK;
6144 }
6145
6146 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6147                                                     struct sk_buff *skb)
6148 {
6149         unsigned int r_idx = skb->queue_mapping;
6150
6151         if (r_idx >= adapter->num_tx_queues)
6152                 r_idx = r_idx % adapter->num_tx_queues;
6153
6154         return adapter->tx_ring[r_idx];
6155 }
6156
6157 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6158                                   struct net_device *netdev)
6159 {
6160         struct igb_adapter *adapter = netdev_priv(netdev);
6161
6162         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6163          * in order to meet this minimum size requirement.
6164          */
6165         if (skb_put_padto(skb, 17))
6166                 return NETDEV_TX_OK;
6167
6168         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6169 }
6170
6171 /**
6172  *  igb_tx_timeout - Respond to a Tx Hang
6173  *  @netdev: network interface device structure
6174  **/
6175 static void igb_tx_timeout(struct net_device *netdev)
6176 {
6177         struct igb_adapter *adapter = netdev_priv(netdev);
6178         struct e1000_hw *hw = &adapter->hw;
6179
6180         /* Do the reset outside of interrupt context */
6181         adapter->tx_timeout_count++;
6182
6183         if (hw->mac.type >= e1000_82580)
6184                 hw->dev_spec._82575.global_device_reset = true;
6185
6186         schedule_work(&adapter->reset_task);
6187         wr32(E1000_EICS,
6188              (adapter->eims_enable_mask & ~adapter->eims_other));
6189 }
6190
6191 static void igb_reset_task(struct work_struct *work)
6192 {
6193         struct igb_adapter *adapter;
6194         adapter = container_of(work, struct igb_adapter, reset_task);
6195
6196         igb_dump(adapter);
6197         netdev_err(adapter->netdev, "Reset adapter\n");
6198         igb_reinit_locked(adapter);
6199 }
6200
6201 /**
6202  *  igb_get_stats64 - Get System Network Statistics
6203  *  @netdev: network interface device structure
6204  *  @stats: rtnl_link_stats64 pointer
6205  **/
6206 static void igb_get_stats64(struct net_device *netdev,
6207                             struct rtnl_link_stats64 *stats)
6208 {
6209         struct igb_adapter *adapter = netdev_priv(netdev);
6210
6211         spin_lock(&adapter->stats64_lock);
6212         igb_update_stats(adapter);
6213         memcpy(stats, &adapter->stats64, sizeof(*stats));
6214         spin_unlock(&adapter->stats64_lock);
6215 }
6216
6217 /**
6218  *  igb_change_mtu - Change the Maximum Transfer Unit
6219  *  @netdev: network interface device structure
6220  *  @new_mtu: new value for maximum frame size
6221  *
6222  *  Returns 0 on success, negative on failure
6223  **/
6224 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6225 {
6226         struct igb_adapter *adapter = netdev_priv(netdev);
6227         struct pci_dev *pdev = adapter->pdev;
6228         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
6229
6230         /* adjust max frame to be at least the size of a standard frame */
6231         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6232                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6233
6234         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6235                 usleep_range(1000, 2000);
6236
6237         /* igb_down has a dependency on max_frame_size */
6238         adapter->max_frame_size = max_frame;
6239
6240         if (netif_running(netdev))
6241                 igb_down(adapter);
6242
6243         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
6244                  netdev->mtu, new_mtu);
6245         netdev->mtu = new_mtu;
6246
6247         if (netif_running(netdev))
6248                 igb_up(adapter);
6249         else
6250                 igb_reset(adapter);
6251
6252         clear_bit(__IGB_RESETTING, &adapter->state);
6253
6254         return 0;
6255 }
6256
6257 /**
6258  *  igb_update_stats - Update the board statistics counters
6259  *  @adapter: board private structure
6260  **/
6261 void igb_update_stats(struct igb_adapter *adapter)
6262 {
6263         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6264         struct e1000_hw *hw = &adapter->hw;
6265         struct pci_dev *pdev = adapter->pdev;
6266         u32 reg, mpc;
6267         int i;
6268         u64 bytes, packets;
6269         unsigned int start;
6270         u64 _bytes, _packets;
6271
6272         /* Prevent stats update while adapter is being reset, or if the pci
6273          * connection is down.
6274          */
6275         if (adapter->link_speed == 0)
6276                 return;
6277         if (pci_channel_offline(pdev))
6278                 return;
6279
6280         bytes = 0;
6281         packets = 0;
6282
6283         rcu_read_lock();
6284         for (i = 0; i < adapter->num_rx_queues; i++) {
6285                 struct igb_ring *ring = adapter->rx_ring[i];
6286                 u32 rqdpc = rd32(E1000_RQDPC(i));
6287                 if (hw->mac.type >= e1000_i210)
6288                         wr32(E1000_RQDPC(i), 0);
6289
6290                 if (rqdpc) {
6291                         ring->rx_stats.drops += rqdpc;
6292                         net_stats->rx_fifo_errors += rqdpc;
6293                 }
6294
6295                 do {
6296                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6297                         _bytes = ring->rx_stats.bytes;
6298                         _packets = ring->rx_stats.packets;
6299                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6300                 bytes += _bytes;
6301                 packets += _packets;
6302         }
6303
6304         net_stats->rx_bytes = bytes;
6305         net_stats->rx_packets = packets;
6306
6307         bytes = 0;
6308         packets = 0;
6309         for (i = 0; i < adapter->num_tx_queues; i++) {
6310                 struct igb_ring *ring = adapter->tx_ring[i];
6311                 do {
6312                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6313                         _bytes = ring->tx_stats.bytes;
6314                         _packets = ring->tx_stats.packets;
6315                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6316                 bytes += _bytes;
6317                 packets += _packets;
6318         }
6319         net_stats->tx_bytes = bytes;
6320         net_stats->tx_packets = packets;
6321         rcu_read_unlock();
6322
6323         /* read stats registers */
6324         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6325         adapter->stats.gprc += rd32(E1000_GPRC);
6326         adapter->stats.gorc += rd32(E1000_GORCL);
6327         rd32(E1000_GORCH); /* clear GORCL */
6328         adapter->stats.bprc += rd32(E1000_BPRC);
6329         adapter->stats.mprc += rd32(E1000_MPRC);
6330         adapter->stats.roc += rd32(E1000_ROC);
6331
6332         adapter->stats.prc64 += rd32(E1000_PRC64);
6333         adapter->stats.prc127 += rd32(E1000_PRC127);
6334         adapter->stats.prc255 += rd32(E1000_PRC255);
6335         adapter->stats.prc511 += rd32(E1000_PRC511);
6336         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6337         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6338         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6339         adapter->stats.sec += rd32(E1000_SEC);
6340
6341         mpc = rd32(E1000_MPC);
6342         adapter->stats.mpc += mpc;
6343         net_stats->rx_fifo_errors += mpc;
6344         adapter->stats.scc += rd32(E1000_SCC);
6345         adapter->stats.ecol += rd32(E1000_ECOL);
6346         adapter->stats.mcc += rd32(E1000_MCC);
6347         adapter->stats.latecol += rd32(E1000_LATECOL);
6348         adapter->stats.dc += rd32(E1000_DC);
6349         adapter->stats.rlec += rd32(E1000_RLEC);
6350         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6351         adapter->stats.xontxc += rd32(E1000_XONTXC);
6352         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6353         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6354         adapter->stats.fcruc += rd32(E1000_FCRUC);
6355         adapter->stats.gptc += rd32(E1000_GPTC);
6356         adapter->stats.gotc += rd32(E1000_GOTCL);
6357         rd32(E1000_GOTCH); /* clear GOTCL */
6358         adapter->stats.rnbc += rd32(E1000_RNBC);
6359         adapter->stats.ruc += rd32(E1000_RUC);
6360         adapter->stats.rfc += rd32(E1000_RFC);
6361         adapter->stats.rjc += rd32(E1000_RJC);
6362         adapter->stats.tor += rd32(E1000_TORH);
6363         adapter->stats.tot += rd32(E1000_TOTH);
6364         adapter->stats.tpr += rd32(E1000_TPR);
6365
6366         adapter->stats.ptc64 += rd32(E1000_PTC64);
6367         adapter->stats.ptc127 += rd32(E1000_PTC127);
6368         adapter->stats.ptc255 += rd32(E1000_PTC255);
6369         adapter->stats.ptc511 += rd32(E1000_PTC511);
6370         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6371         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6372
6373         adapter->stats.mptc += rd32(E1000_MPTC);
6374         adapter->stats.bptc += rd32(E1000_BPTC);
6375
6376         adapter->stats.tpt += rd32(E1000_TPT);
6377         adapter->stats.colc += rd32(E1000_COLC);
6378
6379         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6380         /* read internal phy specific stats */
6381         reg = rd32(E1000_CTRL_EXT);
6382         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6383                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6384
6385                 /* this stat has invalid values on i210/i211 */
6386                 if ((hw->mac.type != e1000_i210) &&
6387                     (hw->mac.type != e1000_i211))
6388                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6389         }
6390
6391         adapter->stats.tsctc += rd32(E1000_TSCTC);
6392         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6393
6394         adapter->stats.iac += rd32(E1000_IAC);
6395         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6396         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6397         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6398         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6399         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6400         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6401         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6402         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6403
6404         /* Fill out the OS statistics structure */
6405         net_stats->multicast = adapter->stats.mprc;
6406         net_stats->collisions = adapter->stats.colc;
6407
6408         /* Rx Errors */
6409
6410         /* RLEC on some newer hardware can be incorrect so build
6411          * our own version based on RUC and ROC
6412          */
6413         net_stats->rx_errors = adapter->stats.rxerrc +
6414                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6415                 adapter->stats.ruc + adapter->stats.roc +
6416                 adapter->stats.cexterr;
6417         net_stats->rx_length_errors = adapter->stats.ruc +
6418                                       adapter->stats.roc;
6419         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6420         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6421         net_stats->rx_missed_errors = adapter->stats.mpc;
6422
6423         /* Tx Errors */
6424         net_stats->tx_errors = adapter->stats.ecol +
6425                                adapter->stats.latecol;
6426         net_stats->tx_aborted_errors = adapter->stats.ecol;
6427         net_stats->tx_window_errors = adapter->stats.latecol;
6428         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6429
6430         /* Tx Dropped needs to be maintained elsewhere */
6431
6432         /* Management Stats */
6433         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6434         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6435         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6436
6437         /* OS2BMC Stats */
6438         reg = rd32(E1000_MANC);
6439         if (reg & E1000_MANC_EN_BMC2OS) {
6440                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6441                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6442                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6443                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6444         }
6445 }
6446
6447 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6448 {
6449         struct e1000_hw *hw = &adapter->hw;
6450         struct ptp_clock_event event;
6451         struct timespec64 ts;
6452         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6453
6454         if (tsicr & TSINTR_SYS_WRAP) {
6455                 event.type = PTP_CLOCK_PPS;
6456                 if (adapter->ptp_caps.pps)
6457                         ptp_clock_event(adapter->ptp_clock, &event);
6458                 ack |= TSINTR_SYS_WRAP;
6459         }
6460
6461         if (tsicr & E1000_TSICR_TXTS) {
6462                 /* retrieve hardware timestamp */
6463                 schedule_work(&adapter->ptp_tx_work);
6464                 ack |= E1000_TSICR_TXTS;
6465         }
6466
6467         if (tsicr & TSINTR_TT0) {
6468                 spin_lock(&adapter->tmreg_lock);
6469                 ts = timespec64_add(adapter->perout[0].start,
6470                                     adapter->perout[0].period);
6471                 /* u32 conversion of tv_sec is safe until y2106 */
6472                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6473                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6474                 tsauxc = rd32(E1000_TSAUXC);
6475                 tsauxc |= TSAUXC_EN_TT0;
6476                 wr32(E1000_TSAUXC, tsauxc);
6477                 adapter->perout[0].start = ts;
6478                 spin_unlock(&adapter->tmreg_lock);
6479                 ack |= TSINTR_TT0;
6480         }
6481
6482         if (tsicr & TSINTR_TT1) {
6483                 spin_lock(&adapter->tmreg_lock);
6484                 ts = timespec64_add(adapter->perout[1].start,
6485                                     adapter->perout[1].period);
6486                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6487                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6488                 tsauxc = rd32(E1000_TSAUXC);
6489                 tsauxc |= TSAUXC_EN_TT1;
6490                 wr32(E1000_TSAUXC, tsauxc);
6491                 adapter->perout[1].start = ts;
6492                 spin_unlock(&adapter->tmreg_lock);
6493                 ack |= TSINTR_TT1;
6494         }
6495
6496         if (tsicr & TSINTR_AUTT0) {
6497                 nsec = rd32(E1000_AUXSTMPL0);
6498                 sec  = rd32(E1000_AUXSTMPH0);
6499                 event.type = PTP_CLOCK_EXTTS;
6500                 event.index = 0;
6501                 event.timestamp = sec * 1000000000ULL + nsec;
6502                 ptp_clock_event(adapter->ptp_clock, &event);
6503                 ack |= TSINTR_AUTT0;
6504         }
6505
6506         if (tsicr & TSINTR_AUTT1) {
6507                 nsec = rd32(E1000_AUXSTMPL1);
6508                 sec  = rd32(E1000_AUXSTMPH1);
6509                 event.type = PTP_CLOCK_EXTTS;
6510                 event.index = 1;
6511                 event.timestamp = sec * 1000000000ULL + nsec;
6512                 ptp_clock_event(adapter->ptp_clock, &event);
6513                 ack |= TSINTR_AUTT1;
6514         }
6515
6516         /* acknowledge the interrupts */
6517         wr32(E1000_TSICR, ack);
6518 }
6519
6520 static irqreturn_t igb_msix_other(int irq, void *data)
6521 {
6522         struct igb_adapter *adapter = data;
6523         struct e1000_hw *hw = &adapter->hw;
6524         u32 icr = rd32(E1000_ICR);
6525         /* reading ICR causes bit 31 of EICR to be cleared */
6526
6527         if (icr & E1000_ICR_DRSTA)
6528                 schedule_work(&adapter->reset_task);
6529
6530         if (icr & E1000_ICR_DOUTSYNC) {
6531                 /* HW is reporting DMA is out of sync */
6532                 adapter->stats.doosync++;
6533                 /* The DMA Out of Sync is also indication of a spoof event
6534                  * in IOV mode. Check the Wrong VM Behavior register to
6535                  * see if it is really a spoof event.
6536                  */
6537                 igb_check_wvbr(adapter);
6538         }
6539
6540         /* Check for a mailbox event */
6541         if (icr & E1000_ICR_VMMB)
6542                 igb_msg_task(adapter);
6543
6544         if (icr & E1000_ICR_LSC) {
6545                 hw->mac.get_link_status = 1;
6546                 /* guard against interrupt when we're going down */
6547                 if (!test_bit(__IGB_DOWN, &adapter->state))
6548                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6549         }
6550
6551         if (icr & E1000_ICR_TS)
6552                 igb_tsync_interrupt(adapter);
6553
6554         wr32(E1000_EIMS, adapter->eims_other);
6555
6556         return IRQ_HANDLED;
6557 }
6558
6559 static void igb_write_itr(struct igb_q_vector *q_vector)
6560 {
6561         struct igb_adapter *adapter = q_vector->adapter;
6562         u32 itr_val = q_vector->itr_val & 0x7FFC;
6563
6564         if (!q_vector->set_itr)
6565                 return;
6566
6567         if (!itr_val)
6568                 itr_val = 0x4;
6569
6570         if (adapter->hw.mac.type == e1000_82575)
6571                 itr_val |= itr_val << 16;
6572         else
6573                 itr_val |= E1000_EITR_CNT_IGNR;
6574
6575         writel(itr_val, q_vector->itr_register);
6576         q_vector->set_itr = 0;
6577 }
6578
6579 static irqreturn_t igb_msix_ring(int irq, void *data)
6580 {
6581         struct igb_q_vector *q_vector = data;
6582
6583         /* Write the ITR value calculated from the previous interrupt. */
6584         igb_write_itr(q_vector);
6585
6586         napi_schedule(&q_vector->napi);
6587
6588         return IRQ_HANDLED;
6589 }
6590
6591 #ifdef CONFIG_IGB_DCA
6592 static void igb_update_tx_dca(struct igb_adapter *adapter,
6593                               struct igb_ring *tx_ring,
6594                               int cpu)
6595 {
6596         struct e1000_hw *hw = &adapter->hw;
6597         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6598
6599         if (hw->mac.type != e1000_82575)
6600                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6601
6602         /* We can enable relaxed ordering for reads, but not writes when
6603          * DCA is enabled.  This is due to a known issue in some chipsets
6604          * which will cause the DCA tag to be cleared.
6605          */
6606         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6607                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6608                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6609
6610         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6611 }
6612
6613 static void igb_update_rx_dca(struct igb_adapter *adapter,
6614                               struct igb_ring *rx_ring,
6615                               int cpu)
6616 {
6617         struct e1000_hw *hw = &adapter->hw;
6618         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6619
6620         if (hw->mac.type != e1000_82575)
6621                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6622
6623         /* We can enable relaxed ordering for reads, but not writes when
6624          * DCA is enabled.  This is due to a known issue in some chipsets
6625          * which will cause the DCA tag to be cleared.
6626          */
6627         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6628                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6629
6630         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6631 }
6632
6633 static void igb_update_dca(struct igb_q_vector *q_vector)
6634 {
6635         struct igb_adapter *adapter = q_vector->adapter;
6636         int cpu = get_cpu();
6637
6638         if (q_vector->cpu == cpu)
6639                 goto out_no_update;
6640
6641         if (q_vector->tx.ring)
6642                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6643
6644         if (q_vector->rx.ring)
6645                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6646
6647         q_vector->cpu = cpu;
6648 out_no_update:
6649         put_cpu();
6650 }
6651
6652 static void igb_setup_dca(struct igb_adapter *adapter)
6653 {
6654         struct e1000_hw *hw = &adapter->hw;
6655         int i;
6656
6657         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6658                 return;
6659
6660         /* Always use CB2 mode, difference is masked in the CB driver. */
6661         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6662
6663         for (i = 0; i < adapter->num_q_vectors; i++) {
6664                 adapter->q_vector[i]->cpu = -1;
6665                 igb_update_dca(adapter->q_vector[i]);
6666         }
6667 }
6668
6669 static int __igb_notify_dca(struct device *dev, void *data)
6670 {
6671         struct net_device *netdev = dev_get_drvdata(dev);
6672         struct igb_adapter *adapter = netdev_priv(netdev);
6673         struct pci_dev *pdev = adapter->pdev;
6674         struct e1000_hw *hw = &adapter->hw;
6675         unsigned long event = *(unsigned long *)data;
6676
6677         switch (event) {
6678         case DCA_PROVIDER_ADD:
6679                 /* if already enabled, don't do it again */
6680                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6681                         break;
6682                 if (dca_add_requester(dev) == 0) {
6683                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6684                         dev_info(&pdev->dev, "DCA enabled\n");
6685                         igb_setup_dca(adapter);
6686                         break;
6687                 }
6688                 /* Fall Through - since DCA is disabled. */
6689         case DCA_PROVIDER_REMOVE:
6690                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6691                         /* without this a class_device is left
6692                          * hanging around in the sysfs model
6693                          */
6694                         dca_remove_requester(dev);
6695                         dev_info(&pdev->dev, "DCA disabled\n");
6696                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6697                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6698                 }
6699                 break;
6700         }
6701
6702         return 0;
6703 }
6704
6705 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6706                           void *p)
6707 {
6708         int ret_val;
6709
6710         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6711                                          __igb_notify_dca);
6712
6713         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6714 }
6715 #endif /* CONFIG_IGB_DCA */
6716
6717 #ifdef CONFIG_PCI_IOV
6718 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6719 {
6720         unsigned char mac_addr[ETH_ALEN];
6721
6722         eth_zero_addr(mac_addr);
6723         igb_set_vf_mac(adapter, vf, mac_addr);
6724
6725         /* By default spoof check is enabled for all VFs */
6726         adapter->vf_data[vf].spoofchk_enabled = true;
6727
6728         /* By default VFs are not trusted */
6729         adapter->vf_data[vf].trusted = false;
6730
6731         return 0;
6732 }
6733
6734 #endif
6735 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6736 {
6737         struct e1000_hw *hw = &adapter->hw;
6738         u32 ping;
6739         int i;
6740
6741         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6742                 ping = E1000_PF_CONTROL_MSG;
6743                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6744                         ping |= E1000_VT_MSGTYPE_CTS;
6745                 igb_write_mbx(hw, &ping, 1, i);
6746         }
6747 }
6748
6749 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6750 {
6751         struct e1000_hw *hw = &adapter->hw;
6752         u32 vmolr = rd32(E1000_VMOLR(vf));
6753         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6754
6755         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6756                             IGB_VF_FLAG_MULTI_PROMISC);
6757         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6758
6759         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6760                 vmolr |= E1000_VMOLR_MPME;
6761                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6762                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6763         } else {
6764                 /* if we have hashes and we are clearing a multicast promisc
6765                  * flag we need to write the hashes to the MTA as this step
6766                  * was previously skipped
6767                  */
6768                 if (vf_data->num_vf_mc_hashes > 30) {
6769                         vmolr |= E1000_VMOLR_MPME;
6770                 } else if (vf_data->num_vf_mc_hashes) {
6771                         int j;
6772
6773                         vmolr |= E1000_VMOLR_ROMPE;
6774                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6775                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6776                 }
6777         }
6778
6779         wr32(E1000_VMOLR(vf), vmolr);
6780
6781         /* there are flags left unprocessed, likely not supported */
6782         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6783                 return -EINVAL;
6784
6785         return 0;
6786 }
6787
6788 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6789                                   u32 *msgbuf, u32 vf)
6790 {
6791         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6792         u16 *hash_list = (u16 *)&msgbuf[1];
6793         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6794         int i;
6795
6796         /* salt away the number of multicast addresses assigned
6797          * to this VF for later use to restore when the PF multi cast
6798          * list changes
6799          */
6800         vf_data->num_vf_mc_hashes = n;
6801
6802         /* only up to 30 hash values supported */
6803         if (n > 30)
6804                 n = 30;
6805
6806         /* store the hashes for later use */
6807         for (i = 0; i < n; i++)
6808                 vf_data->vf_mc_hashes[i] = hash_list[i];
6809
6810         /* Flush and reset the mta with the new values */
6811         igb_set_rx_mode(adapter->netdev);
6812
6813         return 0;
6814 }
6815
6816 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6817 {
6818         struct e1000_hw *hw = &adapter->hw;
6819         struct vf_data_storage *vf_data;
6820         int i, j;
6821
6822         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6823                 u32 vmolr = rd32(E1000_VMOLR(i));
6824
6825                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6826
6827                 vf_data = &adapter->vf_data[i];
6828
6829                 if ((vf_data->num_vf_mc_hashes > 30) ||
6830                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6831                         vmolr |= E1000_VMOLR_MPME;
6832                 } else if (vf_data->num_vf_mc_hashes) {
6833                         vmolr |= E1000_VMOLR_ROMPE;
6834                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6835                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6836                 }
6837                 wr32(E1000_VMOLR(i), vmolr);
6838         }
6839 }
6840
6841 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6842 {
6843         struct e1000_hw *hw = &adapter->hw;
6844         u32 pool_mask, vlvf_mask, i;
6845
6846         /* create mask for VF and other pools */
6847         pool_mask = E1000_VLVF_POOLSEL_MASK;
6848         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6849
6850         /* drop PF from pool bits */
6851         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6852                              adapter->vfs_allocated_count);
6853
6854         /* Find the vlan filter for this id */
6855         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6856                 u32 vlvf = rd32(E1000_VLVF(i));
6857                 u32 vfta_mask, vid, vfta;
6858
6859                 /* remove the vf from the pool */
6860                 if (!(vlvf & vlvf_mask))
6861                         continue;
6862
6863                 /* clear out bit from VLVF */
6864                 vlvf ^= vlvf_mask;
6865
6866                 /* if other pools are present, just remove ourselves */
6867                 if (vlvf & pool_mask)
6868                         goto update_vlvfb;
6869
6870                 /* if PF is present, leave VFTA */
6871                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6872                         goto update_vlvf;
6873
6874                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6875                 vfta_mask = BIT(vid % 32);
6876
6877                 /* clear bit from VFTA */
6878                 vfta = adapter->shadow_vfta[vid / 32];
6879                 if (vfta & vfta_mask)
6880                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6881 update_vlvf:
6882                 /* clear pool selection enable */
6883                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6884                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6885                 else
6886                         vlvf = 0;
6887 update_vlvfb:
6888                 /* clear pool bits */
6889                 wr32(E1000_VLVF(i), vlvf);
6890         }
6891 }
6892
6893 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6894 {
6895         u32 vlvf;
6896         int idx;
6897
6898         /* short cut the special case */
6899         if (vlan == 0)
6900                 return 0;
6901
6902         /* Search for the VLAN id in the VLVF entries */
6903         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6904                 vlvf = rd32(E1000_VLVF(idx));
6905                 if ((vlvf & VLAN_VID_MASK) == vlan)
6906                         break;
6907         }
6908
6909         return idx;
6910 }
6911
6912 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6913 {
6914         struct e1000_hw *hw = &adapter->hw;
6915         u32 bits, pf_id;
6916         int idx;
6917
6918         idx = igb_find_vlvf_entry(hw, vid);
6919         if (!idx)
6920                 return;
6921
6922         /* See if any other pools are set for this VLAN filter
6923          * entry other than the PF.
6924          */
6925         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6926         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6927         bits &= rd32(E1000_VLVF(idx));
6928
6929         /* Disable the filter so this falls into the default pool. */
6930         if (!bits) {
6931                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6932                         wr32(E1000_VLVF(idx), BIT(pf_id));
6933                 else
6934                         wr32(E1000_VLVF(idx), 0);
6935         }
6936 }
6937
6938 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6939                            bool add, u32 vf)
6940 {
6941         int pf_id = adapter->vfs_allocated_count;
6942         struct e1000_hw *hw = &adapter->hw;
6943         int err;
6944
6945         /* If VLAN overlaps with one the PF is currently monitoring make
6946          * sure that we are able to allocate a VLVF entry.  This may be
6947          * redundant but it guarantees PF will maintain visibility to
6948          * the VLAN.
6949          */
6950         if (add && test_bit(vid, adapter->active_vlans)) {
6951                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6952                 if (err)
6953                         return err;
6954         }
6955
6956         err = igb_vfta_set(hw, vid, vf, add, false);
6957
6958         if (add && !err)
6959                 return err;
6960
6961         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6962          * we may need to drop the PF pool bit in order to allow us to free
6963          * up the VLVF resources.
6964          */
6965         if (test_bit(vid, adapter->active_vlans) ||
6966             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6967                 igb_update_pf_vlvf(adapter, vid);
6968
6969         return err;
6970 }
6971
6972 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6973 {
6974         struct e1000_hw *hw = &adapter->hw;
6975
6976         if (vid)
6977                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6978         else
6979                 wr32(E1000_VMVIR(vf), 0);
6980 }
6981
6982 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6983                                 u16 vlan, u8 qos)
6984 {
6985         int err;
6986
6987         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6988         if (err)
6989                 return err;
6990
6991         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6992         igb_set_vmolr(adapter, vf, !vlan);
6993
6994         /* revoke access to previous VLAN */
6995         if (vlan != adapter->vf_data[vf].pf_vlan)
6996                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6997                                 false, vf);
6998
6999         adapter->vf_data[vf].pf_vlan = vlan;
7000         adapter->vf_data[vf].pf_qos = qos;
7001         igb_set_vf_vlan_strip(adapter, vf, true);
7002         dev_info(&adapter->pdev->dev,
7003                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7004         if (test_bit(__IGB_DOWN, &adapter->state)) {
7005                 dev_warn(&adapter->pdev->dev,
7006                          "The VF VLAN has been set, but the PF device is not up.\n");
7007                 dev_warn(&adapter->pdev->dev,
7008                          "Bring the PF device up before attempting to use the VF device.\n");
7009         }
7010
7011         return err;
7012 }
7013
7014 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7015 {
7016         /* Restore tagless access via VLAN 0 */
7017         igb_set_vf_vlan(adapter, 0, true, vf);
7018
7019         igb_set_vmvir(adapter, 0, vf);
7020         igb_set_vmolr(adapter, vf, true);
7021
7022         /* Remove any PF assigned VLAN */
7023         if (adapter->vf_data[vf].pf_vlan)
7024                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7025                                 false, vf);
7026
7027         adapter->vf_data[vf].pf_vlan = 0;
7028         adapter->vf_data[vf].pf_qos = 0;
7029         igb_set_vf_vlan_strip(adapter, vf, false);
7030
7031         return 0;
7032 }
7033
7034 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7035                                u16 vlan, u8 qos, __be16 vlan_proto)
7036 {
7037         struct igb_adapter *adapter = netdev_priv(netdev);
7038
7039         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7040                 return -EINVAL;
7041
7042         if (vlan_proto != htons(ETH_P_8021Q))
7043                 return -EPROTONOSUPPORT;
7044
7045         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7046                                igb_disable_port_vlan(adapter, vf);
7047 }
7048
7049 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7050 {
7051         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7052         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7053         int ret;
7054
7055         if (adapter->vf_data[vf].pf_vlan)
7056                 return -1;
7057
7058         /* VLAN 0 is a special case, don't allow it to be removed */
7059         if (!vid && !add)
7060                 return 0;
7061
7062         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7063         if (!ret)
7064                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7065         return ret;
7066 }
7067
7068 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7069 {
7070         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7071
7072         /* clear flags - except flag that indicates PF has set the MAC */
7073         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7074         vf_data->last_nack = jiffies;
7075
7076         /* reset vlans for device */
7077         igb_clear_vf_vfta(adapter, vf);
7078         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7079         igb_set_vmvir(adapter, vf_data->pf_vlan |
7080                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7081         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7082         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7083
7084         /* reset multicast table array for vf */
7085         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7086
7087         /* Flush and reset the mta with the new values */
7088         igb_set_rx_mode(adapter->netdev);
7089 }
7090
7091 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7092 {
7093         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7094
7095         /* clear mac address as we were hotplug removed/added */
7096         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7097                 eth_zero_addr(vf_mac);
7098
7099         /* process remaining reset events */
7100         igb_vf_reset(adapter, vf);
7101 }
7102
7103 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7104 {
7105         struct e1000_hw *hw = &adapter->hw;
7106         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7107         u32 reg, msgbuf[3];
7108         u8 *addr = (u8 *)(&msgbuf[1]);
7109
7110         /* process all the same items cleared in a function level reset */
7111         igb_vf_reset(adapter, vf);
7112
7113         /* set vf mac address */
7114         igb_set_vf_mac(adapter, vf, vf_mac);
7115
7116         /* enable transmit and receive for vf */
7117         reg = rd32(E1000_VFTE);
7118         wr32(E1000_VFTE, reg | BIT(vf));
7119         reg = rd32(E1000_VFRE);
7120         wr32(E1000_VFRE, reg | BIT(vf));
7121
7122         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7123
7124         /* reply to reset with ack and vf mac address */
7125         if (!is_zero_ether_addr(vf_mac)) {
7126                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7127                 memcpy(addr, vf_mac, ETH_ALEN);
7128         } else {
7129                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7130         }
7131         igb_write_mbx(hw, msgbuf, 3, vf);
7132 }
7133
7134 static void igb_flush_mac_table(struct igb_adapter *adapter)
7135 {
7136         struct e1000_hw *hw = &adapter->hw;
7137         int i;
7138
7139         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7140                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7141                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7142                 adapter->mac_table[i].queue = 0;
7143                 igb_rar_set_index(adapter, i);
7144         }
7145 }
7146
7147 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7148 {
7149         struct e1000_hw *hw = &adapter->hw;
7150         /* do not count rar entries reserved for VFs MAC addresses */
7151         int rar_entries = hw->mac.rar_entry_count -
7152                           adapter->vfs_allocated_count;
7153         int i, count = 0;
7154
7155         for (i = 0; i < rar_entries; i++) {
7156                 /* do not count default entries */
7157                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7158                         continue;
7159
7160                 /* do not count "in use" entries for different queues */
7161                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7162                     (adapter->mac_table[i].queue != queue))
7163                         continue;
7164
7165                 count++;
7166         }
7167
7168         return count;
7169 }
7170
7171 /* Set default MAC address for the PF in the first RAR entry */
7172 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7173 {
7174         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7175
7176         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7177         mac_table->queue = adapter->vfs_allocated_count;
7178         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7179
7180         igb_rar_set_index(adapter, 0);
7181 }
7182
7183 /* If the filter to be added and an already existing filter express
7184  * the same address and address type, it should be possible to only
7185  * override the other configurations, for example the queue to steer
7186  * traffic.
7187  */
7188 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7189                                       const u8 *addr, const u8 flags)
7190 {
7191         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7192                 return true;
7193
7194         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7195             (flags & IGB_MAC_STATE_SRC_ADDR))
7196                 return false;
7197
7198         if (!ether_addr_equal(addr, entry->addr))
7199                 return false;
7200
7201         return true;
7202 }
7203
7204 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7205  * 'flags' is used to indicate what kind of match is made, match is by
7206  * default for the destination address, if matching by source address
7207  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7208  */
7209 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7210                                     const u8 *addr, const u8 queue,
7211                                     const u8 flags)
7212 {
7213         struct e1000_hw *hw = &adapter->hw;
7214         int rar_entries = hw->mac.rar_entry_count -
7215                           adapter->vfs_allocated_count;
7216         int i;
7217
7218         if (is_zero_ether_addr(addr))
7219                 return -EINVAL;
7220
7221         /* Search for the first empty entry in the MAC table.
7222          * Do not touch entries at the end of the table reserved for the VF MAC
7223          * addresses.
7224          */
7225         for (i = 0; i < rar_entries; i++) {
7226                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7227                                                addr, flags))
7228                         continue;
7229
7230                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7231                 adapter->mac_table[i].queue = queue;
7232                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7233
7234                 igb_rar_set_index(adapter, i);
7235                 return i;
7236         }
7237
7238         return -ENOSPC;
7239 }
7240
7241 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7242                               const u8 queue)
7243 {
7244         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7245 }
7246
7247 /* Remove a MAC filter for 'addr' directing matching traffic to
7248  * 'queue', 'flags' is used to indicate what kind of match need to be
7249  * removed, match is by default for the destination address, if
7250  * matching by source address is to be removed the flag
7251  * IGB_MAC_STATE_SRC_ADDR can be used.
7252  */
7253 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7254                                     const u8 *addr, const u8 queue,
7255                                     const u8 flags)
7256 {
7257         struct e1000_hw *hw = &adapter->hw;
7258         int rar_entries = hw->mac.rar_entry_count -
7259                           adapter->vfs_allocated_count;
7260         int i;
7261
7262         if (is_zero_ether_addr(addr))
7263                 return -EINVAL;
7264
7265         /* Search for matching entry in the MAC table based on given address
7266          * and queue. Do not touch entries at the end of the table reserved
7267          * for the VF MAC addresses.
7268          */
7269         for (i = 0; i < rar_entries; i++) {
7270                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7271                         continue;
7272                 if ((adapter->mac_table[i].state & flags) != flags)
7273                         continue;
7274                 if (adapter->mac_table[i].queue != queue)
7275                         continue;
7276                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7277                         continue;
7278
7279                 /* When a filter for the default address is "deleted",
7280                  * we return it to its initial configuration
7281                  */
7282                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7283                         adapter->mac_table[i].state =
7284                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7285                         adapter->mac_table[i].queue =
7286                                 adapter->vfs_allocated_count;
7287                 } else {
7288                         adapter->mac_table[i].state = 0;
7289                         adapter->mac_table[i].queue = 0;
7290                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7291                 }
7292
7293                 igb_rar_set_index(adapter, i);
7294                 return 0;
7295         }
7296
7297         return -ENOENT;
7298 }
7299
7300 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7301                               const u8 queue)
7302 {
7303         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7304 }
7305
7306 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7307                                 const u8 *addr, u8 queue, u8 flags)
7308 {
7309         struct e1000_hw *hw = &adapter->hw;
7310
7311         /* In theory, this should be supported on 82575 as well, but
7312          * that part wasn't easily accessible during development.
7313          */
7314         if (hw->mac.type != e1000_i210)
7315                 return -EOPNOTSUPP;
7316
7317         return igb_add_mac_filter_flags(adapter, addr, queue,
7318                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7319 }
7320
7321 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7322                                 const u8 *addr, u8 queue, u8 flags)
7323 {
7324         return igb_del_mac_filter_flags(adapter, addr, queue,
7325                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7326 }
7327
7328 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7329 {
7330         struct igb_adapter *adapter = netdev_priv(netdev);
7331         int ret;
7332
7333         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7334
7335         return min_t(int, ret, 0);
7336 }
7337
7338 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7339 {
7340         struct igb_adapter *adapter = netdev_priv(netdev);
7341
7342         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7343
7344         return 0;
7345 }
7346
7347 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7348                                  const u32 info, const u8 *addr)
7349 {
7350         struct pci_dev *pdev = adapter->pdev;
7351         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7352         struct list_head *pos;
7353         struct vf_mac_filter *entry = NULL;
7354         int ret = 0;
7355
7356         switch (info) {
7357         case E1000_VF_MAC_FILTER_CLR:
7358                 /* remove all unicast MAC filters related to the current VF */
7359                 list_for_each(pos, &adapter->vf_macs.l) {
7360                         entry = list_entry(pos, struct vf_mac_filter, l);
7361                         if (entry->vf == vf) {
7362                                 entry->vf = -1;
7363                                 entry->free = true;
7364                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7365                         }
7366                 }
7367                 break;
7368         case E1000_VF_MAC_FILTER_ADD:
7369                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7370                     !vf_data->trusted) {
7371                         dev_warn(&pdev->dev,
7372                                  "VF %d requested MAC filter but is administratively denied\n",
7373                                  vf);
7374                         return -EINVAL;
7375                 }
7376                 if (!is_valid_ether_addr(addr)) {
7377                         dev_warn(&pdev->dev,
7378                                  "VF %d attempted to set invalid MAC filter\n",
7379                                  vf);
7380                         return -EINVAL;
7381                 }
7382
7383                 /* try to find empty slot in the list */
7384                 list_for_each(pos, &adapter->vf_macs.l) {
7385                         entry = list_entry(pos, struct vf_mac_filter, l);
7386                         if (entry->free)
7387                                 break;
7388                 }
7389
7390                 if (entry && entry->free) {
7391                         entry->free = false;
7392                         entry->vf = vf;
7393                         ether_addr_copy(entry->vf_mac, addr);
7394
7395                         ret = igb_add_mac_filter(adapter, addr, vf);
7396                         ret = min_t(int, ret, 0);
7397                 } else {
7398                         ret = -ENOSPC;
7399                 }
7400
7401                 if (ret == -ENOSPC)
7402                         dev_warn(&pdev->dev,
7403                                  "VF %d has requested MAC filter but there is no space for it\n",
7404                                  vf);
7405                 break;
7406         default:
7407                 ret = -EINVAL;
7408                 break;
7409         }
7410
7411         return ret;
7412 }
7413
7414 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7415 {
7416         struct pci_dev *pdev = adapter->pdev;
7417         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7418         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7419
7420         /* The VF MAC Address is stored in a packed array of bytes
7421          * starting at the second 32 bit word of the msg array
7422          */
7423         unsigned char *addr = (unsigned char *)&msg[1];
7424         int ret = 0;
7425
7426         if (!info) {
7427                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7428                     !vf_data->trusted) {
7429                         dev_warn(&pdev->dev,
7430                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7431                                  vf);
7432                         return -EINVAL;
7433                 }
7434
7435                 if (!is_valid_ether_addr(addr)) {
7436                         dev_warn(&pdev->dev,
7437                                  "VF %d attempted to set invalid MAC\n",
7438                                  vf);
7439                         return -EINVAL;
7440                 }
7441
7442                 ret = igb_set_vf_mac(adapter, vf, addr);
7443         } else {
7444                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7445         }
7446
7447         return ret;
7448 }
7449
7450 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7451 {
7452         struct e1000_hw *hw = &adapter->hw;
7453         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7454         u32 msg = E1000_VT_MSGTYPE_NACK;
7455
7456         /* if device isn't clear to send it shouldn't be reading either */
7457         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7458             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7459                 igb_write_mbx(hw, &msg, 1, vf);
7460                 vf_data->last_nack = jiffies;
7461         }
7462 }
7463
7464 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7465 {
7466         struct pci_dev *pdev = adapter->pdev;
7467         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7468         struct e1000_hw *hw = &adapter->hw;
7469         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7470         s32 retval;
7471
7472         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7473
7474         if (retval) {
7475                 /* if receive failed revoke VF CTS stats and restart init */
7476                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7477                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7478                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7479                         goto unlock;
7480                 goto out;
7481         }
7482
7483         /* this is a message we already processed, do nothing */
7484         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7485                 goto unlock;
7486
7487         /* until the vf completes a reset it should not be
7488          * allowed to start any configuration.
7489          */
7490         if (msgbuf[0] == E1000_VF_RESET) {
7491                 /* unlocks mailbox */
7492                 igb_vf_reset_msg(adapter, vf);
7493                 return;
7494         }
7495
7496         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7497                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7498                         goto unlock;
7499                 retval = -1;
7500                 goto out;
7501         }
7502
7503         switch ((msgbuf[0] & 0xFFFF)) {
7504         case E1000_VF_SET_MAC_ADDR:
7505                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7506                 break;
7507         case E1000_VF_SET_PROMISC:
7508                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7509                 break;
7510         case E1000_VF_SET_MULTICAST:
7511                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7512                 break;
7513         case E1000_VF_SET_LPE:
7514                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7515                 break;
7516         case E1000_VF_SET_VLAN:
7517                 retval = -1;
7518                 if (vf_data->pf_vlan)
7519                         dev_warn(&pdev->dev,
7520                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7521                                  vf);
7522                 else
7523                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7524                 break;
7525         default:
7526                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7527                 retval = -1;
7528                 break;
7529         }
7530
7531         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7532 out:
7533         /* notify the VF of the results of what it sent us */
7534         if (retval)
7535                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7536         else
7537                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7538
7539         /* unlocks mailbox */
7540         igb_write_mbx(hw, msgbuf, 1, vf);
7541         return;
7542
7543 unlock:
7544         igb_unlock_mbx(hw, vf);
7545 }
7546
7547 static void igb_msg_task(struct igb_adapter *adapter)
7548 {
7549         struct e1000_hw *hw = &adapter->hw;
7550         u32 vf;
7551
7552         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7553                 /* process any reset requests */
7554                 if (!igb_check_for_rst(hw, vf))
7555                         igb_vf_reset_event(adapter, vf);
7556
7557                 /* process any messages pending */
7558                 if (!igb_check_for_msg(hw, vf))
7559                         igb_rcv_msg_from_vf(adapter, vf);
7560
7561                 /* process any acks */
7562                 if (!igb_check_for_ack(hw, vf))
7563                         igb_rcv_ack_from_vf(adapter, vf);
7564         }
7565 }
7566
7567 /**
7568  *  igb_set_uta - Set unicast filter table address
7569  *  @adapter: board private structure
7570  *  @set: boolean indicating if we are setting or clearing bits
7571  *
7572  *  The unicast table address is a register array of 32-bit registers.
7573  *  The table is meant to be used in a way similar to how the MTA is used
7574  *  however due to certain limitations in the hardware it is necessary to
7575  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7576  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7577  **/
7578 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7579 {
7580         struct e1000_hw *hw = &adapter->hw;
7581         u32 uta = set ? ~0 : 0;
7582         int i;
7583
7584         /* we only need to do this if VMDq is enabled */
7585         if (!adapter->vfs_allocated_count)
7586                 return;
7587
7588         for (i = hw->mac.uta_reg_count; i--;)
7589                 array_wr32(E1000_UTA, i, uta);
7590 }
7591
7592 /**
7593  *  igb_intr_msi - Interrupt Handler
7594  *  @irq: interrupt number
7595  *  @data: pointer to a network interface device structure
7596  **/
7597 static irqreturn_t igb_intr_msi(int irq, void *data)
7598 {
7599         struct igb_adapter *adapter = data;
7600         struct igb_q_vector *q_vector = adapter->q_vector[0];
7601         struct e1000_hw *hw = &adapter->hw;
7602         /* read ICR disables interrupts using IAM */
7603         u32 icr = rd32(E1000_ICR);
7604
7605         igb_write_itr(q_vector);
7606
7607         if (icr & E1000_ICR_DRSTA)
7608                 schedule_work(&adapter->reset_task);
7609
7610         if (icr & E1000_ICR_DOUTSYNC) {
7611                 /* HW is reporting DMA is out of sync */
7612                 adapter->stats.doosync++;
7613         }
7614
7615         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7616                 hw->mac.get_link_status = 1;
7617                 if (!test_bit(__IGB_DOWN, &adapter->state))
7618                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7619         }
7620
7621         if (icr & E1000_ICR_TS)
7622                 igb_tsync_interrupt(adapter);
7623
7624         napi_schedule(&q_vector->napi);
7625
7626         return IRQ_HANDLED;
7627 }
7628
7629 /**
7630  *  igb_intr - Legacy Interrupt Handler
7631  *  @irq: interrupt number
7632  *  @data: pointer to a network interface device structure
7633  **/
7634 static irqreturn_t igb_intr(int irq, void *data)
7635 {
7636         struct igb_adapter *adapter = data;
7637         struct igb_q_vector *q_vector = adapter->q_vector[0];
7638         struct e1000_hw *hw = &adapter->hw;
7639         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
7640          * need for the IMC write
7641          */
7642         u32 icr = rd32(E1000_ICR);
7643
7644         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7645          * not set, then the adapter didn't send an interrupt
7646          */
7647         if (!(icr & E1000_ICR_INT_ASSERTED))
7648                 return IRQ_NONE;
7649
7650         igb_write_itr(q_vector);
7651
7652         if (icr & E1000_ICR_DRSTA)
7653                 schedule_work(&adapter->reset_task);
7654
7655         if (icr & E1000_ICR_DOUTSYNC) {
7656                 /* HW is reporting DMA is out of sync */
7657                 adapter->stats.doosync++;
7658         }
7659
7660         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7661                 hw->mac.get_link_status = 1;
7662                 /* guard against interrupt when we're going down */
7663                 if (!test_bit(__IGB_DOWN, &adapter->state))
7664                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7665         }
7666
7667         if (icr & E1000_ICR_TS)
7668                 igb_tsync_interrupt(adapter);
7669
7670         napi_schedule(&q_vector->napi);
7671
7672         return IRQ_HANDLED;
7673 }
7674
7675 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7676 {
7677         struct igb_adapter *adapter = q_vector->adapter;
7678         struct e1000_hw *hw = &adapter->hw;
7679
7680         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7681             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7682                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7683                         igb_set_itr(q_vector);
7684                 else
7685                         igb_update_ring_itr(q_vector);
7686         }
7687
7688         if (!test_bit(__IGB_DOWN, &adapter->state)) {
7689                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7690                         wr32(E1000_EIMS, q_vector->eims_value);
7691                 else
7692                         igb_irq_enable(adapter);
7693         }
7694 }
7695
7696 /**
7697  *  igb_poll - NAPI Rx polling callback
7698  *  @napi: napi polling structure
7699  *  @budget: count of how many packets we should handle
7700  **/
7701 static int igb_poll(struct napi_struct *napi, int budget)
7702 {
7703         struct igb_q_vector *q_vector = container_of(napi,
7704                                                      struct igb_q_vector,
7705                                                      napi);
7706         bool clean_complete = true;
7707         int work_done = 0;
7708
7709 #ifdef CONFIG_IGB_DCA
7710         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7711                 igb_update_dca(q_vector);
7712 #endif
7713         if (q_vector->tx.ring)
7714                 clean_complete = igb_clean_tx_irq(q_vector, budget);
7715
7716         if (q_vector->rx.ring) {
7717                 int cleaned = igb_clean_rx_irq(q_vector, budget);
7718
7719                 work_done += cleaned;
7720                 if (cleaned >= budget)
7721                         clean_complete = false;
7722         }
7723
7724         /* If all work not completed, return budget and keep polling */
7725         if (!clean_complete)
7726                 return budget;
7727
7728         /* Exit the polling mode, but don't re-enable interrupts if stack might
7729          * poll us due to busy-polling
7730          */
7731         if (likely(napi_complete_done(napi, work_done)))
7732                 igb_ring_irq_enable(q_vector);
7733
7734         return min(work_done, budget - 1);
7735 }
7736
7737 /**
7738  *  igb_clean_tx_irq - Reclaim resources after transmit completes
7739  *  @q_vector: pointer to q_vector containing needed info
7740  *  @napi_budget: Used to determine if we are in netpoll
7741  *
7742  *  returns true if ring is completely cleaned
7743  **/
7744 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
7745 {
7746         struct igb_adapter *adapter = q_vector->adapter;
7747         struct igb_ring *tx_ring = q_vector->tx.ring;
7748         struct igb_tx_buffer *tx_buffer;
7749         union e1000_adv_tx_desc *tx_desc;
7750         unsigned int total_bytes = 0, total_packets = 0;
7751         unsigned int budget = q_vector->tx.work_limit;
7752         unsigned int i = tx_ring->next_to_clean;
7753
7754         if (test_bit(__IGB_DOWN, &adapter->state))
7755                 return true;
7756
7757         tx_buffer = &tx_ring->tx_buffer_info[i];
7758         tx_desc = IGB_TX_DESC(tx_ring, i);
7759         i -= tx_ring->count;
7760
7761         do {
7762                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7763
7764                 /* if next_to_watch is not set then there is no work pending */
7765                 if (!eop_desc)
7766                         break;
7767
7768                 /* prevent any other reads prior to eop_desc */
7769                 smp_rmb();
7770
7771                 /* if DD is not set pending work has not been completed */
7772                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7773                         break;
7774
7775                 /* clear next_to_watch to prevent false hangs */
7776                 tx_buffer->next_to_watch = NULL;
7777
7778                 /* update the statistics for this packet */
7779                 total_bytes += tx_buffer->bytecount;
7780                 total_packets += tx_buffer->gso_segs;
7781
7782                 /* free the skb */
7783                 napi_consume_skb(tx_buffer->skb, napi_budget);
7784
7785                 /* unmap skb header data */
7786                 dma_unmap_single(tx_ring->dev,
7787                                  dma_unmap_addr(tx_buffer, dma),
7788                                  dma_unmap_len(tx_buffer, len),
7789                                  DMA_TO_DEVICE);
7790
7791                 /* clear tx_buffer data */
7792                 dma_unmap_len_set(tx_buffer, len, 0);
7793
7794                 /* clear last DMA location and unmap remaining buffers */
7795                 while (tx_desc != eop_desc) {
7796                         tx_buffer++;
7797                         tx_desc++;
7798                         i++;
7799                         if (unlikely(!i)) {
7800                                 i -= tx_ring->count;
7801                                 tx_buffer = tx_ring->tx_buffer_info;
7802                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7803                         }
7804
7805                         /* unmap any remaining paged data */
7806                         if (dma_unmap_len(tx_buffer, len)) {
7807                                 dma_unmap_page(tx_ring->dev,
7808                                                dma_unmap_addr(tx_buffer, dma),
7809                                                dma_unmap_len(tx_buffer, len),
7810                                                DMA_TO_DEVICE);
7811                                 dma_unmap_len_set(tx_buffer, len, 0);
7812                         }
7813                 }
7814
7815                 /* move us one more past the eop_desc for start of next pkt */
7816                 tx_buffer++;
7817                 tx_desc++;
7818                 i++;
7819                 if (unlikely(!i)) {
7820                         i -= tx_ring->count;
7821                         tx_buffer = tx_ring->tx_buffer_info;
7822                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7823                 }
7824
7825                 /* issue prefetch for next Tx descriptor */
7826                 prefetch(tx_desc);
7827
7828                 /* update budget accounting */
7829                 budget--;
7830         } while (likely(budget));
7831
7832         netdev_tx_completed_queue(txring_txq(tx_ring),
7833                                   total_packets, total_bytes);
7834         i += tx_ring->count;
7835         tx_ring->next_to_clean = i;
7836         u64_stats_update_begin(&tx_ring->tx_syncp);
7837         tx_ring->tx_stats.bytes += total_bytes;
7838         tx_ring->tx_stats.packets += total_packets;
7839         u64_stats_update_end(&tx_ring->tx_syncp);
7840         q_vector->tx.total_bytes += total_bytes;
7841         q_vector->tx.total_packets += total_packets;
7842
7843         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7844                 struct e1000_hw *hw = &adapter->hw;
7845
7846                 /* Detect a transmit hang in hardware, this serializes the
7847                  * check with the clearing of time_stamp and movement of i
7848                  */
7849                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7850                 if (tx_buffer->next_to_watch &&
7851                     time_after(jiffies, tx_buffer->time_stamp +
7852                                (adapter->tx_timeout_factor * HZ)) &&
7853                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7854
7855                         /* detected Tx unit hang */
7856                         dev_err(tx_ring->dev,
7857                                 "Detected Tx Unit Hang\n"
7858                                 "  Tx Queue             <%d>\n"
7859                                 "  TDH                  <%x>\n"
7860                                 "  TDT                  <%x>\n"
7861                                 "  next_to_use          <%x>\n"
7862                                 "  next_to_clean        <%x>\n"
7863                                 "buffer_info[next_to_clean]\n"
7864                                 "  time_stamp           <%lx>\n"
7865                                 "  next_to_watch        <%p>\n"
7866                                 "  jiffies              <%lx>\n"
7867                                 "  desc.status          <%x>\n",
7868                                 tx_ring->queue_index,
7869                                 rd32(E1000_TDH(tx_ring->reg_idx)),
7870                                 readl(tx_ring->tail),
7871                                 tx_ring->next_to_use,
7872                                 tx_ring->next_to_clean,
7873                                 tx_buffer->time_stamp,
7874                                 tx_buffer->next_to_watch,
7875                                 jiffies,
7876                                 tx_buffer->next_to_watch->wb.status);
7877                         netif_stop_subqueue(tx_ring->netdev,
7878                                             tx_ring->queue_index);
7879
7880                         /* we are about to reset, no point in enabling stuff */
7881                         return true;
7882                 }
7883         }
7884
7885 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7886         if (unlikely(total_packets &&
7887             netif_carrier_ok(tx_ring->netdev) &&
7888             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7889                 /* Make sure that anybody stopping the queue after this
7890                  * sees the new next_to_clean.
7891                  */
7892                 smp_mb();
7893                 if (__netif_subqueue_stopped(tx_ring->netdev,
7894                                              tx_ring->queue_index) &&
7895                     !(test_bit(__IGB_DOWN, &adapter->state))) {
7896                         netif_wake_subqueue(tx_ring->netdev,
7897                                             tx_ring->queue_index);
7898
7899                         u64_stats_update_begin(&tx_ring->tx_syncp);
7900                         tx_ring->tx_stats.restart_queue++;
7901                         u64_stats_update_end(&tx_ring->tx_syncp);
7902                 }
7903         }
7904
7905         return !!budget;
7906 }
7907
7908 /**
7909  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
7910  *  @rx_ring: rx descriptor ring to store buffers on
7911  *  @old_buff: donor buffer to have page reused
7912  *
7913  *  Synchronizes page for reuse by the adapter
7914  **/
7915 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7916                               struct igb_rx_buffer *old_buff)
7917 {
7918         struct igb_rx_buffer *new_buff;
7919         u16 nta = rx_ring->next_to_alloc;
7920
7921         new_buff = &rx_ring->rx_buffer_info[nta];
7922
7923         /* update, and store next to alloc */
7924         nta++;
7925         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7926
7927         /* Transfer page from old buffer to new buffer.
7928          * Move each member individually to avoid possible store
7929          * forwarding stalls.
7930          */
7931         new_buff->dma           = old_buff->dma;
7932         new_buff->page          = old_buff->page;
7933         new_buff->page_offset   = old_buff->page_offset;
7934         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
7935 }
7936
7937 static inline bool igb_page_is_reserved(struct page *page)
7938 {
7939         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7940 }
7941
7942 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7943 {
7944         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7945         struct page *page = rx_buffer->page;
7946
7947         /* avoid re-using remote pages */
7948         if (unlikely(igb_page_is_reserved(page)))
7949                 return false;
7950
7951 #if (PAGE_SIZE < 8192)
7952         /* if we are only owner of page we can reuse it */
7953         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
7954                 return false;
7955 #else
7956 #define IGB_LAST_OFFSET \
7957         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7958
7959         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
7960                 return false;
7961 #endif
7962
7963         /* If we have drained the page fragment pool we need to update
7964          * the pagecnt_bias and page count so that we fully restock the
7965          * number of references the driver holds.
7966          */
7967         if (unlikely(!pagecnt_bias)) {
7968                 page_ref_add(page, USHRT_MAX);
7969                 rx_buffer->pagecnt_bias = USHRT_MAX;
7970         }
7971
7972         return true;
7973 }
7974
7975 /**
7976  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7977  *  @rx_ring: rx descriptor ring to transact packets on
7978  *  @rx_buffer: buffer containing page to add
7979  *  @skb: sk_buff to place the data into
7980  *  @size: size of buffer to be added
7981  *
7982  *  This function will add the data contained in rx_buffer->page to the skb.
7983  **/
7984 static void igb_add_rx_frag(struct igb_ring *rx_ring,
7985                             struct igb_rx_buffer *rx_buffer,
7986                             struct sk_buff *skb,
7987                             unsigned int size)
7988 {
7989 #if (PAGE_SIZE < 8192)
7990         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
7991 #else
7992         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
7993                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
7994                                 SKB_DATA_ALIGN(size);
7995 #endif
7996         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
7997                         rx_buffer->page_offset, size, truesize);
7998 #if (PAGE_SIZE < 8192)
7999         rx_buffer->page_offset ^= truesize;
8000 #else
8001         rx_buffer->page_offset += truesize;
8002 #endif
8003 }
8004
8005 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8006                                          struct igb_rx_buffer *rx_buffer,
8007                                          union e1000_adv_rx_desc *rx_desc,
8008                                          unsigned int size)
8009 {
8010         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8011 #if (PAGE_SIZE < 8192)
8012         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8013 #else
8014         unsigned int truesize = SKB_DATA_ALIGN(size);
8015 #endif
8016         unsigned int headlen;
8017         struct sk_buff *skb;
8018
8019         /* prefetch first cache line of first page */
8020         prefetch(va);
8021 #if L1_CACHE_BYTES < 128
8022         prefetch(va + L1_CACHE_BYTES);
8023 #endif
8024
8025         /* allocate a skb to store the frags */
8026         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8027         if (unlikely(!skb))
8028                 return NULL;
8029
8030         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
8031                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8032                 va += IGB_TS_HDR_LEN;
8033                 size -= IGB_TS_HDR_LEN;
8034         }
8035
8036         /* Determine available headroom for copy */
8037         headlen = size;
8038         if (headlen > IGB_RX_HDR_LEN)
8039                 headlen = eth_get_headlen(skb->dev, va, IGB_RX_HDR_LEN);
8040
8041         /* align pull length to size of long to optimize memcpy performance */
8042         memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
8043
8044         /* update all of the pointers */
8045         size -= headlen;
8046         if (size) {
8047                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8048                                 (va + headlen) - page_address(rx_buffer->page),
8049                                 size, truesize);
8050 #if (PAGE_SIZE < 8192)
8051                 rx_buffer->page_offset ^= truesize;
8052 #else
8053                 rx_buffer->page_offset += truesize;
8054 #endif
8055         } else {
8056                 rx_buffer->pagecnt_bias++;
8057         }
8058
8059         return skb;
8060 }
8061
8062 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8063                                      struct igb_rx_buffer *rx_buffer,
8064                                      union e1000_adv_rx_desc *rx_desc,
8065                                      unsigned int size)
8066 {
8067         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8068 #if (PAGE_SIZE < 8192)
8069         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8070 #else
8071         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8072                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
8073 #endif
8074         struct sk_buff *skb;
8075
8076         /* prefetch first cache line of first page */
8077         prefetch(va);
8078 #if L1_CACHE_BYTES < 128
8079         prefetch(va + L1_CACHE_BYTES);
8080 #endif
8081
8082         /* build an skb around the page buffer */
8083         skb = build_skb(va - IGB_SKB_PAD, truesize);
8084         if (unlikely(!skb))
8085                 return NULL;
8086
8087         /* update pointers within the skb to store the data */
8088         skb_reserve(skb, IGB_SKB_PAD);
8089         __skb_put(skb, size);
8090
8091         /* pull timestamp out of packet data */
8092         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8093                 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
8094                 __skb_pull(skb, IGB_TS_HDR_LEN);
8095         }
8096
8097         /* update buffer offset */
8098 #if (PAGE_SIZE < 8192)
8099         rx_buffer->page_offset ^= truesize;
8100 #else
8101         rx_buffer->page_offset += truesize;
8102 #endif
8103
8104         return skb;
8105 }
8106
8107 static inline void igb_rx_checksum(struct igb_ring *ring,
8108                                    union e1000_adv_rx_desc *rx_desc,
8109                                    struct sk_buff *skb)
8110 {
8111         skb_checksum_none_assert(skb);
8112
8113         /* Ignore Checksum bit is set */
8114         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8115                 return;
8116
8117         /* Rx checksum disabled via ethtool */
8118         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8119                 return;
8120
8121         /* TCP/UDP checksum error bit is set */
8122         if (igb_test_staterr(rx_desc,
8123                              E1000_RXDEXT_STATERR_TCPE |
8124                              E1000_RXDEXT_STATERR_IPE)) {
8125                 /* work around errata with sctp packets where the TCPE aka
8126                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8127                  * packets, (aka let the stack check the crc32c)
8128                  */
8129                 if (!((skb->len == 60) &&
8130                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8131                         u64_stats_update_begin(&ring->rx_syncp);
8132                         ring->rx_stats.csum_err++;
8133                         u64_stats_update_end(&ring->rx_syncp);
8134                 }
8135                 /* let the stack verify checksum errors */
8136                 return;
8137         }
8138         /* It must be a TCP or UDP packet with a valid checksum */
8139         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8140                                       E1000_RXD_STAT_UDPCS))
8141                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8142
8143         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8144                 le32_to_cpu(rx_desc->wb.upper.status_error));
8145 }
8146
8147 static inline void igb_rx_hash(struct igb_ring *ring,
8148                                union e1000_adv_rx_desc *rx_desc,
8149                                struct sk_buff *skb)
8150 {
8151         if (ring->netdev->features & NETIF_F_RXHASH)
8152                 skb_set_hash(skb,
8153                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8154                              PKT_HASH_TYPE_L3);
8155 }
8156
8157 /**
8158  *  igb_is_non_eop - process handling of non-EOP buffers
8159  *  @rx_ring: Rx ring being processed
8160  *  @rx_desc: Rx descriptor for current buffer
8161  *  @skb: current socket buffer containing buffer in progress
8162  *
8163  *  This function updates next to clean.  If the buffer is an EOP buffer
8164  *  this function exits returning false, otherwise it will place the
8165  *  sk_buff in the next buffer to be chained and return true indicating
8166  *  that this is in fact a non-EOP buffer.
8167  **/
8168 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8169                            union e1000_adv_rx_desc *rx_desc)
8170 {
8171         u32 ntc = rx_ring->next_to_clean + 1;
8172
8173         /* fetch, update, and store next to clean */
8174         ntc = (ntc < rx_ring->count) ? ntc : 0;
8175         rx_ring->next_to_clean = ntc;
8176
8177         prefetch(IGB_RX_DESC(rx_ring, ntc));
8178
8179         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8180                 return false;
8181
8182         return true;
8183 }
8184
8185 /**
8186  *  igb_cleanup_headers - Correct corrupted or empty headers
8187  *  @rx_ring: rx descriptor ring packet is being transacted on
8188  *  @rx_desc: pointer to the EOP Rx descriptor
8189  *  @skb: pointer to current skb being fixed
8190  *
8191  *  Address the case where we are pulling data in on pages only
8192  *  and as such no data is present in the skb header.
8193  *
8194  *  In addition if skb is not at least 60 bytes we need to pad it so that
8195  *  it is large enough to qualify as a valid Ethernet frame.
8196  *
8197  *  Returns true if an error was encountered and skb was freed.
8198  **/
8199 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8200                                 union e1000_adv_rx_desc *rx_desc,
8201                                 struct sk_buff *skb)
8202 {
8203         if (unlikely((igb_test_staterr(rx_desc,
8204                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8205                 struct net_device *netdev = rx_ring->netdev;
8206                 if (!(netdev->features & NETIF_F_RXALL)) {
8207                         dev_kfree_skb_any(skb);
8208                         return true;
8209                 }
8210         }
8211
8212         /* if eth_skb_pad returns an error the skb was freed */
8213         if (eth_skb_pad(skb))
8214                 return true;
8215
8216         return false;
8217 }
8218
8219 /**
8220  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8221  *  @rx_ring: rx descriptor ring packet is being transacted on
8222  *  @rx_desc: pointer to the EOP Rx descriptor
8223  *  @skb: pointer to current skb being populated
8224  *
8225  *  This function checks the ring, descriptor, and packet information in
8226  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8227  *  other fields within the skb.
8228  **/
8229 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8230                                    union e1000_adv_rx_desc *rx_desc,
8231                                    struct sk_buff *skb)
8232 {
8233         struct net_device *dev = rx_ring->netdev;
8234
8235         igb_rx_hash(rx_ring, rx_desc, skb);
8236
8237         igb_rx_checksum(rx_ring, rx_desc, skb);
8238
8239         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8240             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8241                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8242
8243         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8244             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8245                 u16 vid;
8246
8247                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8248                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8249                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
8250                 else
8251                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8252
8253                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8254         }
8255
8256         skb_record_rx_queue(skb, rx_ring->queue_index);
8257
8258         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8259 }
8260
8261 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8262                                                const unsigned int size)
8263 {
8264         struct igb_rx_buffer *rx_buffer;
8265
8266         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8267         prefetchw(rx_buffer->page);
8268
8269         /* we are reusing so sync this buffer for CPU use */
8270         dma_sync_single_range_for_cpu(rx_ring->dev,
8271                                       rx_buffer->dma,
8272                                       rx_buffer->page_offset,
8273                                       size,
8274                                       DMA_FROM_DEVICE);
8275
8276         rx_buffer->pagecnt_bias--;
8277
8278         return rx_buffer;
8279 }
8280
8281 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8282                               struct igb_rx_buffer *rx_buffer)
8283 {
8284         if (igb_can_reuse_rx_page(rx_buffer)) {
8285                 /* hand second half of page back to the ring */
8286                 igb_reuse_rx_page(rx_ring, rx_buffer);
8287         } else {
8288                 /* We are not reusing the buffer so unmap it and free
8289                  * any references we are holding to it
8290                  */
8291                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8292                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8293                                      IGB_RX_DMA_ATTR);
8294                 __page_frag_cache_drain(rx_buffer->page,
8295                                         rx_buffer->pagecnt_bias);
8296         }
8297
8298         /* clear contents of rx_buffer */
8299         rx_buffer->page = NULL;
8300 }
8301
8302 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8303 {
8304         struct igb_ring *rx_ring = q_vector->rx.ring;
8305         struct sk_buff *skb = rx_ring->skb;
8306         unsigned int total_bytes = 0, total_packets = 0;
8307         u16 cleaned_count = igb_desc_unused(rx_ring);
8308
8309         while (likely(total_packets < budget)) {
8310                 union e1000_adv_rx_desc *rx_desc;
8311                 struct igb_rx_buffer *rx_buffer;
8312                 unsigned int size;
8313
8314                 /* return some buffers to hardware, one at a time is too slow */
8315                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8316                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8317                         cleaned_count = 0;
8318                 }
8319
8320                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8321                 size = le16_to_cpu(rx_desc->wb.upper.length);
8322                 if (!size)
8323                         break;
8324
8325                 /* This memory barrier is needed to keep us from reading
8326                  * any other fields out of the rx_desc until we know the
8327                  * descriptor has been written back
8328                  */
8329                 dma_rmb();
8330
8331                 rx_buffer = igb_get_rx_buffer(rx_ring, size);
8332
8333                 /* retrieve a buffer from the ring */
8334                 if (skb)
8335                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8336                 else if (ring_uses_build_skb(rx_ring))
8337                         skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
8338                 else
8339                         skb = igb_construct_skb(rx_ring, rx_buffer,
8340                                                 rx_desc, size);
8341
8342                 /* exit if we failed to retrieve a buffer */
8343                 if (!skb) {
8344                         rx_ring->rx_stats.alloc_failed++;
8345                         rx_buffer->pagecnt_bias++;
8346                         break;
8347                 }
8348
8349                 igb_put_rx_buffer(rx_ring, rx_buffer);
8350                 cleaned_count++;
8351
8352                 /* fetch next buffer in frame if non-eop */
8353                 if (igb_is_non_eop(rx_ring, rx_desc))
8354                         continue;
8355
8356                 /* verify the packet layout is correct */
8357                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8358                         skb = NULL;
8359                         continue;
8360                 }
8361
8362                 /* probably a little skewed due to removing CRC */
8363                 total_bytes += skb->len;
8364
8365                 /* populate checksum, timestamp, VLAN, and protocol */
8366                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8367
8368                 napi_gro_receive(&q_vector->napi, skb);
8369
8370                 /* reset skb pointer */
8371                 skb = NULL;
8372
8373                 /* update budget accounting */
8374                 total_packets++;
8375         }
8376
8377         /* place incomplete frames back on ring for completion */
8378         rx_ring->skb = skb;
8379
8380         u64_stats_update_begin(&rx_ring->rx_syncp);
8381         rx_ring->rx_stats.packets += total_packets;
8382         rx_ring->rx_stats.bytes += total_bytes;
8383         u64_stats_update_end(&rx_ring->rx_syncp);
8384         q_vector->rx.total_packets += total_packets;
8385         q_vector->rx.total_bytes += total_bytes;
8386
8387         if (cleaned_count)
8388                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8389
8390         return total_packets;
8391 }
8392
8393 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8394 {
8395         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8396 }
8397
8398 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8399                                   struct igb_rx_buffer *bi)
8400 {
8401         struct page *page = bi->page;
8402         dma_addr_t dma;
8403
8404         /* since we are recycling buffers we should seldom need to alloc */
8405         if (likely(page))
8406                 return true;
8407
8408         /* alloc new page for storage */
8409         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8410         if (unlikely(!page)) {
8411                 rx_ring->rx_stats.alloc_failed++;
8412                 return false;
8413         }
8414
8415         /* map page for use */
8416         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8417                                  igb_rx_pg_size(rx_ring),
8418                                  DMA_FROM_DEVICE,
8419                                  IGB_RX_DMA_ATTR);
8420
8421         /* if mapping failed free memory back to system since
8422          * there isn't much point in holding memory we can't use
8423          */
8424         if (dma_mapping_error(rx_ring->dev, dma)) {
8425                 __free_pages(page, igb_rx_pg_order(rx_ring));
8426
8427                 rx_ring->rx_stats.alloc_failed++;
8428                 return false;
8429         }
8430
8431         bi->dma = dma;
8432         bi->page = page;
8433         bi->page_offset = igb_rx_offset(rx_ring);
8434         bi->pagecnt_bias = 1;
8435
8436         return true;
8437 }
8438
8439 /**
8440  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
8441  *  @adapter: address of board private structure
8442  **/
8443 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8444 {
8445         union e1000_adv_rx_desc *rx_desc;
8446         struct igb_rx_buffer *bi;
8447         u16 i = rx_ring->next_to_use;
8448         u16 bufsz;
8449
8450         /* nothing to do */
8451         if (!cleaned_count)
8452                 return;
8453
8454         rx_desc = IGB_RX_DESC(rx_ring, i);
8455         bi = &rx_ring->rx_buffer_info[i];
8456         i -= rx_ring->count;
8457
8458         bufsz = igb_rx_bufsz(rx_ring);
8459
8460         do {
8461                 if (!igb_alloc_mapped_page(rx_ring, bi))
8462                         break;
8463
8464                 /* sync the buffer for use by the device */
8465                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8466                                                  bi->page_offset, bufsz,
8467                                                  DMA_FROM_DEVICE);
8468
8469                 /* Refresh the desc even if buffer_addrs didn't change
8470                  * because each write-back erases this info.
8471                  */
8472                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8473
8474                 rx_desc++;
8475                 bi++;
8476                 i++;
8477                 if (unlikely(!i)) {
8478                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8479                         bi = rx_ring->rx_buffer_info;
8480                         i -= rx_ring->count;
8481                 }
8482
8483                 /* clear the length for the next_to_use descriptor */
8484                 rx_desc->wb.upper.length = 0;
8485
8486                 cleaned_count--;
8487         } while (cleaned_count);
8488
8489         i += rx_ring->count;
8490
8491         if (rx_ring->next_to_use != i) {
8492                 /* record the next descriptor to use */
8493                 rx_ring->next_to_use = i;
8494
8495                 /* update next to alloc since we have filled the ring */
8496                 rx_ring->next_to_alloc = i;
8497
8498                 /* Force memory writes to complete before letting h/w
8499                  * know there are new descriptors to fetch.  (Only
8500                  * applicable for weak-ordered memory model archs,
8501                  * such as IA-64).
8502                  */
8503                 dma_wmb();
8504                 writel(i, rx_ring->tail);
8505         }
8506 }
8507
8508 /**
8509  * igb_mii_ioctl -
8510  * @netdev:
8511  * @ifreq:
8512  * @cmd:
8513  **/
8514 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8515 {
8516         struct igb_adapter *adapter = netdev_priv(netdev);
8517         struct mii_ioctl_data *data = if_mii(ifr);
8518
8519         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8520                 return -EOPNOTSUPP;
8521
8522         switch (cmd) {
8523         case SIOCGMIIPHY:
8524                 data->phy_id = adapter->hw.phy.addr;
8525                 break;
8526         case SIOCGMIIREG:
8527                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8528                                      &data->val_out))
8529                         return -EIO;
8530                 break;
8531         case SIOCSMIIREG:
8532         default:
8533                 return -EOPNOTSUPP;
8534         }
8535         return 0;
8536 }
8537
8538 /**
8539  * igb_ioctl -
8540  * @netdev:
8541  * @ifreq:
8542  * @cmd:
8543  **/
8544 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8545 {
8546         switch (cmd) {
8547         case SIOCGMIIPHY:
8548         case SIOCGMIIREG:
8549         case SIOCSMIIREG:
8550                 return igb_mii_ioctl(netdev, ifr, cmd);
8551         case SIOCGHWTSTAMP:
8552                 return igb_ptp_get_ts_config(netdev, ifr);
8553         case SIOCSHWTSTAMP:
8554                 return igb_ptp_set_ts_config(netdev, ifr);
8555         default:
8556                 return -EOPNOTSUPP;
8557         }
8558 }
8559
8560 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8561 {
8562         struct igb_adapter *adapter = hw->back;
8563
8564         pci_read_config_word(adapter->pdev, reg, value);
8565 }
8566
8567 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8568 {
8569         struct igb_adapter *adapter = hw->back;
8570
8571         pci_write_config_word(adapter->pdev, reg, *value);
8572 }
8573
8574 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8575 {
8576         struct igb_adapter *adapter = hw->back;
8577
8578         if (pcie_capability_read_word(adapter->pdev, reg, value))
8579                 return -E1000_ERR_CONFIG;
8580
8581         return 0;
8582 }
8583
8584 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8585 {
8586         struct igb_adapter *adapter = hw->back;
8587
8588         if (pcie_capability_write_word(adapter->pdev, reg, *value))
8589                 return -E1000_ERR_CONFIG;
8590
8591         return 0;
8592 }
8593
8594 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
8595 {
8596         struct igb_adapter *adapter = netdev_priv(netdev);
8597         struct e1000_hw *hw = &adapter->hw;
8598         u32 ctrl, rctl;
8599         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8600
8601         if (enable) {
8602                 /* enable VLAN tag insert/strip */
8603                 ctrl = rd32(E1000_CTRL);
8604                 ctrl |= E1000_CTRL_VME;
8605                 wr32(E1000_CTRL, ctrl);
8606
8607                 /* Disable CFI check */
8608                 rctl = rd32(E1000_RCTL);
8609                 rctl &= ~E1000_RCTL_CFIEN;
8610                 wr32(E1000_RCTL, rctl);
8611         } else {
8612                 /* disable VLAN tag insert/strip */
8613                 ctrl = rd32(E1000_CTRL);
8614                 ctrl &= ~E1000_CTRL_VME;
8615                 wr32(E1000_CTRL, ctrl);
8616         }
8617
8618         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
8619 }
8620
8621 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8622                                __be16 proto, u16 vid)
8623 {
8624         struct igb_adapter *adapter = netdev_priv(netdev);
8625         struct e1000_hw *hw = &adapter->hw;
8626         int pf_id = adapter->vfs_allocated_count;
8627
8628         /* add the filter since PF can receive vlans w/o entry in vlvf */
8629         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8630                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
8631
8632         set_bit(vid, adapter->active_vlans);
8633
8634         return 0;
8635 }
8636
8637 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8638                                 __be16 proto, u16 vid)
8639 {
8640         struct igb_adapter *adapter = netdev_priv(netdev);
8641         int pf_id = adapter->vfs_allocated_count;
8642         struct e1000_hw *hw = &adapter->hw;
8643
8644         /* remove VID from filter table */
8645         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8646                 igb_vfta_set(hw, vid, pf_id, false, true);
8647
8648         clear_bit(vid, adapter->active_vlans);
8649
8650         return 0;
8651 }
8652
8653 static void igb_restore_vlan(struct igb_adapter *adapter)
8654 {
8655         u16 vid = 1;
8656
8657         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8658         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
8659
8660         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
8661                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
8662 }
8663
8664 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
8665 {
8666         struct pci_dev *pdev = adapter->pdev;
8667         struct e1000_mac_info *mac = &adapter->hw.mac;
8668
8669         mac->autoneg = 0;
8670
8671         /* Make sure dplx is at most 1 bit and lsb of speed is not set
8672          * for the switch() below to work
8673          */
8674         if ((spd & 1) || (dplx & ~1))
8675                 goto err_inval;
8676
8677         /* Fiber NIC's only allow 1000 gbps Full duplex
8678          * and 100Mbps Full duplex for 100baseFx sfp
8679          */
8680         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8681                 switch (spd + dplx) {
8682                 case SPEED_10 + DUPLEX_HALF:
8683                 case SPEED_10 + DUPLEX_FULL:
8684                 case SPEED_100 + DUPLEX_HALF:
8685                         goto err_inval;
8686                 default:
8687                         break;
8688                 }
8689         }
8690
8691         switch (spd + dplx) {
8692         case SPEED_10 + DUPLEX_HALF:
8693                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8694                 break;
8695         case SPEED_10 + DUPLEX_FULL:
8696                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8697                 break;
8698         case SPEED_100 + DUPLEX_HALF:
8699                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8700                 break;
8701         case SPEED_100 + DUPLEX_FULL:
8702                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8703                 break;
8704         case SPEED_1000 + DUPLEX_FULL:
8705                 mac->autoneg = 1;
8706                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8707                 break;
8708         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8709         default:
8710                 goto err_inval;
8711         }
8712
8713         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8714         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8715
8716         return 0;
8717
8718 err_inval:
8719         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
8720         return -EINVAL;
8721 }
8722
8723 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8724                           bool runtime)
8725 {
8726         struct net_device *netdev = pci_get_drvdata(pdev);
8727         struct igb_adapter *adapter = netdev_priv(netdev);
8728         struct e1000_hw *hw = &adapter->hw;
8729         u32 ctrl, rctl, status;
8730         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8731         bool wake;
8732
8733         rtnl_lock();
8734         netif_device_detach(netdev);
8735
8736         if (netif_running(netdev))
8737                 __igb_close(netdev, true);
8738
8739         igb_ptp_suspend(adapter);
8740
8741         igb_clear_interrupt_scheme(adapter);
8742         rtnl_unlock();
8743
8744         status = rd32(E1000_STATUS);
8745         if (status & E1000_STATUS_LU)
8746                 wufc &= ~E1000_WUFC_LNKC;
8747
8748         if (wufc) {
8749                 igb_setup_rctl(adapter);
8750                 igb_set_rx_mode(netdev);
8751
8752                 /* turn on all-multi mode if wake on multicast is enabled */
8753                 if (wufc & E1000_WUFC_MC) {
8754                         rctl = rd32(E1000_RCTL);
8755                         rctl |= E1000_RCTL_MPE;
8756                         wr32(E1000_RCTL, rctl);
8757                 }
8758
8759                 ctrl = rd32(E1000_CTRL);
8760                 ctrl |= E1000_CTRL_ADVD3WUC;
8761                 wr32(E1000_CTRL, ctrl);
8762
8763                 /* Allow time for pending master requests to run */
8764                 igb_disable_pcie_master(hw);
8765
8766                 wr32(E1000_WUC, E1000_WUC_PME_EN);
8767                 wr32(E1000_WUFC, wufc);
8768         } else {
8769                 wr32(E1000_WUC, 0);
8770                 wr32(E1000_WUFC, 0);
8771         }
8772
8773         wake = wufc || adapter->en_mng_pt;
8774         if (!wake)
8775                 igb_power_down_link(adapter);
8776         else
8777                 igb_power_up_link(adapter);
8778
8779         if (enable_wake)
8780                 *enable_wake = wake;
8781
8782         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8783          * would have already happened in close and is redundant.
8784          */
8785         igb_release_hw_control(adapter);
8786
8787         pci_disable_device(pdev);
8788
8789         return 0;
8790 }
8791
8792 static void igb_deliver_wake_packet(struct net_device *netdev)
8793 {
8794         struct igb_adapter *adapter = netdev_priv(netdev);
8795         struct e1000_hw *hw = &adapter->hw;
8796         struct sk_buff *skb;
8797         u32 wupl;
8798
8799         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8800
8801         /* WUPM stores only the first 128 bytes of the wake packet.
8802          * Read the packet only if we have the whole thing.
8803          */
8804         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8805                 return;
8806
8807         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8808         if (!skb)
8809                 return;
8810
8811         skb_put(skb, wupl);
8812
8813         /* Ensure reads are 32-bit aligned */
8814         wupl = roundup(wupl, 4);
8815
8816         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8817
8818         skb->protocol = eth_type_trans(skb, netdev);
8819         netif_rx(skb);
8820 }
8821
8822 static int __maybe_unused igb_suspend(struct device *dev)
8823 {
8824         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
8825 }
8826
8827 static int __maybe_unused igb_resume(struct device *dev)
8828 {
8829         struct pci_dev *pdev = to_pci_dev(dev);
8830         struct net_device *netdev = pci_get_drvdata(pdev);
8831         struct igb_adapter *adapter = netdev_priv(netdev);
8832         struct e1000_hw *hw = &adapter->hw;
8833         u32 err, val;
8834
8835         pci_set_power_state(pdev, PCI_D0);
8836         pci_restore_state(pdev);
8837         pci_save_state(pdev);
8838
8839         if (!pci_device_is_present(pdev))
8840                 return -ENODEV;
8841         err = pci_enable_device_mem(pdev);
8842         if (err) {
8843                 dev_err(&pdev->dev,
8844                         "igb: Cannot enable PCI device from suspend\n");
8845                 return err;
8846         }
8847         pci_set_master(pdev);
8848
8849         pci_enable_wake(pdev, PCI_D3hot, 0);
8850         pci_enable_wake(pdev, PCI_D3cold, 0);
8851
8852         if (igb_init_interrupt_scheme(adapter, true)) {
8853                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8854                 return -ENOMEM;
8855         }
8856
8857         igb_reset(adapter);
8858
8859         /* let the f/w know that the h/w is now under the control of the
8860          * driver.
8861          */
8862         igb_get_hw_control(adapter);
8863
8864         val = rd32(E1000_WUS);
8865         if (val & WAKE_PKT_WUS)
8866                 igb_deliver_wake_packet(netdev);
8867
8868         wr32(E1000_WUS, ~0);
8869
8870         rtnl_lock();
8871         if (!err && netif_running(netdev))
8872                 err = __igb_open(netdev, true);
8873
8874         if (!err)
8875                 netif_device_attach(netdev);
8876         rtnl_unlock();
8877
8878         return err;
8879 }
8880
8881 static int __maybe_unused igb_runtime_idle(struct device *dev)
8882 {
8883         struct pci_dev *pdev = to_pci_dev(dev);
8884         struct net_device *netdev = pci_get_drvdata(pdev);
8885         struct igb_adapter *adapter = netdev_priv(netdev);
8886
8887         if (!igb_has_link(adapter))
8888                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8889
8890         return -EBUSY;
8891 }
8892
8893 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8894 {
8895         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
8896 }
8897
8898 static int __maybe_unused igb_runtime_resume(struct device *dev)
8899 {
8900         return igb_resume(dev);
8901 }
8902
8903 static void igb_shutdown(struct pci_dev *pdev)
8904 {
8905         bool wake;
8906
8907         __igb_shutdown(pdev, &wake, 0);
8908
8909         if (system_state == SYSTEM_POWER_OFF) {
8910                 pci_wake_from_d3(pdev, wake);
8911                 pci_set_power_state(pdev, PCI_D3hot);
8912         }
8913 }
8914
8915 #ifdef CONFIG_PCI_IOV
8916 static int igb_sriov_reinit(struct pci_dev *dev)
8917 {
8918         struct net_device *netdev = pci_get_drvdata(dev);
8919         struct igb_adapter *adapter = netdev_priv(netdev);
8920         struct pci_dev *pdev = adapter->pdev;
8921
8922         rtnl_lock();
8923
8924         if (netif_running(netdev))
8925                 igb_close(netdev);
8926         else
8927                 igb_reset(adapter);
8928
8929         igb_clear_interrupt_scheme(adapter);
8930
8931         igb_init_queue_configuration(adapter);
8932
8933         if (igb_init_interrupt_scheme(adapter, true)) {
8934                 rtnl_unlock();
8935                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8936                 return -ENOMEM;
8937         }
8938
8939         if (netif_running(netdev))
8940                 igb_open(netdev);
8941
8942         rtnl_unlock();
8943
8944         return 0;
8945 }
8946
8947 static int igb_pci_disable_sriov(struct pci_dev *dev)
8948 {
8949         int err = igb_disable_sriov(dev);
8950
8951         if (!err)
8952                 err = igb_sriov_reinit(dev);
8953
8954         return err;
8955 }
8956
8957 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
8958 {
8959         int err = igb_enable_sriov(dev, num_vfs);
8960
8961         if (err)
8962                 goto out;
8963
8964         err = igb_sriov_reinit(dev);
8965         if (!err)
8966                 return num_vfs;
8967
8968 out:
8969         return err;
8970 }
8971
8972 #endif
8973 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
8974 {
8975 #ifdef CONFIG_PCI_IOV
8976         if (num_vfs == 0)
8977                 return igb_pci_disable_sriov(dev);
8978         else
8979                 return igb_pci_enable_sriov(dev, num_vfs);
8980 #endif
8981         return 0;
8982 }
8983
8984 /**
8985  *  igb_io_error_detected - called when PCI error is detected
8986  *  @pdev: Pointer to PCI device
8987  *  @state: The current pci connection state
8988  *
8989  *  This function is called after a PCI bus error affecting
8990  *  this device has been detected.
8991  **/
8992 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
8993                                               pci_channel_state_t state)
8994 {
8995         struct net_device *netdev = pci_get_drvdata(pdev);
8996         struct igb_adapter *adapter = netdev_priv(netdev);
8997
8998         netif_device_detach(netdev);
8999
9000         if (state == pci_channel_io_perm_failure)
9001                 return PCI_ERS_RESULT_DISCONNECT;
9002
9003         if (netif_running(netdev))
9004                 igb_down(adapter);
9005         pci_disable_device(pdev);
9006
9007         /* Request a slot slot reset. */
9008         return PCI_ERS_RESULT_NEED_RESET;
9009 }
9010
9011 /**
9012  *  igb_io_slot_reset - called after the pci bus has been reset.
9013  *  @pdev: Pointer to PCI device
9014  *
9015  *  Restart the card from scratch, as if from a cold-boot. Implementation
9016  *  resembles the first-half of the igb_resume routine.
9017  **/
9018 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9019 {
9020         struct net_device *netdev = pci_get_drvdata(pdev);
9021         struct igb_adapter *adapter = netdev_priv(netdev);
9022         struct e1000_hw *hw = &adapter->hw;
9023         pci_ers_result_t result;
9024
9025         if (pci_enable_device_mem(pdev)) {
9026                 dev_err(&pdev->dev,
9027                         "Cannot re-enable PCI device after reset.\n");
9028                 result = PCI_ERS_RESULT_DISCONNECT;
9029         } else {
9030                 pci_set_master(pdev);
9031                 pci_restore_state(pdev);
9032                 pci_save_state(pdev);
9033
9034                 pci_enable_wake(pdev, PCI_D3hot, 0);
9035                 pci_enable_wake(pdev, PCI_D3cold, 0);
9036
9037                 /* In case of PCI error, adapter lose its HW address
9038                  * so we should re-assign it here.
9039                  */
9040                 hw->hw_addr = adapter->io_addr;
9041
9042                 igb_reset(adapter);
9043                 wr32(E1000_WUS, ~0);
9044                 result = PCI_ERS_RESULT_RECOVERED;
9045         }
9046
9047         return result;
9048 }
9049
9050 /**
9051  *  igb_io_resume - called when traffic can start flowing again.
9052  *  @pdev: Pointer to PCI device
9053  *
9054  *  This callback is called when the error recovery driver tells us that
9055  *  its OK to resume normal operation. Implementation resembles the
9056  *  second-half of the igb_resume routine.
9057  */
9058 static void igb_io_resume(struct pci_dev *pdev)
9059 {
9060         struct net_device *netdev = pci_get_drvdata(pdev);
9061         struct igb_adapter *adapter = netdev_priv(netdev);
9062
9063         if (netif_running(netdev)) {
9064                 if (igb_up(adapter)) {
9065                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9066                         return;
9067                 }
9068         }
9069
9070         netif_device_attach(netdev);
9071
9072         /* let the f/w know that the h/w is now under the control of the
9073          * driver.
9074          */
9075         igb_get_hw_control(adapter);
9076 }
9077
9078 /**
9079  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9080  *  @adapter: Pointer to adapter structure
9081  *  @index: Index of the RAR entry which need to be synced with MAC table
9082  **/
9083 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9084 {
9085         struct e1000_hw *hw = &adapter->hw;
9086         u32 rar_low, rar_high;
9087         u8 *addr = adapter->mac_table[index].addr;
9088
9089         /* HW expects these to be in network order when they are plugged
9090          * into the registers which are little endian.  In order to guarantee
9091          * that ordering we need to do an leXX_to_cpup here in order to be
9092          * ready for the byteswap that occurs with writel
9093          */
9094         rar_low = le32_to_cpup((__le32 *)(addr));
9095         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9096
9097         /* Indicate to hardware the Address is Valid. */
9098         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9099                 if (is_valid_ether_addr(addr))
9100                         rar_high |= E1000_RAH_AV;
9101
9102                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9103                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9104
9105                 switch (hw->mac.type) {
9106                 case e1000_82575:
9107                 case e1000_i210:
9108                         if (adapter->mac_table[index].state &
9109                             IGB_MAC_STATE_QUEUE_STEERING)
9110                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9111
9112                         rar_high |= E1000_RAH_POOL_1 *
9113                                     adapter->mac_table[index].queue;
9114                         break;
9115                 default:
9116                         rar_high |= E1000_RAH_POOL_1 <<
9117                                     adapter->mac_table[index].queue;
9118                         break;
9119                 }
9120         }
9121
9122         wr32(E1000_RAL(index), rar_low);
9123         wrfl();
9124         wr32(E1000_RAH(index), rar_high);
9125         wrfl();
9126 }
9127
9128 static int igb_set_vf_mac(struct igb_adapter *adapter,
9129                           int vf, unsigned char *mac_addr)
9130 {
9131         struct e1000_hw *hw = &adapter->hw;
9132         /* VF MAC addresses start at end of receive addresses and moves
9133          * towards the first, as a result a collision should not be possible
9134          */
9135         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9136         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9137
9138         ether_addr_copy(vf_mac_addr, mac_addr);
9139         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9140         adapter->mac_table[rar_entry].queue = vf;
9141         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9142         igb_rar_set_index(adapter, rar_entry);
9143
9144         return 0;
9145 }
9146
9147 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9148 {
9149         struct igb_adapter *adapter = netdev_priv(netdev);
9150
9151         if (vf >= adapter->vfs_allocated_count)
9152                 return -EINVAL;
9153
9154         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9155          * flag and allows to overwrite the MAC via VF netdev.  This
9156          * is necessary to allow libvirt a way to restore the original
9157          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9158          * down a VM.
9159          */
9160         if (is_zero_ether_addr(mac)) {
9161                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9162                 dev_info(&adapter->pdev->dev,
9163                          "remove administratively set MAC on VF %d\n",
9164                          vf);
9165         } else if (is_valid_ether_addr(mac)) {
9166                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9167                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9168                          mac, vf);
9169                 dev_info(&adapter->pdev->dev,
9170                          "Reload the VF driver to make this change effective.");
9171                 /* Generate additional warning if PF is down */
9172                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9173                         dev_warn(&adapter->pdev->dev,
9174                                  "The VF MAC address has been set, but the PF device is not up.\n");
9175                         dev_warn(&adapter->pdev->dev,
9176                                  "Bring the PF device up before attempting to use the VF device.\n");
9177                 }
9178         } else {
9179                 return -EINVAL;
9180         }
9181         return igb_set_vf_mac(adapter, vf, mac);
9182 }
9183
9184 static int igb_link_mbps(int internal_link_speed)
9185 {
9186         switch (internal_link_speed) {
9187         case SPEED_100:
9188                 return 100;
9189         case SPEED_1000:
9190                 return 1000;
9191         default:
9192                 return 0;
9193         }
9194 }
9195
9196 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9197                                   int link_speed)
9198 {
9199         int rf_dec, rf_int;
9200         u32 bcnrc_val;
9201
9202         if (tx_rate != 0) {
9203                 /* Calculate the rate factor values to set */
9204                 rf_int = link_speed / tx_rate;
9205                 rf_dec = (link_speed - (rf_int * tx_rate));
9206                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9207                          tx_rate;
9208
9209                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9210                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9211                               E1000_RTTBCNRC_RF_INT_MASK);
9212                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9213         } else {
9214                 bcnrc_val = 0;
9215         }
9216
9217         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9218         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9219          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9220          */
9221         wr32(E1000_RTTBCNRM, 0x14);
9222         wr32(E1000_RTTBCNRC, bcnrc_val);
9223 }
9224
9225 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9226 {
9227         int actual_link_speed, i;
9228         bool reset_rate = false;
9229
9230         /* VF TX rate limit was not set or not supported */
9231         if ((adapter->vf_rate_link_speed == 0) ||
9232             (adapter->hw.mac.type != e1000_82576))
9233                 return;
9234
9235         actual_link_speed = igb_link_mbps(adapter->link_speed);
9236         if (actual_link_speed != adapter->vf_rate_link_speed) {
9237                 reset_rate = true;
9238                 adapter->vf_rate_link_speed = 0;
9239                 dev_info(&adapter->pdev->dev,
9240                          "Link speed has been changed. VF Transmit rate is disabled\n");
9241         }
9242
9243         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9244                 if (reset_rate)
9245                         adapter->vf_data[i].tx_rate = 0;
9246
9247                 igb_set_vf_rate_limit(&adapter->hw, i,
9248                                       adapter->vf_data[i].tx_rate,
9249                                       actual_link_speed);
9250         }
9251 }
9252
9253 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9254                              int min_tx_rate, int max_tx_rate)
9255 {
9256         struct igb_adapter *adapter = netdev_priv(netdev);
9257         struct e1000_hw *hw = &adapter->hw;
9258         int actual_link_speed;
9259
9260         if (hw->mac.type != e1000_82576)
9261                 return -EOPNOTSUPP;
9262
9263         if (min_tx_rate)
9264                 return -EINVAL;
9265
9266         actual_link_speed = igb_link_mbps(adapter->link_speed);
9267         if ((vf >= adapter->vfs_allocated_count) ||
9268             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9269             (max_tx_rate < 0) ||
9270             (max_tx_rate > actual_link_speed))
9271                 return -EINVAL;
9272
9273         adapter->vf_rate_link_speed = actual_link_speed;
9274         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9275         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9276
9277         return 0;
9278 }
9279
9280 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9281                                    bool setting)
9282 {
9283         struct igb_adapter *adapter = netdev_priv(netdev);
9284         struct e1000_hw *hw = &adapter->hw;
9285         u32 reg_val, reg_offset;
9286
9287         if (!adapter->vfs_allocated_count)
9288                 return -EOPNOTSUPP;
9289
9290         if (vf >= adapter->vfs_allocated_count)
9291                 return -EINVAL;
9292
9293         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9294         reg_val = rd32(reg_offset);
9295         if (setting)
9296                 reg_val |= (BIT(vf) |
9297                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9298         else
9299                 reg_val &= ~(BIT(vf) |
9300                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9301         wr32(reg_offset, reg_val);
9302
9303         adapter->vf_data[vf].spoofchk_enabled = setting;
9304         return 0;
9305 }
9306
9307 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9308 {
9309         struct igb_adapter *adapter = netdev_priv(netdev);
9310
9311         if (vf >= adapter->vfs_allocated_count)
9312                 return -EINVAL;
9313         if (adapter->vf_data[vf].trusted == setting)
9314                 return 0;
9315
9316         adapter->vf_data[vf].trusted = setting;
9317
9318         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9319                  vf, setting ? "" : "not ");
9320         return 0;
9321 }
9322
9323 static int igb_ndo_get_vf_config(struct net_device *netdev,
9324                                  int vf, struct ifla_vf_info *ivi)
9325 {
9326         struct igb_adapter *adapter = netdev_priv(netdev);
9327         if (vf >= adapter->vfs_allocated_count)
9328                 return -EINVAL;
9329         ivi->vf = vf;
9330         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9331         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9332         ivi->min_tx_rate = 0;
9333         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9334         ivi->qos = adapter->vf_data[vf].pf_qos;
9335         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9336         ivi->trusted = adapter->vf_data[vf].trusted;
9337         return 0;
9338 }
9339
9340 static void igb_vmm_control(struct igb_adapter *adapter)
9341 {
9342         struct e1000_hw *hw = &adapter->hw;
9343         u32 reg;
9344
9345         switch (hw->mac.type) {
9346         case e1000_82575:
9347         case e1000_i210:
9348         case e1000_i211:
9349         case e1000_i354:
9350         default:
9351                 /* replication is not supported for 82575 */
9352                 return;
9353         case e1000_82576:
9354                 /* notify HW that the MAC is adding vlan tags */
9355                 reg = rd32(E1000_DTXCTL);
9356                 reg |= E1000_DTXCTL_VLAN_ADDED;
9357                 wr32(E1000_DTXCTL, reg);
9358                 /* Fall through */
9359         case e1000_82580:
9360                 /* enable replication vlan tag stripping */
9361                 reg = rd32(E1000_RPLOLR);
9362                 reg |= E1000_RPLOLR_STRVLAN;
9363                 wr32(E1000_RPLOLR, reg);
9364                 /* Fall through */
9365         case e1000_i350:
9366                 /* none of the above registers are supported by i350 */
9367                 break;
9368         }
9369
9370         if (adapter->vfs_allocated_count) {
9371                 igb_vmdq_set_loopback_pf(hw, true);
9372                 igb_vmdq_set_replication_pf(hw, true);
9373                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9374                                               adapter->vfs_allocated_count);
9375         } else {
9376                 igb_vmdq_set_loopback_pf(hw, false);
9377                 igb_vmdq_set_replication_pf(hw, false);
9378         }
9379 }
9380
9381 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9382 {
9383         struct e1000_hw *hw = &adapter->hw;
9384         u32 dmac_thr;
9385         u16 hwm;
9386
9387         if (hw->mac.type > e1000_82580) {
9388                 if (adapter->flags & IGB_FLAG_DMAC) {
9389                         u32 reg;
9390
9391                         /* force threshold to 0. */
9392                         wr32(E1000_DMCTXTH, 0);
9393
9394                         /* DMA Coalescing high water mark needs to be greater
9395                          * than the Rx threshold. Set hwm to PBA - max frame
9396                          * size in 16B units, capping it at PBA - 6KB.
9397                          */
9398                         hwm = 64 * (pba - 6);
9399                         reg = rd32(E1000_FCRTC);
9400                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9401                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9402                                 & E1000_FCRTC_RTH_COAL_MASK);
9403                         wr32(E1000_FCRTC, reg);
9404
9405                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9406                          * frame size, capping it at PBA - 10KB.
9407                          */
9408                         dmac_thr = pba - 10;
9409                         reg = rd32(E1000_DMACR);
9410                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9411                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9412                                 & E1000_DMACR_DMACTHR_MASK);
9413
9414                         /* transition to L0x or L1 if available..*/
9415                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9416
9417                         /* watchdog timer= +-1000 usec in 32usec intervals */
9418                         reg |= (1000 >> 5);
9419
9420                         /* Disable BMC-to-OS Watchdog Enable */
9421                         if (hw->mac.type != e1000_i354)
9422                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9423
9424                         wr32(E1000_DMACR, reg);
9425
9426                         /* no lower threshold to disable
9427                          * coalescing(smart fifb)-UTRESH=0
9428                          */
9429                         wr32(E1000_DMCRTRH, 0);
9430
9431                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9432
9433                         wr32(E1000_DMCTLX, reg);
9434
9435                         /* free space in tx packet buffer to wake from
9436                          * DMA coal
9437                          */
9438                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9439                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9440
9441                         /* make low power state decision controlled
9442                          * by DMA coal
9443                          */
9444                         reg = rd32(E1000_PCIEMISC);
9445                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9446                         wr32(E1000_PCIEMISC, reg);
9447                 } /* endif adapter->dmac is not disabled */
9448         } else if (hw->mac.type == e1000_82580) {
9449                 u32 reg = rd32(E1000_PCIEMISC);
9450
9451                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9452                 wr32(E1000_DMACR, 0);
9453         }
9454 }
9455
9456 /**
9457  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9458  *  @hw: pointer to hardware structure
9459  *  @byte_offset: byte offset to read
9460  *  @dev_addr: device address
9461  *  @data: value read
9462  *
9463  *  Performs byte read operation over I2C interface at
9464  *  a specified device address.
9465  **/
9466 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9467                       u8 dev_addr, u8 *data)
9468 {
9469         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9470         struct i2c_client *this_client = adapter->i2c_client;
9471         s32 status;
9472         u16 swfw_mask = 0;
9473
9474         if (!this_client)
9475                 return E1000_ERR_I2C;
9476
9477         swfw_mask = E1000_SWFW_PHY0_SM;
9478
9479         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9480                 return E1000_ERR_SWFW_SYNC;
9481
9482         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9483         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9484
9485         if (status < 0)
9486                 return E1000_ERR_I2C;
9487         else {
9488                 *data = status;
9489                 return 0;
9490         }
9491 }
9492
9493 /**
9494  *  igb_write_i2c_byte - Writes 8 bit word over I2C
9495  *  @hw: pointer to hardware structure
9496  *  @byte_offset: byte offset to write
9497  *  @dev_addr: device address
9498  *  @data: value to write
9499  *
9500  *  Performs byte write operation over I2C interface at
9501  *  a specified device address.
9502  **/
9503 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9504                        u8 dev_addr, u8 data)
9505 {
9506         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9507         struct i2c_client *this_client = adapter->i2c_client;
9508         s32 status;
9509         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9510
9511         if (!this_client)
9512                 return E1000_ERR_I2C;
9513
9514         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9515                 return E1000_ERR_SWFW_SYNC;
9516         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9517         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9518
9519         if (status)
9520                 return E1000_ERR_I2C;
9521         else
9522                 return 0;
9523
9524 }
9525
9526 int igb_reinit_queues(struct igb_adapter *adapter)
9527 {
9528         struct net_device *netdev = adapter->netdev;
9529         struct pci_dev *pdev = adapter->pdev;
9530         int err = 0;
9531
9532         if (netif_running(netdev))
9533                 igb_close(netdev);
9534
9535         igb_reset_interrupt_capability(adapter);
9536
9537         if (igb_init_interrupt_scheme(adapter, true)) {
9538                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9539                 return -ENOMEM;
9540         }
9541
9542         if (netif_running(netdev))
9543                 err = igb_open(netdev);
9544
9545         return err;
9546 }
9547
9548 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9549 {
9550         struct igb_nfc_filter *rule;
9551
9552         spin_lock(&adapter->nfc_lock);
9553
9554         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9555                 igb_erase_filter(adapter, rule);
9556
9557         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
9558                 igb_erase_filter(adapter, rule);
9559
9560         spin_unlock(&adapter->nfc_lock);
9561 }
9562
9563 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
9564 {
9565         struct igb_nfc_filter *rule;
9566
9567         spin_lock(&adapter->nfc_lock);
9568
9569         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9570                 igb_add_filter(adapter, rule);
9571
9572         spin_unlock(&adapter->nfc_lock);
9573 }
9574 /* igb_main.c */