drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (c) 2014-2015 Hisilicon Limited.
   4  */
   5
   6 #include <linux/delay.h>
   7 #include <linux/of_mdio.h>
   8 #include "hns_dsaf_main.h"
   9 #include "hns_dsaf_mac.h"
  10 #include "hns_dsaf_gmac.h"
  11
  12 static const struct mac_stats_string g_gmac_stats_string[] = {
  13         {"gmac_rx_octets_total_ok", MAC_STATS_FIELD_OFF(rx_good_bytes)},
  14         {"gmac_rx_octets_bad", MAC_STATS_FIELD_OFF(rx_bad_bytes)},
  15         {"gmac_rx_uc_pkts", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
  16         {"gmac_rx_mc_pkts", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
  17         {"gmac_rx_bc_pkts", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
  18         {"gmac_rx_pkts_64octets", MAC_STATS_FIELD_OFF(rx_64bytes)},
  19         {"gmac_rx_pkts_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
  20         {"gmac_rx_pkts_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
  21         {"gmac_rx_pkts_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
  22         {"gmac_rx_pkts_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
  23         {"gmac_rx_pkts_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
  24         {"gmac_rx_pkts_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
  25         {"gmac_rx_fcs_errors", MAC_STATS_FIELD_OFF(rx_fcs_err)},
  26         {"gmac_rx_tagged", MAC_STATS_FIELD_OFF(rx_vlan_pkts)},
  27         {"gmac_rx_data_err", MAC_STATS_FIELD_OFF(rx_data_err)},
  28         {"gmac_rx_align_errors", MAC_STATS_FIELD_OFF(rx_align_err)},
  29         {"gmac_rx_long_errors", MAC_STATS_FIELD_OFF(rx_oversize)},
  30         {"gmac_rx_jabber_errors", MAC_STATS_FIELD_OFF(rx_jabber_err)},
  31         {"gmac_rx_pause_maccontrol", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
  32         {"gmac_rx_unknown_maccontrol", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
  33         {"gmac_rx_very_long_err", MAC_STATS_FIELD_OFF(rx_long_err)},
  34         {"gmac_rx_runt_err", MAC_STATS_FIELD_OFF(rx_minto64)},
  35         {"gmac_rx_short_err", MAC_STATS_FIELD_OFF(rx_under_min)},
  36         {"gmac_rx_filt_pkt", MAC_STATS_FIELD_OFF(rx_filter_pkts)},
  37         {"gmac_rx_octets_total_filt", MAC_STATS_FIELD_OFF(rx_filter_bytes)},
  38         {"gmac_rx_overrun_cnt", MAC_STATS_FIELD_OFF(rx_fifo_overrun_err)},
  39         {"gmac_rx_length_err", MAC_STATS_FIELD_OFF(rx_len_err)},
  40         {"gmac_rx_fail_comma", MAC_STATS_FIELD_OFF(rx_comma_err)},
  41
  42         {"gmac_tx_octets_ok", MAC_STATS_FIELD_OFF(tx_good_bytes)},
  43         {"gmac_tx_octets_bad", MAC_STATS_FIELD_OFF(tx_bad_bytes)},
  44         {"gmac_tx_uc_pkts", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
  45         {"gmac_tx_mc_pkts", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
  46         {"gmac_tx_bc_pkts", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
  47         {"gmac_tx_pkts_64octets", MAC_STATS_FIELD_OFF(tx_64bytes)},
  48         {"gmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
  49         {"gmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
  50         {"gmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
  51         {"gmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
  52         {"gmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
  53         {"gmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
  54         {"gmac_tx_excessive_length_drop", MAC_STATS_FIELD_OFF(tx_jabber_err)},
  55         {"gmac_tx_underrun", MAC_STATS_FIELD_OFF(tx_underrun_err)},
  56         {"gmac_tx_tagged", MAC_STATS_FIELD_OFF(tx_vlan)},
  57         {"gmac_tx_crc_error", MAC_STATS_FIELD_OFF(tx_crc_err)},
  58         {"gmac_tx_pause_frames", MAC_STATS_FIELD_OFF(tx_pfc_tc0)}
  59 };
  60
  61 static void hns_gmac_enable(void *mac_drv, enum mac_commom_mode mode)
  62 {
  63         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  64
  65         /*enable GE rX/tX */
  66         if (mode == MAC_COMM_MODE_TX || mode == MAC_COMM_MODE_RX_AND_TX)
  67                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1);
  68
  69         if (mode == MAC_COMM_MODE_RX || mode == MAC_COMM_MODE_RX_AND_TX) {
  70                 /* enable rx pcs */
  71                 dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 0);
  72                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1);
  73         }
  74 }
  75
  76 static void hns_gmac_disable(void *mac_drv, enum mac_commom_mode mode)
  77 {
  78         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  79
  80         /*disable GE rX/tX */
  81         if (mode == MAC_COMM_MODE_TX || mode == MAC_COMM_MODE_RX_AND_TX)
  82                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0);
  83
  84         if (mode == MAC_COMM_MODE_RX || mode == MAC_COMM_MODE_RX_AND_TX) {
  85                 /* disable rx pcs */
  86                 dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 1);
  87                 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0);
  88         }
  89 }
  90
  91 /* hns_gmac_get_en - get port enable
  92  * @mac_drv:mac device
  93  * @rx:rx enable
  94  * @tx:tx enable
  95  */
  96 static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx)
  97 {
  98         struct mac_driver *drv = (struct mac_driver *)mac_drv;
  99         u32 porten;
 100
 101         porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 102         *tx = dsaf_get_bit(porten, GMAC_PORT_TX_EN_B);
 103         *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B);
 104 }
 105
 106 static void hns_gmac_free(void *mac_drv)
 107 {
 108         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 109         struct dsaf_device *dsaf_dev
 110                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 111
 112         u32 mac_id = drv->mac_id;
 113
 114         dsaf_dev->misc_op->ge_srst(dsaf_dev, mac_id, 0);
 115 }
 116
 117 static void hns_gmac_set_tx_auto_pause_frames(void *mac_drv, u16 newval)
 118 {
 119         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 120
 121         dsaf_set_dev_field(drv, GMAC_FC_TX_TIMER_REG, GMAC_FC_TX_TIMER_M,
 122                            GMAC_FC_TX_TIMER_S, newval);
 123 }
 124
 125 static void hns_gmac_get_tx_auto_pause_frames(void *mac_drv, u16 *newval)
 126 {
 127         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 128
 129         *newval = dsaf_get_dev_field(drv, GMAC_FC_TX_TIMER_REG,
 130                                      GMAC_FC_TX_TIMER_M, GMAC_FC_TX_TIMER_S);
 131 }
 132
 133 static void hns_gmac_set_rx_auto_pause_frames(void *mac_drv, u32 newval)
 134 {
 135         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 136
 137         dsaf_set_dev_bit(drv, GMAC_PAUSE_EN_REG,
 138                          GMAC_PAUSE_EN_RX_FDFC_B, !!newval);
 139 }
 140
 141 static void hns_gmac_config_max_frame_length(void *mac_drv, u16 newval)
 142 {
 143         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 144
 145         dsaf_set_dev_field(drv, GMAC_MAX_FRM_SIZE_REG, GMAC_MAX_FRM_SIZE_M,
 146                            GMAC_MAX_FRM_SIZE_S, newval);
 147
 148         dsaf_set_dev_field(drv, GAMC_RX_MAX_FRAME, GMAC_MAX_FRM_SIZE_M,
 149                            GMAC_MAX_FRM_SIZE_S, newval);
 150 }
 151
 152 static void hns_gmac_config_pad_and_crc(void *mac_drv, u8 newval)
 153 {
 154         u32 tx_ctrl;
 155         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 156
 157         tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 158         dsaf_set_bit(tx_ctrl, GMAC_TX_PAD_EN_B, !!newval);
 159         dsaf_set_bit(tx_ctrl, GMAC_TX_CRC_ADD_B, !!newval);
 160         dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl);
 161 }
 162
 163 static void hns_gmac_config_an_mode(void *mac_drv, u8 newval)
 164 {
 165         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 166
 167         dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 168                          GMAC_TX_AN_EN_B, !!newval);
 169 }
 170
 171 static void hns_gmac_tx_loop_pkt_dis(void *mac_drv)
 172 {
 173         u32 tx_loop_pkt_pri;
 174         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 175
 176         tx_loop_pkt_pri = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 177         dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_EN_B, 1);
 178         dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_HIG_PRI_B, 0);
 179         dsaf_write_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG, tx_loop_pkt_pri);
 180 }
 181
 182 static void hns_gmac_set_duplex_type(void *mac_drv, u8 newval)
 183 {
 184         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 185
 186         dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 187                          GMAC_DUPLEX_TYPE_B, !!newval);
 188 }
 189
 190 static void hns_gmac_get_duplex_type(void *mac_drv,
 191                                      enum hns_gmac_duplex_mdoe *duplex_mode)
 192 {
 193         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 194
 195         *duplex_mode = (enum hns_gmac_duplex_mdoe)dsaf_get_dev_bit(
 196                 drv, GMAC_DUPLEX_TYPE_REG, GMAC_DUPLEX_TYPE_B);
 197 }
 198
 199 static void hns_gmac_get_port_mode(void *mac_drv, enum hns_port_mode *port_mode)
 200 {
 201         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 202
 203         *port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 204                 drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 205 }
 206
 207 static void hns_gmac_port_mode_get(void *mac_drv,
 208                                    struct hns_gmac_port_mode_cfg *port_mode)
 209 {
 210         u32 tx_ctrl;
 211         u32 recv_ctrl;
 212         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 213
 214         port_mode->port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 215                 drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 216
 217         tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 218         recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 219
 220         port_mode->max_frm_size =
 221                 dsaf_get_dev_field(drv, GMAC_MAX_FRM_SIZE_REG,
 222                                    GMAC_MAX_FRM_SIZE_M, GMAC_MAX_FRM_SIZE_S);
 223         port_mode->short_runts_thr =
 224                 dsaf_get_dev_field(drv, GMAC_SHORT_RUNTS_THR_REG,
 225                                    GMAC_SHORT_RUNTS_THR_M,
 226                                    GMAC_SHORT_RUNTS_THR_S);
 227
 228         port_mode->pad_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_PAD_EN_B);
 229         port_mode->crc_add = dsaf_get_bit(tx_ctrl, GMAC_TX_CRC_ADD_B);
 230         port_mode->an_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_AN_EN_B);
 231
 232         port_mode->runt_pkt_en =
 233                 dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_RUNT_PKT_EN_B);
 234         port_mode->strip_pad_en =
 235                 dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_STRIP_PAD_EN_B);
 236 }
 237
 238 static void hns_gmac_pause_frm_cfg(void *mac_drv, u32 rx_pause_en,
 239                                    u32 tx_pause_en)
 240 {
 241         u32 pause_en;
 242         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 243
 244         pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 245         dsaf_set_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B, !!rx_pause_en);
 246         dsaf_set_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B, !!tx_pause_en);
 247         dsaf_write_dev(drv, GMAC_PAUSE_EN_REG, pause_en);
 248 }
 249
 250 static void hns_gmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_pause_en,
 251                                       u32 *tx_pause_en)
 252 {
 253         u32 pause_en;
 254         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 255
 256         pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 257
 258         *rx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B);
 259         *tx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B);
 260 }
 261
 262 static bool hns_gmac_need_adjust_link(void *mac_drv, enum mac_speed speed,
 263                                       int duplex)
 264 {
 265         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 266         struct hns_mac_cb *mac_cb = drv->mac_cb;
 267
 268         return (mac_cb->speed != speed) ||
 269                 (mac_cb->half_duplex == duplex);
 270 }
 271
 272 static int hns_gmac_adjust_link(void *mac_drv, enum mac_speed speed,
 273                                 u32 full_duplex)
 274 {
 275         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 276
 277         dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 278                          GMAC_DUPLEX_TYPE_B, !!full_duplex);
 279
 280         switch (speed) {
 281         case MAC_SPEED_10:
 282                 dsaf_set_dev_field(
 283                         drv, GMAC_PORT_MODE_REG,
 284                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x6);
 285                 break;
 286         case MAC_SPEED_100:
 287                 dsaf_set_dev_field(
 288                         drv, GMAC_PORT_MODE_REG,
 289                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x7);
 290                 break;
 291         case MAC_SPEED_1000:
 292                 dsaf_set_dev_field(
 293                         drv, GMAC_PORT_MODE_REG,
 294                         GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x8);
 295                 break;
 296         default:
 297                 dev_err(drv->dev,
 298                         "hns_gmac_adjust_link fail, speed%d mac%d\n",
 299                         speed, drv->mac_id);
 300                 return -EINVAL;
 301         }
 302
 303         return 0;
 304 }
 305
 306 static void hns_gmac_set_uc_match(void *mac_drv, u16 en)
 307 {
 308         struct mac_driver *drv = mac_drv;
 309
 310         dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG,
 311                          GMAC_UC_MATCH_EN_B, !en);
 312         dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 313                          GMAC_ADDR_EN_B, !en);
 314 }
 315
 316 static void hns_gmac_set_promisc(void *mac_drv, u8 en)
 317 {
 318         struct mac_driver *drv = mac_drv;
 319
 320         if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 321                 hns_gmac_set_uc_match(mac_drv, en);
 322 }
 323
 324 static int hns_gmac_wait_fifo_clean(void *mac_drv)
 325 {
 326         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 327         int wait_cnt;
 328         u32 val;
 329
 330         wait_cnt = 0;
 331         while (wait_cnt++ < HNS_MAX_WAIT_CNT) {
 332                 val = dsaf_read_dev(drv, GMAC_FIFO_STATE_REG);
 333                 /* bit5~bit0 is not send complete pkts */
 334                 if ((val & 0x3f) == 0)
 335                         break;
 336                 usleep_range(100, 200);
 337         }
 338
 339         if (wait_cnt >= HNS_MAX_WAIT_CNT) {
 340                 dev_err(drv->dev,
 341                         "hns ge %d fifo was not idle.\n", drv->mac_id);
 342                 return -EBUSY;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static void hns_gmac_init(void *mac_drv)
 349 {
 350         u32 port;
 351         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 352         struct dsaf_device *dsaf_dev
 353                 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 354
 355         port = drv->mac_id;
 356
 357         dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 0);
 358         mdelay(10);
 359         dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 1);
 360         mdelay(10);
 361         hns_gmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
 362         hns_gmac_tx_loop_pkt_dis(mac_drv);
 363         if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 364                 hns_gmac_set_uc_match(mac_drv, 0);
 365
 366         hns_gmac_config_pad_and_crc(mac_drv, 1);
 367
 368         dsaf_set_dev_bit(drv, GMAC_MODE_CHANGE_EN_REG,
 369                          GMAC_MODE_CHANGE_EB_B, 1);
 370
 371         /* reduce gmac tx water line to avoid gmac hang-up
 372          * in speed 100M and duplex half.
 373          */
 374         dsaf_set_dev_field(drv, GMAC_TX_WATER_LINE_REG, GMAC_TX_WATER_LINE_MASK,
 375                            GMAC_TX_WATER_LINE_SHIFT, 8);
 376 }
 377
 378 static void hns_gmac_update_stats(void *mac_drv)
 379 {
 380         struct mac_hw_stats *hw_stats = NULL;
 381         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 382
 383         hw_stats = &drv->mac_cb->hw_stats;
 384
 385         /* RX */
 386         hw_stats->rx_good_bytes
 387                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 388         hw_stats->rx_bad_bytes
 389                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 390         hw_stats->rx_uc_pkts += dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 391         hw_stats->rx_mc_pkts += dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 392         hw_stats->rx_bc_pkts += dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 393         hw_stats->rx_64bytes
 394                 += dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 395         hw_stats->rx_65to127
 396                 += dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 397         hw_stats->rx_128to255
 398                 += dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 399         hw_stats->rx_256to511
 400                 += dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 401         hw_stats->rx_512to1023
 402                 += dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 403         hw_stats->rx_1024to1518
 404                 += dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 405         hw_stats->rx_1519tomax
 406                 += dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 407         hw_stats->rx_fcs_err += dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 408         hw_stats->rx_vlan_pkts += dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 409         hw_stats->rx_data_err += dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 410         hw_stats->rx_align_err
 411                 += dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 412         hw_stats->rx_oversize
 413                 += dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 414         hw_stats->rx_jabber_err
 415                 += dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 416         hw_stats->rx_pfc_tc0
 417                 += dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 418         hw_stats->rx_unknown_ctrl
 419                 += dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 420         hw_stats->rx_long_err
 421                 += dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 422         hw_stats->rx_minto64
 423                 += dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 424         hw_stats->rx_under_min
 425                 += dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 426         hw_stats->rx_filter_pkts
 427                 += dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 428         hw_stats->rx_filter_bytes
 429                 += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 430         hw_stats->rx_fifo_overrun_err
 431                 += dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 432         hw_stats->rx_len_err
 433                 += dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 434         hw_stats->rx_comma_err
 435                 += dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 436
 437         /* TX */
 438         hw_stats->tx_good_bytes
 439                 += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 440         hw_stats->tx_bad_bytes
 441                 += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 442         hw_stats->tx_uc_pkts += dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 443         hw_stats->tx_mc_pkts += dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 444         hw_stats->tx_bc_pkts += dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 445         hw_stats->tx_64bytes
 446                 += dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 447         hw_stats->tx_65to127
 448                 += dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 449         hw_stats->tx_128to255
 450                 += dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 451         hw_stats->tx_256to511
 452                 += dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 453         hw_stats->tx_512to1023
 454                 += dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 455         hw_stats->tx_1024to1518
 456                 += dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 457         hw_stats->tx_1519tomax
 458                 += dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 459         hw_stats->tx_jabber_err
 460                 += dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 461         hw_stats->tx_underrun_err
 462                 += dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 463         hw_stats->tx_vlan += dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 464         hw_stats->tx_crc_err += dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 465         hw_stats->tx_pfc_tc0
 466                 += dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 467 }
 468
 469 static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
 470 {
 471         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 472
 473         u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
 474
 475         u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
 476                 | (mac_addr[3] << 16) | (mac_addr[2] << 24);
 477
 478         u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 479         u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
 480
 481         dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
 482         dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 483                        high_val | (sta_addr_en << GMAC_ADDR_EN_B));
 484 }
 485
 486 static int hns_gmac_config_loopback(void *mac_drv, enum hnae_loop loop_mode,
 487                                     u8 enable)
 488 {
 489         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 490
 491         switch (loop_mode) {
 492         case MAC_INTERNALLOOP_MAC:
 493                 dsaf_set_dev_bit(drv, GMAC_LOOP_REG, GMAC_LP_REG_CF2MI_LP_EN_B,
 494                                  !!enable);
 495                 break;
 496         default:
 497                 dev_err(drv->dev, "loop_mode error\n");
 498                 return -EINVAL;
 499         }
 500
 501         return 0;
 502 }
 503
 504 static void hns_gmac_get_info(void *mac_drv, struct mac_info *mac_info)
 505 {
 506         enum hns_gmac_duplex_mdoe duplex;
 507         enum hns_port_mode speed;
 508         u32 rx_pause;
 509         u32 tx_pause;
 510         u32 rx;
 511         u32 tx;
 512         u16 fc_tx_timer;
 513         struct hns_gmac_port_mode_cfg port_mode = { GMAC_10M_MII, 0 };
 514
 515         hns_gmac_port_mode_get(mac_drv, &port_mode);
 516         mac_info->pad_and_crc_en = port_mode.crc_add && port_mode.pad_enable;
 517         mac_info->auto_neg = port_mode.an_enable;
 518
 519         hns_gmac_get_tx_auto_pause_frames(mac_drv, &fc_tx_timer);
 520         mac_info->tx_pause_time = fc_tx_timer;
 521
 522         hns_gmac_get_en(mac_drv, &rx, &tx);
 523         mac_info->port_en = rx && tx;
 524
 525         hns_gmac_get_duplex_type(mac_drv, &duplex);
 526         mac_info->duplex = duplex;
 527
 528         hns_gmac_get_port_mode(mac_drv, &speed);
 529         switch (speed) {
 530         case GMAC_10M_SGMII:
 531                 mac_info->speed = MAC_SPEED_10;
 532                 break;
 533         case GMAC_100M_SGMII:
 534                 mac_info->speed = MAC_SPEED_100;
 535                 break;
 536         case GMAC_1000M_SGMII:
 537                 mac_info->speed = MAC_SPEED_1000;
 538                 break;
 539         default:
 540                 mac_info->speed = 0;
 541                 break;
 542         }
 543
 544         hns_gmac_get_pausefrm_cfg(mac_drv, &rx_pause, &tx_pause);
 545         mac_info->rx_pause_en = rx_pause;
 546         mac_info->tx_pause_en = tx_pause;
 547 }
 548
 549 static void hns_gmac_autoneg_stat(void *mac_drv, u32 *enable)
 550 {
 551         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 552
 553         *enable = dsaf_get_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 554                                    GMAC_TX_AN_EN_B);
 555 }
 556
 557 static void hns_gmac_get_link_status(void *mac_drv, u32 *link_stat)
 558 {
 559         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 560
 561         *link_stat = dsaf_get_dev_bit(drv, GMAC_AN_NEG_STATE_REG,
 562                                       GMAC_AN_NEG_STAT_RX_SYNC_OK_B);
 563 }
 564
 565 static void hns_gmac_get_regs(void *mac_drv, void *data)
 566 {
 567         u32 *regs = data;
 568         int i;
 569         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 570
 571         /* base config registers */
 572         regs[0] = dsaf_read_dev(drv, GMAC_DUPLEX_TYPE_REG);
 573         regs[1] = dsaf_read_dev(drv, GMAC_FD_FC_TYPE_REG);
 574         regs[2] = dsaf_read_dev(drv, GMAC_FC_TX_TIMER_REG);
 575         regs[3] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_LOW_REG);
 576         regs[4] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_HIGH_REG);
 577         regs[5] = dsaf_read_dev(drv, GMAC_IPG_TX_TIMER_REG);
 578         regs[6] = dsaf_read_dev(drv, GMAC_PAUSE_THR_REG);
 579         regs[7] = dsaf_read_dev(drv, GMAC_MAX_FRM_SIZE_REG);
 580         regs[8] = dsaf_read_dev(drv, GMAC_PORT_MODE_REG);
 581         regs[9] = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 582         regs[10] = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 583         regs[11] = dsaf_read_dev(drv, GMAC_SHORT_RUNTS_THR_REG);
 584         regs[12] = dsaf_read_dev(drv, GMAC_AN_NEG_STATE_REG);
 585         regs[13] = dsaf_read_dev(drv, GMAC_TX_LOCAL_PAGE_REG);
 586         regs[14] = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 587         regs[15] = dsaf_read_dev(drv, GMAC_REC_FILT_CONTROL_REG);
 588         regs[16] = dsaf_read_dev(drv, GMAC_PTP_CONFIG_REG);
 589
 590         /* rx static registers */
 591         regs[17] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 592         regs[18] = dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 593         regs[19] = dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 594         regs[20] = dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 595         regs[21] = dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 596         regs[22] = dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 597         regs[23] = dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 598         regs[24] = dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 599         regs[25] = dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 600         regs[26] = dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 601         regs[27] = dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 602         regs[28] = dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 603         regs[29] = dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 604         regs[30] = dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 605         regs[31] = dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 606         regs[32] = dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 607         regs[33] = dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 608         regs[34] = dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 609         regs[35] = dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 610         regs[36] = dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 611         regs[37] = dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 612         regs[38] = dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 613         regs[39] = dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 614         regs[40] = dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 615         regs[41] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 616
 617         /* tx static registers */
 618         regs[42] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 619         regs[43] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 620         regs[44] = dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 621         regs[45] = dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 622         regs[46] = dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 623         regs[47] = dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 624         regs[48] = dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 625         regs[49] = dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 626         regs[50] = dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 627         regs[51] = dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 628         regs[52] = dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 629         regs[53] = dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 630         regs[54] = dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 631         regs[55] = dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 632         regs[56] = dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 633         regs[57] = dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 634         regs[58] = dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 635
 636         regs[59] = dsaf_read_dev(drv, GAMC_RX_MAX_FRAME);
 637         regs[60] = dsaf_read_dev(drv, GMAC_LINE_LOOP_BACK_REG);
 638         regs[61] = dsaf_read_dev(drv, GMAC_CF_CRC_STRIP_REG);
 639         regs[62] = dsaf_read_dev(drv, GMAC_MODE_CHANGE_EN_REG);
 640         regs[63] = dsaf_read_dev(drv, GMAC_SIXTEEN_BIT_CNTR_REG);
 641         regs[64] = dsaf_read_dev(drv, GMAC_LD_LINK_COUNTER_REG);
 642         regs[65] = dsaf_read_dev(drv, GMAC_LOOP_REG);
 643         regs[66] = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 644         regs[67] = dsaf_read_dev(drv, GMAC_VLAN_CODE_REG);
 645         regs[68] = dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 646         regs[69] = dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 647         regs[70] = dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 648
 649         regs[71] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_0_REG);
 650         regs[72] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_0_REG);
 651         regs[73] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_1_REG);
 652         regs[74] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_1_REG);
 653         regs[75] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_2_REG);
 654         regs[76] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 655         regs[77] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_3_REG);
 656         regs[78] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_3_REG);
 657         regs[79] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_4_REG);
 658         regs[80] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_4_REG);
 659         regs[81] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_5_REG);
 660         regs[82] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_5_REG);
 661         regs[83] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_0_REG);
 662         regs[84] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_0_REG);
 663         regs[85] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_1_REG);
 664         regs[86] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_1_REG);
 665         regs[87] = dsaf_read_dev(drv, GMAC_MAC_SKIP_LEN_REG);
 666         regs[88] = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 667
 668         /* mark end of mac regs */
 669         for (i = 89; i < 96; i++)
 670                 regs[i] = 0xaaaaaaaa;
 671 }
 672
 673 static void hns_gmac_get_stats(void *mac_drv, u64 *data)
 674 {
 675         u32 i;
 676         u64 *buf = data;
 677         struct mac_driver *drv = (struct mac_driver *)mac_drv;
 678         struct mac_hw_stats *hw_stats = NULL;
 679
 680         hw_stats = &drv->mac_cb->hw_stats;
 681
 682         for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 683                 buf[i] = DSAF_STATS_READ(hw_stats,
 684                         g_gmac_stats_string[i].offset);
 685         }
 686 }
 687
 688 static void hns_gmac_get_strings(u32 stringset, u8 *data)
 689 {
 690         char *buff = (char *)data;
 691         u32 i;
 692
 693         if (stringset != ETH_SS_STATS)
 694                 return;
 695
 696         for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 697                 snprintf(buff, ETH_GSTRING_LEN, "%s",
 698                          g_gmac_stats_string[i].desc);
 699                 buff = buff + ETH_GSTRING_LEN;
 700         }
 701 }
 702
 703 static int hns_gmac_get_sset_count(int stringset)
 704 {
 705         if (stringset == ETH_SS_STATS)
 706                 return ARRAY_SIZE(g_gmac_stats_string);
 707
 708         return 0;
 709 }
 710
 711 static int hns_gmac_get_regs_count(void)
 712 {
 713         return ETH_GMAC_DUMP_NUM;
 714 }
 715
 716 void *hns_gmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
 717 {
 718         struct mac_driver *mac_drv;
 719
 720         mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
 721         if (!mac_drv)
 722                 return NULL;
 723
 724         mac_drv->mac_init = hns_gmac_init;
 725         mac_drv->mac_enable = hns_gmac_enable;
 726         mac_drv->mac_disable = hns_gmac_disable;
 727         mac_drv->mac_free = hns_gmac_free;
 728         mac_drv->adjust_link = hns_gmac_adjust_link;
 729         mac_drv->need_adjust_link = hns_gmac_need_adjust_link;
 730         mac_drv->set_tx_auto_pause_frames = hns_gmac_set_tx_auto_pause_frames;
 731         mac_drv->config_max_frame_length = hns_gmac_config_max_frame_length;
 732         mac_drv->mac_pausefrm_cfg = hns_gmac_pause_frm_cfg;
 733
 734         mac_drv->mac_id = mac_param->mac_id;
 735         mac_drv->mac_mode = mac_param->mac_mode;
 736         mac_drv->io_base = mac_param->vaddr;
 737         mac_drv->dev = mac_param->dev;
 738         mac_drv->mac_cb = mac_cb;
 739
 740         mac_drv->set_mac_addr = hns_gmac_set_mac_addr;
 741         mac_drv->set_an_mode = hns_gmac_config_an_mode;
 742         mac_drv->config_loopback = hns_gmac_config_loopback;
 743         mac_drv->config_pad_and_crc = hns_gmac_config_pad_and_crc;
 744         mac_drv->config_half_duplex = hns_gmac_set_duplex_type;
 745         mac_drv->set_rx_ignore_pause_frames = hns_gmac_set_rx_auto_pause_frames;
 746         mac_drv->get_info = hns_gmac_get_info;
 747         mac_drv->autoneg_stat = hns_gmac_autoneg_stat;
 748         mac_drv->get_pause_enable = hns_gmac_get_pausefrm_cfg;
 749         mac_drv->get_link_status = hns_gmac_get_link_status;
 750         mac_drv->get_regs = hns_gmac_get_regs;
 751         mac_drv->get_regs_count = hns_gmac_get_regs_count;
 752         mac_drv->get_ethtool_stats = hns_gmac_get_stats;
 753         mac_drv->get_sset_count = hns_gmac_get_sset_count;
 754         mac_drv->get_strings = hns_gmac_get_strings;
 755         mac_drv->update_stats = hns_gmac_update_stats;
 756         mac_drv->set_promiscuous = hns_gmac_set_promisc;
 757         mac_drv->wait_fifo_clean = hns_gmac_wait_fifo_clean;
 758
 759         return (void *)mac_drv;
 760 }