drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

   1 /* Broadcom NetXtreme-C/E network driver.
   2  *
   3  * Copyright (c) 2014-2016 Broadcom Corporation
   4  * Copyright (c) 2016-2017 Broadcom Limited
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation.
   9  */
  10
  11 #include <linux/ctype.h>
  12 #include <linux/stringify.h>
  13 #include <linux/ethtool.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/etherdevice.h>
  17 #include <linux/crc32.h>
  18 #include <linux/firmware.h>
  19 #include <linux/utsname.h>
  20 #include <linux/time.h>
  21 #include "bnxt_hsi.h"
  22 #include "bnxt.h"
  23 #include "bnxt_xdp.h"
  24 #include "bnxt_ethtool.h"
  25 #include "bnxt_nvm_defs.h"      /* NVRAM content constant and structure defs */
  26 #include "bnxt_fw_hdr.h"        /* Firmware hdr constant and structure defs */
  27 #include "bnxt_coredump.h"
  28 #define FLASH_NVRAM_TIMEOUT     ((HWRM_CMD_TIMEOUT) * 100)
  29 #define FLASH_PACKAGE_TIMEOUT   ((HWRM_CMD_TIMEOUT) * 200)
  30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  31
  32 static u32 bnxt_get_msglevel(struct net_device *dev)
  33 {
  34         struct bnxt *bp = netdev_priv(dev);
  35
  36         return bp->msg_enable;
  37 }
  38
  39 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  40 {
  41         struct bnxt *bp = netdev_priv(dev);
  42
  43         bp->msg_enable = value;
  44 }
  45
  46 static int bnxt_get_coalesce(struct net_device *dev,
  47                              struct ethtool_coalesce *coal)
  48 {
  49         struct bnxt *bp = netdev_priv(dev);
  50         struct bnxt_coal *hw_coal;
  51         u16 mult;
  52
  53         memset(coal, 0, sizeof(*coal));
  54
  55         coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM;
  56
  57         hw_coal = &bp->rx_coal;
  58         mult = hw_coal->bufs_per_record;
  59         coal->rx_coalesce_usecs = hw_coal->coal_ticks;
  60         coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  61         coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  62         coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  63
  64         hw_coal = &bp->tx_coal;
  65         mult = hw_coal->bufs_per_record;
  66         coal->tx_coalesce_usecs = hw_coal->coal_ticks;
  67         coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
  68         coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
  69         coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
  70
  71         coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  72
  73         return 0;
  74 }
  75
  76 static int bnxt_set_coalesce(struct net_device *dev,
  77                              struct ethtool_coalesce *coal)
  78 {
  79         struct bnxt *bp = netdev_priv(dev);
  80         bool update_stats = false;
  81         struct bnxt_coal *hw_coal;
  82         int rc = 0;
  83         u16 mult;
  84
  85         if (coal->use_adaptive_rx_coalesce) {
  86                 bp->flags |= BNXT_FLAG_DIM;
  87         } else {
  88                 if (bp->flags & BNXT_FLAG_DIM) {
  89                         bp->flags &= ~(BNXT_FLAG_DIM);
  90                         goto reset_coalesce;
  91                 }
  92         }
  93
  94         hw_coal = &bp->rx_coal;
  95         mult = hw_coal->bufs_per_record;
  96         hw_coal->coal_ticks = coal->rx_coalesce_usecs;
  97         hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
  98         hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  99         hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
 100
 101         hw_coal = &bp->tx_coal;
 102         mult = hw_coal->bufs_per_record;
 103         hw_coal->coal_ticks = coal->tx_coalesce_usecs;
 104         hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
 105         hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
 106         hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
 107
 108         if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
 109                 u32 stats_ticks = coal->stats_block_coalesce_usecs;
 110
 111                 /* Allow 0, which means disable. */
 112                 if (stats_ticks)
 113                         stats_ticks = clamp_t(u32, stats_ticks,
 114                                               BNXT_MIN_STATS_COAL_TICKS,
 115                                               BNXT_MAX_STATS_COAL_TICKS);
 116                 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
 117                 bp->stats_coal_ticks = stats_ticks;
 118                 if (bp->stats_coal_ticks)
 119                         bp->current_interval =
 120                                 bp->stats_coal_ticks * HZ / 1000000;
 121                 else
 122                         bp->current_interval = BNXT_TIMER_INTERVAL;
 123                 update_stats = true;
 124         }
 125
 126 reset_coalesce:
 127         if (netif_running(dev)) {
 128                 if (update_stats) {
 129                         rc = bnxt_close_nic(bp, true, false);
 130                         if (!rc)
 131                                 rc = bnxt_open_nic(bp, true, false);
 132                 } else {
 133                         rc = bnxt_hwrm_set_coal(bp);
 134                 }
 135         }
 136
 137         return rc;
 138 }
 139
 140 #define BNXT_NUM_STATS  22
 141
 142 #define BNXT_RX_STATS_ENTRY(counter)    \
 143         { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
 144
 145 #define BNXT_TX_STATS_ENTRY(counter)    \
 146         { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
 147
 148 #define BNXT_RX_STATS_EXT_ENTRY(counter)        \
 149         { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 150
 151 #define BNXT_TX_STATS_EXT_ENTRY(counter)        \
 152         { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
 153
 154 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n)                          \
 155         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us),   \
 156         BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
 157
 158 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n)                          \
 159         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us),   \
 160         BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
 161
 162 #define BNXT_RX_STATS_EXT_PFC_ENTRIES                           \
 163         BNXT_RX_STATS_EXT_PFC_ENTRY(0),                         \
 164         BNXT_RX_STATS_EXT_PFC_ENTRY(1),                         \
 165         BNXT_RX_STATS_EXT_PFC_ENTRY(2),                         \
 166         BNXT_RX_STATS_EXT_PFC_ENTRY(3),                         \
 167         BNXT_RX_STATS_EXT_PFC_ENTRY(4),                         \
 168         BNXT_RX_STATS_EXT_PFC_ENTRY(5),                         \
 169         BNXT_RX_STATS_EXT_PFC_ENTRY(6),                         \
 170         BNXT_RX_STATS_EXT_PFC_ENTRY(7)
 171
 172 #define BNXT_TX_STATS_EXT_PFC_ENTRIES                           \
 173         BNXT_TX_STATS_EXT_PFC_ENTRY(0),                         \
 174         BNXT_TX_STATS_EXT_PFC_ENTRY(1),                         \
 175         BNXT_TX_STATS_EXT_PFC_ENTRY(2),                         \
 176         BNXT_TX_STATS_EXT_PFC_ENTRY(3),                         \
 177         BNXT_TX_STATS_EXT_PFC_ENTRY(4),                         \
 178         BNXT_TX_STATS_EXT_PFC_ENTRY(5),                         \
 179         BNXT_TX_STATS_EXT_PFC_ENTRY(6),                         \
 180         BNXT_TX_STATS_EXT_PFC_ENTRY(7)
 181
 182 #define BNXT_RX_STATS_EXT_COS_ENTRY(n)                          \
 183         BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n),               \
 184         BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
 185
 186 #define BNXT_TX_STATS_EXT_COS_ENTRY(n)                          \
 187         BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n),               \
 188         BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
 189
 190 #define BNXT_RX_STATS_EXT_COS_ENTRIES                           \
 191         BNXT_RX_STATS_EXT_COS_ENTRY(0),                         \
 192         BNXT_RX_STATS_EXT_COS_ENTRY(1),                         \
 193         BNXT_RX_STATS_EXT_COS_ENTRY(2),                         \
 194         BNXT_RX_STATS_EXT_COS_ENTRY(3),                         \
 195         BNXT_RX_STATS_EXT_COS_ENTRY(4),                         \
 196         BNXT_RX_STATS_EXT_COS_ENTRY(5),                         \
 197         BNXT_RX_STATS_EXT_COS_ENTRY(6),                         \
 198         BNXT_RX_STATS_EXT_COS_ENTRY(7)                          \
 199
 200 #define BNXT_TX_STATS_EXT_COS_ENTRIES                           \
 201         BNXT_TX_STATS_EXT_COS_ENTRY(0),                         \
 202         BNXT_TX_STATS_EXT_COS_ENTRY(1),                         \
 203         BNXT_TX_STATS_EXT_COS_ENTRY(2),                         \
 204         BNXT_TX_STATS_EXT_COS_ENTRY(3),                         \
 205         BNXT_TX_STATS_EXT_COS_ENTRY(4),                         \
 206         BNXT_TX_STATS_EXT_COS_ENTRY(5),                         \
 207         BNXT_TX_STATS_EXT_COS_ENTRY(6),                         \
 208         BNXT_TX_STATS_EXT_COS_ENTRY(7)                          \
 209
 210 #define BNXT_RX_STATS_PRI_ENTRY(counter, n)             \
 211         { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0),     \
 212           __stringify(counter##_pri##n) }
 213
 214 #define BNXT_TX_STATS_PRI_ENTRY(counter, n)             \
 215         { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0),     \
 216           __stringify(counter##_pri##n) }
 217
 218 #define BNXT_RX_STATS_PRI_ENTRIES(counter)              \
 219         BNXT_RX_STATS_PRI_ENTRY(counter, 0),            \
 220         BNXT_RX_STATS_PRI_ENTRY(counter, 1),            \
 221         BNXT_RX_STATS_PRI_ENTRY(counter, 2),            \
 222         BNXT_RX_STATS_PRI_ENTRY(counter, 3),            \
 223         BNXT_RX_STATS_PRI_ENTRY(counter, 4),            \
 224         BNXT_RX_STATS_PRI_ENTRY(counter, 5),            \
 225         BNXT_RX_STATS_PRI_ENTRY(counter, 6),            \
 226         BNXT_RX_STATS_PRI_ENTRY(counter, 7)
 227
 228 #define BNXT_TX_STATS_PRI_ENTRIES(counter)              \
 229         BNXT_TX_STATS_PRI_ENTRY(counter, 0),            \
 230         BNXT_TX_STATS_PRI_ENTRY(counter, 1),            \
 231         BNXT_TX_STATS_PRI_ENTRY(counter, 2),            \
 232         BNXT_TX_STATS_PRI_ENTRY(counter, 3),            \
 233         BNXT_TX_STATS_PRI_ENTRY(counter, 4),            \
 234         BNXT_TX_STATS_PRI_ENTRY(counter, 5),            \
 235         BNXT_TX_STATS_PRI_ENTRY(counter, 6),            \
 236         BNXT_TX_STATS_PRI_ENTRY(counter, 7)
 237
 238 #define BNXT_PCIE_STATS_ENTRY(counter)  \
 239         { BNXT_PCIE_STATS_OFFSET(counter), __stringify(counter) }
 240
 241 enum {
 242         RX_TOTAL_DISCARDS,
 243         TX_TOTAL_DISCARDS,
 244 };
 245
 246 static struct {
 247         u64                     counter;
 248         char                    string[ETH_GSTRING_LEN];
 249 } bnxt_sw_func_stats[] = {
 250         {0, "rx_total_discard_pkts"},
 251         {0, "tx_total_discard_pkts"},
 252 };
 253
 254 static const struct {
 255         long offset;
 256         char string[ETH_GSTRING_LEN];
 257 } bnxt_port_stats_arr[] = {
 258         BNXT_RX_STATS_ENTRY(rx_64b_frames),
 259         BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
 260         BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
 261         BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
 262         BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
 263         BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames),
 264         BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
 265         BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
 266         BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
 267         BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
 268         BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
 269         BNXT_RX_STATS_ENTRY(rx_total_frames),
 270         BNXT_RX_STATS_ENTRY(rx_ucast_frames),
 271         BNXT_RX_STATS_ENTRY(rx_mcast_frames),
 272         BNXT_RX_STATS_ENTRY(rx_bcast_frames),
 273         BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
 274         BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
 275         BNXT_RX_STATS_ENTRY(rx_pause_frames),
 276         BNXT_RX_STATS_ENTRY(rx_pfc_frames),
 277         BNXT_RX_STATS_ENTRY(rx_align_err_frames),
 278         BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
 279         BNXT_RX_STATS_ENTRY(rx_jbr_frames),
 280         BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
 281         BNXT_RX_STATS_ENTRY(rx_tagged_frames),
 282         BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
 283         BNXT_RX_STATS_ENTRY(rx_good_frames),
 284         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
 285         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
 286         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
 287         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
 288         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
 289         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
 290         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
 291         BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
 292         BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
 293         BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
 294         BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
 295         BNXT_RX_STATS_ENTRY(rx_bytes),
 296         BNXT_RX_STATS_ENTRY(rx_runt_bytes),
 297         BNXT_RX_STATS_ENTRY(rx_runt_frames),
 298         BNXT_RX_STATS_ENTRY(rx_stat_discard),
 299         BNXT_RX_STATS_ENTRY(rx_stat_err),
 300
 301         BNXT_TX_STATS_ENTRY(tx_64b_frames),
 302         BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
 303         BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
 304         BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
 305         BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
 306         BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames),
 307         BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
 308         BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames),
 309         BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
 310         BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
 311         BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
 312         BNXT_TX_STATS_ENTRY(tx_good_frames),
 313         BNXT_TX_STATS_ENTRY(tx_total_frames),
 314         BNXT_TX_STATS_ENTRY(tx_ucast_frames),
 315         BNXT_TX_STATS_ENTRY(tx_mcast_frames),
 316         BNXT_TX_STATS_ENTRY(tx_bcast_frames),
 317         BNXT_TX_STATS_ENTRY(tx_pause_frames),
 318         BNXT_TX_STATS_ENTRY(tx_pfc_frames),
 319         BNXT_TX_STATS_ENTRY(tx_jabber_frames),
 320         BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
 321         BNXT_TX_STATS_ENTRY(tx_err),
 322         BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
 323         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
 324         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
 325         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
 326         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
 327         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
 328         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
 329         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
 330         BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
 331         BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
 332         BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
 333         BNXT_TX_STATS_ENTRY(tx_total_collisions),
 334         BNXT_TX_STATS_ENTRY(tx_bytes),
 335         BNXT_TX_STATS_ENTRY(tx_xthol_frames),
 336         BNXT_TX_STATS_ENTRY(tx_stat_discard),
 337         BNXT_TX_STATS_ENTRY(tx_stat_error),
 338 };
 339
 340 static const struct {
 341         long offset;
 342         char string[ETH_GSTRING_LEN];
 343 } bnxt_port_stats_ext_arr[] = {
 344         BNXT_RX_STATS_EXT_ENTRY(link_down_events),
 345         BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events),
 346         BNXT_RX_STATS_EXT_ENTRY(resume_pause_events),
 347         BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events),
 348         BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events),
 349         BNXT_RX_STATS_EXT_COS_ENTRIES,
 350         BNXT_RX_STATS_EXT_PFC_ENTRIES,
 351         BNXT_RX_STATS_EXT_ENTRY(rx_bits),
 352         BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold),
 353         BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
 354         BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
 355 };
 356
 357 static const struct {
 358         long offset;
 359         char string[ETH_GSTRING_LEN];
 360 } bnxt_tx_port_stats_ext_arr[] = {
 361         BNXT_TX_STATS_EXT_COS_ENTRIES,
 362         BNXT_TX_STATS_EXT_PFC_ENTRIES,
 363 };
 364
 365 static const struct {
 366         long base_off;
 367         char string[ETH_GSTRING_LEN];
 368 } bnxt_rx_bytes_pri_arr[] = {
 369         BNXT_RX_STATS_PRI_ENTRIES(rx_bytes),
 370 };
 371
 372 static const struct {
 373         long base_off;
 374         char string[ETH_GSTRING_LEN];
 375 } bnxt_rx_pkts_pri_arr[] = {
 376         BNXT_RX_STATS_PRI_ENTRIES(rx_packets),
 377 };
 378
 379 static const struct {
 380         long base_off;
 381         char string[ETH_GSTRING_LEN];
 382 } bnxt_tx_bytes_pri_arr[] = {
 383         BNXT_TX_STATS_PRI_ENTRIES(tx_bytes),
 384 };
 385
 386 static const struct {
 387         long base_off;
 388         char string[ETH_GSTRING_LEN];
 389 } bnxt_tx_pkts_pri_arr[] = {
 390         BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
 391 };
 392
 393 static const struct {
 394         long offset;
 395         char string[ETH_GSTRING_LEN];
 396 } bnxt_pcie_stats_arr[] = {
 397         BNXT_PCIE_STATS_ENTRY(pcie_pl_signal_integrity),
 398         BNXT_PCIE_STATS_ENTRY(pcie_dl_signal_integrity),
 399         BNXT_PCIE_STATS_ENTRY(pcie_tl_signal_integrity),
 400         BNXT_PCIE_STATS_ENTRY(pcie_link_integrity),
 401         BNXT_PCIE_STATS_ENTRY(pcie_tx_traffic_rate),
 402         BNXT_PCIE_STATS_ENTRY(pcie_rx_traffic_rate),
 403         BNXT_PCIE_STATS_ENTRY(pcie_tx_dllp_statistics),
 404         BNXT_PCIE_STATS_ENTRY(pcie_rx_dllp_statistics),
 405         BNXT_PCIE_STATS_ENTRY(pcie_equalization_time),
 406         BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[0]),
 407         BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[2]),
 408         BNXT_PCIE_STATS_ENTRY(pcie_recovery_histogram),
 409 };
 410
 411 #define BNXT_NUM_SW_FUNC_STATS  ARRAY_SIZE(bnxt_sw_func_stats)
 412 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
 413 #define BNXT_NUM_STATS_PRI                      \
 414         (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) +    \
 415          ARRAY_SIZE(bnxt_rx_pkts_pri_arr) +     \
 416          ARRAY_SIZE(bnxt_tx_bytes_pri_arr) +    \
 417          ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
 418 #define BNXT_NUM_PCIE_STATS ARRAY_SIZE(bnxt_pcie_stats_arr)
 419
 420 static int bnxt_get_num_stats(struct bnxt *bp)
 421 {
 422         int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
 423
 424         num_stats += BNXT_NUM_SW_FUNC_STATS;
 425
 426         if (bp->flags & BNXT_FLAG_PORT_STATS)
 427                 num_stats += BNXT_NUM_PORT_STATS;
 428
 429         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 430                 num_stats += bp->fw_rx_stats_ext_size +
 431                              bp->fw_tx_stats_ext_size;
 432                 if (bp->pri2cos_valid)
 433                         num_stats += BNXT_NUM_STATS_PRI;
 434         }
 435
 436         if (bp->flags & BNXT_FLAG_PCIE_STATS)
 437                 num_stats += BNXT_NUM_PCIE_STATS;
 438
 439         return num_stats;
 440 }
 441
 442 static int bnxt_get_sset_count(struct net_device *dev, int sset)
 443 {
 444         struct bnxt *bp = netdev_priv(dev);
 445
 446         switch (sset) {
 447         case ETH_SS_STATS:
 448                 return bnxt_get_num_stats(bp);
 449         case ETH_SS_TEST:
 450                 if (!bp->num_tests)
 451                         return -EOPNOTSUPP;
 452                 return bp->num_tests;
 453         default:
 454                 return -EOPNOTSUPP;
 455         }
 456 }
 457
 458 static void bnxt_get_ethtool_stats(struct net_device *dev,
 459                                    struct ethtool_stats *stats, u64 *buf)
 460 {
 461         u32 i, j = 0;
 462         struct bnxt *bp = netdev_priv(dev);
 463         u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
 464
 465         if (!bp->bnapi) {
 466                 j += BNXT_NUM_STATS * bp->cp_nr_rings + BNXT_NUM_SW_FUNC_STATS;
 467                 goto skip_ring_stats;
 468         }
 469
 470         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++)
 471                 bnxt_sw_func_stats[i].counter = 0;
 472
 473         for (i = 0; i < bp->cp_nr_rings; i++) {
 474                 struct bnxt_napi *bnapi = bp->bnapi[i];
 475                 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
 476                 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
 477                 int k;
 478
 479                 for (k = 0; k < stat_fields; j++, k++)
 480                         buf[j] = le64_to_cpu(hw_stats[k]);
 481                 buf[j++] = cpr->rx_l4_csum_errors;
 482                 buf[j++] = cpr->missed_irqs;
 483
 484                 bnxt_sw_func_stats[RX_TOTAL_DISCARDS].counter +=
 485                         le64_to_cpu(cpr->hw_stats->rx_discard_pkts);
 486                 bnxt_sw_func_stats[TX_TOTAL_DISCARDS].counter +=
 487                         le64_to_cpu(cpr->hw_stats->tx_discard_pkts);
 488         }
 489
 490         for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++, j++)
 491                 buf[j] = bnxt_sw_func_stats[i].counter;
 492
 493 skip_ring_stats:
 494         if (bp->flags & BNXT_FLAG_PORT_STATS) {
 495                 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
 496
 497                 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
 498                         buf[j] = le64_to_cpu(*(port_stats +
 499                                                bnxt_port_stats_arr[i].offset));
 500                 }
 501         }
 502         if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 503                 __le64 *rx_port_stats_ext = (__le64 *)bp->hw_rx_port_stats_ext;
 504                 __le64 *tx_port_stats_ext = (__le64 *)bp->hw_tx_port_stats_ext;
 505
 506                 for (i = 0; i < bp->fw_rx_stats_ext_size; i++, j++) {
 507                         buf[j] = le64_to_cpu(*(rx_port_stats_ext +
 508                                             bnxt_port_stats_ext_arr[i].offset));
 509                 }
 510                 for (i = 0; i < bp->fw_tx_stats_ext_size; i++, j++) {
 511                         buf[j] = le64_to_cpu(*(tx_port_stats_ext +
 512                                         bnxt_tx_port_stats_ext_arr[i].offset));
 513                 }
 514                 if (bp->pri2cos_valid) {
 515                         for (i = 0; i < 8; i++, j++) {
 516                                 long n = bnxt_rx_bytes_pri_arr[i].base_off +
 517                                          bp->pri2cos[i];
 518
 519                                 buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
 520                         }
 521                         for (i = 0; i < 8; i++, j++) {
 522                                 long n = bnxt_rx_pkts_pri_arr[i].base_off +
 523                                          bp->pri2cos[i];
 524
 525                                 buf[j] = le64_to_cpu(*(rx_port_stats_ext + n));
 526                         }
 527                         for (i = 0; i < 8; i++, j++) {
 528                                 long n = bnxt_tx_bytes_pri_arr[i].base_off +
 529                                          bp->pri2cos[i];
 530
 531                                 buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
 532                         }
 533                         for (i = 0; i < 8; i++, j++) {
 534                                 long n = bnxt_tx_pkts_pri_arr[i].base_off +
 535                                          bp->pri2cos[i];
 536
 537                                 buf[j] = le64_to_cpu(*(tx_port_stats_ext + n));
 538                         }
 539                 }
 540         }
 541         if (bp->flags & BNXT_FLAG_PCIE_STATS) {
 542                 __le64 *pcie_stats = (__le64 *)bp->hw_pcie_stats;
 543
 544                 for (i = 0; i < BNXT_NUM_PCIE_STATS; i++, j++) {
 545                         buf[j] = le64_to_cpu(*(pcie_stats +
 546                                                bnxt_pcie_stats_arr[i].offset));
 547                 }
 548         }
 549 }
 550
 551 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
 552 {
 553         struct bnxt *bp = netdev_priv(dev);
 554         u32 i;
 555
 556         switch (stringset) {
 557         /* The number of strings must match BNXT_NUM_STATS defined above. */
 558         case ETH_SS_STATS:
 559                 for (i = 0; i < bp->cp_nr_rings; i++) {
 560                         sprintf(buf, "[%d]: rx_ucast_packets", i);
 561                         buf += ETH_GSTRING_LEN;
 562                         sprintf(buf, "[%d]: rx_mcast_packets", i);
 563                         buf += ETH_GSTRING_LEN;
 564                         sprintf(buf, "[%d]: rx_bcast_packets", i);
 565                         buf += ETH_GSTRING_LEN;
 566                         sprintf(buf, "[%d]: rx_discards", i);
 567                         buf += ETH_GSTRING_LEN;
 568                         sprintf(buf, "[%d]: rx_drops", i);
 569                         buf += ETH_GSTRING_LEN;
 570                         sprintf(buf, "[%d]: rx_ucast_bytes", i);
 571                         buf += ETH_GSTRING_LEN;
 572                         sprintf(buf, "[%d]: rx_mcast_bytes", i);
 573                         buf += ETH_GSTRING_LEN;
 574                         sprintf(buf, "[%d]: rx_bcast_bytes", i);
 575                         buf += ETH_GSTRING_LEN;
 576                         sprintf(buf, "[%d]: tx_ucast_packets", i);
 577                         buf += ETH_GSTRING_LEN;
 578                         sprintf(buf, "[%d]: tx_mcast_packets", i);
 579                         buf += ETH_GSTRING_LEN;
 580                         sprintf(buf, "[%d]: tx_bcast_packets", i);
 581                         buf += ETH_GSTRING_LEN;
 582                         sprintf(buf, "[%d]: tx_discards", i);
 583                         buf += ETH_GSTRING_LEN;
 584                         sprintf(buf, "[%d]: tx_drops", i);
 585                         buf += ETH_GSTRING_LEN;
 586                         sprintf(buf, "[%d]: tx_ucast_bytes", i);
 587                         buf += ETH_GSTRING_LEN;
 588                         sprintf(buf, "[%d]: tx_mcast_bytes", i);
 589                         buf += ETH_GSTRING_LEN;
 590                         sprintf(buf, "[%d]: tx_bcast_bytes", i);
 591                         buf += ETH_GSTRING_LEN;
 592                         sprintf(buf, "[%d]: tpa_packets", i);
 593                         buf += ETH_GSTRING_LEN;
 594                         sprintf(buf, "[%d]: tpa_bytes", i);
 595                         buf += ETH_GSTRING_LEN;
 596                         sprintf(buf, "[%d]: tpa_events", i);
 597                         buf += ETH_GSTRING_LEN;
 598                         sprintf(buf, "[%d]: tpa_aborts", i);
 599                         buf += ETH_GSTRING_LEN;
 600                         sprintf(buf, "[%d]: rx_l4_csum_errors", i);
 601                         buf += ETH_GSTRING_LEN;
 602                         sprintf(buf, "[%d]: missed_irqs", i);
 603                         buf += ETH_GSTRING_LEN;
 604                 }
 605                 for (i = 0; i < BNXT_NUM_SW_FUNC_STATS; i++) {
 606                         strcpy(buf, bnxt_sw_func_stats[i].string);
 607                         buf += ETH_GSTRING_LEN;
 608                 }
 609
 610                 if (bp->flags & BNXT_FLAG_PORT_STATS) {
 611                         for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
 612                                 strcpy(buf, bnxt_port_stats_arr[i].string);
 613                                 buf += ETH_GSTRING_LEN;
 614                         }
 615                 }
 616                 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) {
 617                         for (i = 0; i < bp->fw_rx_stats_ext_size; i++) {
 618                                 strcpy(buf, bnxt_port_stats_ext_arr[i].string);
 619                                 buf += ETH_GSTRING_LEN;
 620                         }
 621                         for (i = 0; i < bp->fw_tx_stats_ext_size; i++) {
 622                                 strcpy(buf,
 623                                        bnxt_tx_port_stats_ext_arr[i].string);
 624                                 buf += ETH_GSTRING_LEN;
 625                         }
 626                         if (bp->pri2cos_valid) {
 627                                 for (i = 0; i < 8; i++) {
 628                                         strcpy(buf,
 629                                                bnxt_rx_bytes_pri_arr[i].string);
 630                                         buf += ETH_GSTRING_LEN;
 631                                 }
 632                                 for (i = 0; i < 8; i++) {
 633                                         strcpy(buf,
 634                                                bnxt_rx_pkts_pri_arr[i].string);
 635                                         buf += ETH_GSTRING_LEN;
 636                                 }
 637                                 for (i = 0; i < 8; i++) {
 638                                         strcpy(buf,
 639                                                bnxt_tx_bytes_pri_arr[i].string);
 640                                         buf += ETH_GSTRING_LEN;
 641                                 }
 642                                 for (i = 0; i < 8; i++) {
 643                                         strcpy(buf,
 644                                                bnxt_tx_pkts_pri_arr[i].string);
 645                                         buf += ETH_GSTRING_LEN;
 646                                 }
 647                         }
 648                 }
 649                 if (bp->flags & BNXT_FLAG_PCIE_STATS) {
 650                         for (i = 0; i < BNXT_NUM_PCIE_STATS; i++) {
 651                                 strcpy(buf, bnxt_pcie_stats_arr[i].string);
 652                                 buf += ETH_GSTRING_LEN;
 653                         }
 654                 }
 655                 break;
 656         case ETH_SS_TEST:
 657                 if (bp->num_tests)
 658                         memcpy(buf, bp->test_info->string,
 659                                bp->num_tests * ETH_GSTRING_LEN);
 660                 break;
 661         default:
 662                 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
 663                            stringset);
 664                 break;
 665         }
 666 }
 667
 668 static void bnxt_get_ringparam(struct net_device *dev,
 669                                struct ethtool_ringparam *ering)
 670 {
 671         struct bnxt *bp = netdev_priv(dev);
 672
 673         ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
 674         ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
 675         ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
 676
 677         ering->rx_pending = bp->rx_ring_size;
 678         ering->rx_jumbo_pending = bp->rx_agg_ring_size;
 679         ering->tx_pending = bp->tx_ring_size;
 680 }
 681
 682 static int bnxt_set_ringparam(struct net_device *dev,
 683                               struct ethtool_ringparam *ering)
 684 {
 685         struct bnxt *bp = netdev_priv(dev);
 686
 687         if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
 688             (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
 689             (ering->tx_pending <= MAX_SKB_FRAGS))
 690                 return -EINVAL;
 691
 692         if (netif_running(dev))
 693                 bnxt_close_nic(bp, false, false);
 694
 695         bp->rx_ring_size = ering->rx_pending;
 696         bp->tx_ring_size = ering->tx_pending;
 697         bnxt_set_ring_params(bp);
 698
 699         if (netif_running(dev))
 700                 return bnxt_open_nic(bp, false, false);
 701
 702         return 0;
 703 }
 704
 705 static void bnxt_get_channels(struct net_device *dev,
 706                               struct ethtool_channels *channel)
 707 {
 708         struct bnxt *bp = netdev_priv(dev);
 709         struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 710         int max_rx_rings, max_tx_rings, tcs;
 711         int max_tx_sch_inputs;
 712
 713         /* Get the most up-to-date max_tx_sch_inputs. */
 714         if (BNXT_NEW_RM(bp))
 715                 bnxt_hwrm_func_resc_qcaps(bp, false);
 716         max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
 717
 718         bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
 719         if (max_tx_sch_inputs)
 720                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 721         channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
 722
 723         if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
 724                 max_rx_rings = 0;
 725                 max_tx_rings = 0;
 726         }
 727         if (max_tx_sch_inputs)
 728                 max_tx_rings = min_t(int, max_tx_rings, max_tx_sch_inputs);
 729
 730         tcs = netdev_get_num_tc(dev);
 731         if (tcs > 1)
 732                 max_tx_rings /= tcs;
 733
 734         channel->max_rx = max_rx_rings;
 735         channel->max_tx = max_tx_rings;
 736         channel->max_other = 0;
 737         if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
 738                 channel->combined_count = bp->rx_nr_rings;
 739                 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
 740                         channel->combined_count--;
 741         } else {
 742                 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
 743                         channel->rx_count = bp->rx_nr_rings;
 744                         channel->tx_count = bp->tx_nr_rings_per_tc;
 745                 }
 746         }
 747 }
 748
 749 static int bnxt_set_channels(struct net_device *dev,
 750                              struct ethtool_channels *channel)
 751 {
 752         struct bnxt *bp = netdev_priv(dev);
 753         int req_tx_rings, req_rx_rings, tcs;
 754         bool sh = false;
 755         int tx_xdp = 0;
 756         int rc = 0;
 757
 758         if (channel->other_count)
 759                 return -EINVAL;
 760
 761         if (!channel->combined_count &&
 762             (!channel->rx_count || !channel->tx_count))
 763                 return -EINVAL;
 764
 765         if (channel->combined_count &&
 766             (channel->rx_count || channel->tx_count))
 767                 return -EINVAL;
 768
 769         if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
 770                                             channel->tx_count))
 771                 return -EINVAL;
 772
 773         if (channel->combined_count)
 774                 sh = true;
 775
 776         tcs = netdev_get_num_tc(dev);
 777
 778         req_tx_rings = sh ? channel->combined_count : channel->tx_count;
 779         req_rx_rings = sh ? channel->combined_count : channel->rx_count;
 780         if (bp->tx_nr_rings_xdp) {
 781                 if (!sh) {
 782                         netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
 783                         return -EINVAL;
 784                 }
 785                 tx_xdp = req_rx_rings;
 786         }
 787         rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
 788         if (rc) {
 789                 netdev_warn(dev, "Unable to allocate the requested rings\n");
 790                 return rc;
 791         }
 792
 793         if (netif_running(dev)) {
 794                 if (BNXT_PF(bp)) {
 795                         /* TODO CHIMP_FW: Send message to all VF's
 796                          * before PF unload
 797                          */
 798                 }
 799                 rc = bnxt_close_nic(bp, true, false);
 800                 if (rc) {
 801                         netdev_err(bp->dev, "Set channel failure rc :%x\n",
 802                                    rc);
 803                         return rc;
 804                 }
 805         }
 806
 807         if (sh) {
 808                 bp->flags |= BNXT_FLAG_SHARED_RINGS;
 809                 bp->rx_nr_rings = channel->combined_count;
 810                 bp->tx_nr_rings_per_tc = channel->combined_count;
 811         } else {
 812                 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
 813                 bp->rx_nr_rings = channel->rx_count;
 814                 bp->tx_nr_rings_per_tc = channel->tx_count;
 815         }
 816         bp->tx_nr_rings_xdp = tx_xdp;
 817         bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
 818         if (tcs > 1)
 819                 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
 820
 821         bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
 822                                bp->tx_nr_rings + bp->rx_nr_rings;
 823
 824         /* After changing number of rx channels, update NTUPLE feature. */
 825         netdev_update_features(dev);
 826         if (netif_running(dev)) {
 827                 rc = bnxt_open_nic(bp, true, false);
 828                 if ((!rc) && BNXT_PF(bp)) {
 829                         /* TODO CHIMP_FW: Send message to all VF's
 830                          * to renable
 831                          */
 832                 }
 833         } else {
 834                 rc = bnxt_reserve_rings(bp, true);
 835         }
 836
 837         return rc;
 838 }
 839
 840 #ifdef CONFIG_RFS_ACCEL
 841 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
 842                             u32 *rule_locs)
 843 {
 844         int i, j = 0;
 845
 846         cmd->data = bp->ntp_fltr_count;
 847         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 848                 struct hlist_head *head;
 849                 struct bnxt_ntuple_filter *fltr;
 850
 851                 head = &bp->ntp_fltr_hash_tbl[i];
 852                 rcu_read_lock();
 853                 hlist_for_each_entry_rcu(fltr, head, hash) {
 854                         if (j == cmd->rule_cnt)
 855                                 break;
 856                         rule_locs[j++] = fltr->sw_id;
 857                 }
 858                 rcu_read_unlock();
 859                 if (j == cmd->rule_cnt)
 860                         break;
 861         }
 862         cmd->rule_cnt = j;
 863         return 0;
 864 }
 865
 866 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
 867 {
 868         struct ethtool_rx_flow_spec *fs =
 869                 (struct ethtool_rx_flow_spec *)&cmd->fs;
 870         struct bnxt_ntuple_filter *fltr;
 871         struct flow_keys *fkeys;
 872         int i, rc = -EINVAL;
 873
 874         if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
 875                 return rc;
 876
 877         for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
 878                 struct hlist_head *head;
 879
 880                 head = &bp->ntp_fltr_hash_tbl[i];
 881                 rcu_read_lock();
 882                 hlist_for_each_entry_rcu(fltr, head, hash) {
 883                         if (fltr->sw_id == fs->location)
 884                                 goto fltr_found;
 885                 }
 886                 rcu_read_unlock();
 887         }
 888         return rc;
 889
 890 fltr_found:
 891         fkeys = &fltr->fkeys;
 892         if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
 893                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
 894                         fs->flow_type = TCP_V4_FLOW;
 895                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
 896                         fs->flow_type = UDP_V4_FLOW;
 897                 else
 898                         goto fltr_err;
 899
 900                 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
 901                 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
 902
 903                 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
 904                 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
 905
 906                 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
 907                 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
 908
 909                 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
 910                 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
 911         } else {
 912                 int i;
 913
 914                 if (fkeys->basic.ip_proto == IPPROTO_TCP)
 915                         fs->flow_type = TCP_V6_FLOW;
 916                 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
 917                         fs->flow_type = UDP_V6_FLOW;
 918                 else
 919                         goto fltr_err;
 920
 921                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
 922                         fkeys->addrs.v6addrs.src;
 923                 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
 924                         fkeys->addrs.v6addrs.dst;
 925                 for (i = 0; i < 4; i++) {
 926                         fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
 927                         fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
 928                 }
 929                 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
 930                 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
 931
 932                 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
 933                 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
 934         }
 935
 936         fs->ring_cookie = fltr->rxq;
 937         rc = 0;
 938
 939 fltr_err:
 940         rcu_read_unlock();
 941
 942         return rc;
 943 }
 944 #endif
 945
 946 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
 947 {
 948         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
 949                 return RXH_IP_SRC | RXH_IP_DST;
 950         return 0;
 951 }
 952
 953 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
 954 {
 955         if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
 956                 return RXH_IP_SRC | RXH_IP_DST;
 957         return 0;
 958 }
 959
 960 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
 961 {
 962         cmd->data = 0;
 963         switch (cmd->flow_type) {
 964         case TCP_V4_FLOW:
 965                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
 966                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 967                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
 968                 cmd->data |= get_ethtool_ipv4_rss(bp);
 969                 break;
 970         case UDP_V4_FLOW:
 971                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
 972                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 973                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
 974                 /* fall through */
 975         case SCTP_V4_FLOW:
 976         case AH_ESP_V4_FLOW:
 977         case AH_V4_FLOW:
 978         case ESP_V4_FLOW:
 979         case IPV4_FLOW:
 980                 cmd->data |= get_ethtool_ipv4_rss(bp);
 981                 break;
 982
 983         case TCP_V6_FLOW:
 984                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
 985                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 986                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
 987                 cmd->data |= get_ethtool_ipv6_rss(bp);
 988                 break;
 989         case UDP_V6_FLOW:
 990                 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
 991                         cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 992                                      RXH_L4_B_0_1 | RXH_L4_B_2_3;
 993                 /* fall through */
 994         case SCTP_V6_FLOW:
 995         case AH_ESP_V6_FLOW:
 996         case AH_V6_FLOW:
 997         case ESP_V6_FLOW:
 998         case IPV6_FLOW:
 999                 cmd->data |= get_ethtool_ipv6_rss(bp);
1000                 break;
1001         }
1002         return 0;
1003 }
1004
1005 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1006 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1007
1008 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
1009 {
1010         u32 rss_hash_cfg = bp->rss_hash_cfg;
1011         int tuple, rc = 0;
1012
1013         if (cmd->data == RXH_4TUPLE)
1014                 tuple = 4;
1015         else if (cmd->data == RXH_2TUPLE)
1016                 tuple = 2;
1017         else if (!cmd->data)
1018                 tuple = 0;
1019         else
1020                 return -EINVAL;
1021
1022         if (cmd->flow_type == TCP_V4_FLOW) {
1023                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1024                 if (tuple == 4)
1025                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
1026         } else if (cmd->flow_type == UDP_V4_FLOW) {
1027                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1028                         return -EINVAL;
1029                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1030                 if (tuple == 4)
1031                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
1032         } else if (cmd->flow_type == TCP_V6_FLOW) {
1033                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1034                 if (tuple == 4)
1035                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
1036         } else if (cmd->flow_type == UDP_V6_FLOW) {
1037                 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
1038                         return -EINVAL;
1039                 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1040                 if (tuple == 4)
1041                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
1042         } else if (tuple == 4) {
1043                 return -EINVAL;
1044         }
1045
1046         switch (cmd->flow_type) {
1047         case TCP_V4_FLOW:
1048         case UDP_V4_FLOW:
1049         case SCTP_V4_FLOW:
1050         case AH_ESP_V4_FLOW:
1051         case AH_V4_FLOW:
1052         case ESP_V4_FLOW:
1053         case IPV4_FLOW:
1054                 if (tuple == 2)
1055                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1056                 else if (!tuple)
1057                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
1058                 break;
1059
1060         case TCP_V6_FLOW:
1061         case UDP_V6_FLOW:
1062         case SCTP_V6_FLOW:
1063         case AH_ESP_V6_FLOW:
1064         case AH_V6_FLOW:
1065         case ESP_V6_FLOW:
1066         case IPV6_FLOW:
1067                 if (tuple == 2)
1068                         rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1069                 else if (!tuple)
1070                         rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
1071                 break;
1072         }
1073
1074         if (bp->rss_hash_cfg == rss_hash_cfg)
1075                 return 0;
1076
1077         bp->rss_hash_cfg = rss_hash_cfg;
1078         if (netif_running(bp->dev)) {
1079                 bnxt_close_nic(bp, false, false);
1080                 rc = bnxt_open_nic(bp, false, false);
1081         }
1082         return rc;
1083 }
1084
1085 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1086                           u32 *rule_locs)
1087 {
1088         struct bnxt *bp = netdev_priv(dev);
1089         int rc = 0;
1090
1091         switch (cmd->cmd) {
1092 #ifdef CONFIG_RFS_ACCEL
1093         case ETHTOOL_GRXRINGS:
1094                 cmd->data = bp->rx_nr_rings;
1095                 break;
1096
1097         case ETHTOOL_GRXCLSRLCNT:
1098                 cmd->rule_cnt = bp->ntp_fltr_count;
1099                 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
1100                 break;
1101
1102         case ETHTOOL_GRXCLSRLALL:
1103                 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
1104                 break;
1105
1106         case ETHTOOL_GRXCLSRULE:
1107                 rc = bnxt_grxclsrule(bp, cmd);
1108                 break;
1109 #endif
1110
1111         case ETHTOOL_GRXFH:
1112                 rc = bnxt_grxfh(bp, cmd);
1113                 break;
1114
1115         default:
1116                 rc = -EOPNOTSUPP;
1117                 break;
1118         }
1119
1120         return rc;
1121 }
1122
1123 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1124 {
1125         struct bnxt *bp = netdev_priv(dev);
1126         int rc;
1127
1128         switch (cmd->cmd) {
1129         case ETHTOOL_SRXFH:
1130                 rc = bnxt_srxfh(bp, cmd);
1131                 break;
1132
1133         default:
1134                 rc = -EOPNOTSUPP;
1135                 break;
1136         }
1137         return rc;
1138 }
1139
1140 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
1141 {
1142         return HW_HASH_INDEX_SIZE;
1143 }
1144
1145 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
1146 {
1147         return HW_HASH_KEY_SIZE;
1148 }
1149
1150 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
1151                          u8 *hfunc)
1152 {
1153         struct bnxt *bp = netdev_priv(dev);
1154         struct bnxt_vnic_info *vnic;
1155         int i = 0;
1156
1157         if (hfunc)
1158                 *hfunc = ETH_RSS_HASH_TOP;
1159
1160         if (!bp->vnic_info)
1161                 return 0;
1162
1163         vnic = &bp->vnic_info[0];
1164         if (indir && vnic->rss_table) {
1165                 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
1166                         indir[i] = le16_to_cpu(vnic->rss_table[i]);
1167         }
1168
1169         if (key && vnic->rss_hash_key)
1170                 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
1171
1172         return 0;
1173 }
1174
1175 static void bnxt_get_drvinfo(struct net_device *dev,
1176                              struct ethtool_drvinfo *info)
1177 {
1178         struct bnxt *bp = netdev_priv(dev);
1179
1180         strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
1181         strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
1182         strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
1183         strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
1184         info->n_stats = bnxt_get_num_stats(bp);
1185         info->testinfo_len = bp->num_tests;
1186         /* TODO CHIMP_FW: eeprom dump details */
1187         info->eedump_len = 0;
1188         /* TODO CHIMP FW: reg dump details */
1189         info->regdump_len = 0;
1190 }
1191
1192 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1193 {
1194         struct bnxt *bp = netdev_priv(dev);
1195
1196         wol->supported = 0;
1197         wol->wolopts = 0;
1198         memset(&wol->sopass, 0, sizeof(wol->sopass));
1199         if (bp->flags & BNXT_FLAG_WOL_CAP) {
1200                 wol->supported = WAKE_MAGIC;
1201                 if (bp->wol)
1202                         wol->wolopts = WAKE_MAGIC;
1203         }
1204 }
1205
1206 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1207 {
1208         struct bnxt *bp = netdev_priv(dev);
1209
1210         if (wol->wolopts & ~WAKE_MAGIC)
1211                 return -EINVAL;
1212
1213         if (wol->wolopts & WAKE_MAGIC) {
1214                 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
1215                         return -EINVAL;
1216                 if (!bp->wol) {
1217                         if (bnxt_hwrm_alloc_wol_fltr(bp))
1218                                 return -EBUSY;
1219                         bp->wol = 1;
1220                 }
1221         } else {
1222                 if (bp->wol) {
1223                         if (bnxt_hwrm_free_wol_fltr(bp))
1224                                 return -EBUSY;
1225                         bp->wol = 0;
1226                 }
1227         }
1228         return 0;
1229 }
1230
1231 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
1232 {
1233         u32 speed_mask = 0;
1234
1235         /* TODO: support 25GB, 40GB, 50GB with different cable type */
1236         /* set the advertised speeds */
1237         if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
1238                 speed_mask |= ADVERTISED_100baseT_Full;
1239         if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
1240                 speed_mask |= ADVERTISED_1000baseT_Full;
1241         if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
1242                 speed_mask |= ADVERTISED_2500baseX_Full;
1243         if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
1244                 speed_mask |= ADVERTISED_10000baseT_Full;
1245         if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
1246                 speed_mask |= ADVERTISED_40000baseCR4_Full;
1247
1248         if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
1249                 speed_mask |= ADVERTISED_Pause;
1250         else if (fw_pause & BNXT_LINK_PAUSE_TX)
1251                 speed_mask |= ADVERTISED_Asym_Pause;
1252         else if (fw_pause & BNXT_LINK_PAUSE_RX)
1253                 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
1254
1255         return speed_mask;
1256 }
1257
1258 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1259 {                                                                       \
1260         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB)                    \
1261                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1262                                                      100baseT_Full);    \
1263         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB)                      \
1264                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1265                                                      1000baseT_Full);   \
1266         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB)                     \
1267                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1268                                                      10000baseT_Full);  \
1269         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB)                     \
1270                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1271                                                      25000baseCR_Full); \
1272         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB)                     \
1273                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1274                                                      40000baseCR4_Full);\
1275         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB)                     \
1276                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1277                                                      50000baseCR2_Full);\
1278         if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB)                    \
1279                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1280                                                      100000baseCR4_Full);\
1281         if ((fw_pause) & BNXT_LINK_PAUSE_RX) {                          \
1282                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1283                                                      Pause);            \
1284                 if (!((fw_pause) & BNXT_LINK_PAUSE_TX))                 \
1285                         ethtool_link_ksettings_add_link_mode(           \
1286                                         lk_ksettings, name, Asym_Pause);\
1287         } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) {                   \
1288                 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1289                                                      Asym_Pause);       \
1290         }                                                               \
1291 }
1292
1293 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name)          \
1294 {                                                                       \
1295         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1296                                                   100baseT_Full) ||     \
1297             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1298                                                   100baseT_Half))       \
1299                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB;               \
1300         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1301                                                   1000baseT_Full) ||    \
1302             ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1303                                                   1000baseT_Half))      \
1304                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB;                 \
1305         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1306                                                   10000baseT_Full))     \
1307                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB;                \
1308         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1309                                                   25000baseCR_Full))    \
1310                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB;                \
1311         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1312                                                   40000baseCR4_Full))   \
1313                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB;                \
1314         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1315                                                   50000baseCR2_Full))   \
1316                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB;                \
1317         if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name,   \
1318                                                   100000baseCR4_Full))  \
1319                 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB;               \
1320 }
1321
1322 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
1323                                 struct ethtool_link_ksettings *lk_ksettings)
1324 {
1325         u16 fw_speeds = link_info->advertising;
1326         u8 fw_pause = 0;
1327
1328         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1329                 fw_pause = link_info->auto_pause_setting;
1330
1331         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
1332 }
1333
1334 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
1335                                 struct ethtool_link_ksettings *lk_ksettings)
1336 {
1337         u16 fw_speeds = link_info->lp_auto_link_speeds;
1338         u8 fw_pause = 0;
1339
1340         if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1341                 fw_pause = link_info->lp_pause;
1342
1343         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
1344                                 lp_advertising);
1345 }
1346
1347 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1348                                 struct ethtool_link_ksettings *lk_ksettings)
1349 {
1350         u16 fw_speeds = link_info->support_speeds;
1351
1352         BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1353
1354         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1355         ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1356                                              Asym_Pause);
1357
1358         if (link_info->support_auto_speeds)
1359                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1360                                                      Autoneg);
1361 }
1362
1363 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1364 {
1365         switch (fw_link_speed) {
1366         case BNXT_LINK_SPEED_100MB:
1367                 return SPEED_100;
1368         case BNXT_LINK_SPEED_1GB:
1369                 return SPEED_1000;
1370         case BNXT_LINK_SPEED_2_5GB:
1371                 return SPEED_2500;
1372         case BNXT_LINK_SPEED_10GB:
1373                 return SPEED_10000;
1374         case BNXT_LINK_SPEED_20GB:
1375                 return SPEED_20000;
1376         case BNXT_LINK_SPEED_25GB:
1377                 return SPEED_25000;
1378         case BNXT_LINK_SPEED_40GB:
1379                 return SPEED_40000;
1380         case BNXT_LINK_SPEED_50GB:
1381                 return SPEED_50000;
1382         case BNXT_LINK_SPEED_100GB:
1383                 return SPEED_100000;
1384         default:
1385                 return SPEED_UNKNOWN;
1386         }
1387 }
1388
1389 static int bnxt_get_link_ksettings(struct net_device *dev,
1390                                    struct ethtool_link_ksettings *lk_ksettings)
1391 {
1392         struct bnxt *bp = netdev_priv(dev);
1393         struct bnxt_link_info *link_info = &bp->link_info;
1394         struct ethtool_link_settings *base = &lk_ksettings->base;
1395         u32 ethtool_speed;
1396
1397         ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1398         mutex_lock(&bp->link_lock);
1399         bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1400
1401         ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1402         if (link_info->autoneg) {
1403                 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1404                 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1405                                                      advertising, Autoneg);
1406                 base->autoneg = AUTONEG_ENABLE;
1407                 if (link_info->phy_link_status == BNXT_LINK_LINK)
1408                         bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1409                 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1410                 if (!netif_carrier_ok(dev))
1411                         base->duplex = DUPLEX_UNKNOWN;
1412                 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1413                         base->duplex = DUPLEX_FULL;
1414                 else
1415                         base->duplex = DUPLEX_HALF;
1416         } else {
1417                 base->autoneg = AUTONEG_DISABLE;
1418                 ethtool_speed =
1419                         bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1420                 base->duplex = DUPLEX_HALF;
1421                 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1422                         base->duplex = DUPLEX_FULL;
1423         }
1424         base->speed = ethtool_speed;
1425
1426         base->port = PORT_NONE;
1427         if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1428                 base->port = PORT_TP;
1429                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1430                                                      TP);
1431                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1432                                                      TP);
1433         } else {
1434                 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1435                                                      FIBRE);
1436                 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1437                                                      FIBRE);
1438
1439                 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1440                         base->port = PORT_DA;
1441                 else if (link_info->media_type ==
1442                          PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1443                         base->port = PORT_FIBRE;
1444         }
1445         base->phy_address = link_info->phy_addr;
1446         mutex_unlock(&bp->link_lock);
1447
1448         return 0;
1449 }
1450
1451 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1452 {
1453         struct bnxt *bp = netdev_priv(dev);
1454         struct bnxt_link_info *link_info = &bp->link_info;
1455         u16 support_spds = link_info->support_speeds;
1456         u32 fw_speed = 0;
1457
1458         switch (ethtool_speed) {
1459         case SPEED_100:
1460                 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1461                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1462                 break;
1463         case SPEED_1000:
1464                 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1465                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1466                 break;
1467         case SPEED_2500:
1468                 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1469                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1470                 break;
1471         case SPEED_10000:
1472                 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1473                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1474                 break;
1475         case SPEED_20000:
1476                 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1477                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1478                 break;
1479         case SPEED_25000:
1480                 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1481                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1482                 break;
1483         case SPEED_40000:
1484                 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1485                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1486                 break;
1487         case SPEED_50000:
1488                 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1489                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1490                 break;
1491         case SPEED_100000:
1492                 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1493                         fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1494                 break;
1495         default:
1496                 netdev_err(dev, "unsupported speed!\n");
1497                 break;
1498         }
1499         return fw_speed;
1500 }
1501
1502 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1503 {
1504         u16 fw_speed_mask = 0;
1505
1506         /* only support autoneg at speed 100, 1000, and 10000 */
1507         if (advertising & (ADVERTISED_100baseT_Full |
1508                            ADVERTISED_100baseT_Half)) {
1509                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1510         }
1511         if (advertising & (ADVERTISED_1000baseT_Full |
1512                            ADVERTISED_1000baseT_Half)) {
1513                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1514         }
1515         if (advertising & ADVERTISED_10000baseT_Full)
1516                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1517
1518         if (advertising & ADVERTISED_40000baseCR4_Full)
1519                 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1520
1521         return fw_speed_mask;
1522 }
1523
1524 static int bnxt_set_link_ksettings(struct net_device *dev,
1525                            const struct ethtool_link_ksettings *lk_ksettings)
1526 {
1527         struct bnxt *bp = netdev_priv(dev);
1528         struct bnxt_link_info *link_info = &bp->link_info;
1529         const struct ethtool_link_settings *base = &lk_ksettings->base;
1530         bool set_pause = false;
1531         u16 fw_advertising = 0;
1532         u32 speed;
1533         int rc = 0;
1534
1535         if (!BNXT_SINGLE_PF(bp))
1536                 return -EOPNOTSUPP;
1537
1538         mutex_lock(&bp->link_lock);
1539         if (base->autoneg == AUTONEG_ENABLE) {
1540                 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1541                                         advertising);
1542                 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1543                 if (!fw_advertising)
1544                         link_info->advertising = link_info->support_auto_speeds;
1545                 else
1546                         link_info->advertising = fw_advertising;
1547                 /* any change to autoneg will cause link change, therefore the
1548                  * driver should put back the original pause setting in autoneg
1549                  */
1550                 set_pause = true;
1551         } else {
1552                 u16 fw_speed;
1553                 u8 phy_type = link_info->phy_type;
1554
1555                 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET  ||
1556                     phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1557                     link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1558                         netdev_err(dev, "10GBase-T devices must autoneg\n");
1559                         rc = -EINVAL;
1560                         goto set_setting_exit;
1561                 }
1562                 if (base->duplex == DUPLEX_HALF) {
1563                         netdev_err(dev, "HALF DUPLEX is not supported!\n");
1564                         rc = -EINVAL;
1565                         goto set_setting_exit;
1566                 }
1567                 speed = base->speed;
1568                 fw_speed = bnxt_get_fw_speed(dev, speed);
1569                 if (!fw_speed) {
1570                         rc = -EINVAL;
1571                         goto set_setting_exit;
1572                 }
1573                 link_info->req_link_speed = fw_speed;
1574                 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1575                 link_info->autoneg = 0;
1576                 link_info->advertising = 0;
1577         }
1578
1579         if (netif_running(dev))
1580                 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1581
1582 set_setting_exit:
1583         mutex_unlock(&bp->link_lock);
1584         return rc;
1585 }
1586
1587 static void bnxt_get_pauseparam(struct net_device *dev,
1588                                 struct ethtool_pauseparam *epause)
1589 {
1590         struct bnxt *bp = netdev_priv(dev);
1591         struct bnxt_link_info *link_info = &bp->link_info;
1592
1593         if (BNXT_VF(bp))
1594                 return;
1595         epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1596         epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1597         epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1598 }
1599
1600 static int bnxt_set_pauseparam(struct net_device *dev,
1601                                struct ethtool_pauseparam *epause)
1602 {
1603         int rc = 0;
1604         struct bnxt *bp = netdev_priv(dev);
1605         struct bnxt_link_info *link_info = &bp->link_info;
1606
1607         if (!BNXT_SINGLE_PF(bp))
1608                 return -EOPNOTSUPP;
1609
1610         if (epause->autoneg) {
1611                 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1612                         return -EINVAL;
1613
1614                 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1615                 if (bp->hwrm_spec_code >= 0x10201)
1616                         link_info->req_flow_ctrl =
1617                                 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1618         } else {
1619                 /* when transition from auto pause to force pause,
1620                  * force a link change
1621                  */
1622                 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1623                         link_info->force_link_chng = true;
1624                 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1625                 link_info->req_flow_ctrl = 0;
1626         }
1627         if (epause->rx_pause)
1628                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1629
1630         if (epause->tx_pause)
1631                 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1632
1633         if (netif_running(dev))
1634                 rc = bnxt_hwrm_set_pause(bp);
1635         return rc;
1636 }
1637
1638 static u32 bnxt_get_link(struct net_device *dev)
1639 {
1640         struct bnxt *bp = netdev_priv(dev);
1641
1642         /* TODO: handle MF, VF, driver close case */
1643         return bp->link_info.link_up;
1644 }
1645
1646 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1647                                 u16 ext, u16 *index, u32 *item_length,
1648                                 u32 *data_length);
1649
1650 static int bnxt_flash_nvram(struct net_device *dev,
1651                             u16 dir_type,
1652                             u16 dir_ordinal,
1653                             u16 dir_ext,
1654                             u16 dir_attr,
1655                             const u8 *data,
1656                             size_t data_len)
1657 {
1658         struct bnxt *bp = netdev_priv(dev);
1659         int rc;
1660         struct hwrm_nvm_write_input req = {0};
1661         dma_addr_t dma_handle;
1662         u8 *kmem;
1663
1664         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1665
1666         req.dir_type = cpu_to_le16(dir_type);
1667         req.dir_ordinal = cpu_to_le16(dir_ordinal);
1668         req.dir_ext = cpu_to_le16(dir_ext);
1669         req.dir_attr = cpu_to_le16(dir_attr);
1670         req.dir_data_length = cpu_to_le32(data_len);
1671
1672         kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1673                                   GFP_KERNEL);
1674         if (!kmem) {
1675                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1676                            (unsigned)data_len);
1677                 return -ENOMEM;
1678         }
1679         memcpy(kmem, data, data_len);
1680         req.host_src_addr = cpu_to_le64(dma_handle);
1681
1682         rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1683         dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1684
1685         if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1686                 netdev_info(dev,
1687                             "PF does not have admin privileges to flash the device\n");
1688                 rc = -EACCES;
1689         } else if (rc) {
1690                 rc = -EIO;
1691         }
1692         return rc;
1693 }
1694
1695 static int bnxt_firmware_reset(struct net_device *dev,
1696                                u16 dir_type)
1697 {
1698         struct hwrm_fw_reset_input req = {0};
1699         struct bnxt *bp = netdev_priv(dev);
1700         int rc;
1701
1702         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1703
1704         /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1705         /*       (e.g. when firmware isn't already running) */
1706         switch (dir_type) {
1707         case BNX_DIR_TYPE_CHIMP_PATCH:
1708         case BNX_DIR_TYPE_BOOTCODE:
1709         case BNX_DIR_TYPE_BOOTCODE_2:
1710                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1711                 /* Self-reset ChiMP upon next PCIe reset: */
1712                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1713                 break;
1714         case BNX_DIR_TYPE_APE_FW:
1715         case BNX_DIR_TYPE_APE_PATCH:
1716                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1717                 /* Self-reset APE upon next PCIe reset: */
1718                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1719                 break;
1720         case BNX_DIR_TYPE_KONG_FW:
1721         case BNX_DIR_TYPE_KONG_PATCH:
1722                 req.embedded_proc_type =
1723                         FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1724                 break;
1725         case BNX_DIR_TYPE_BONO_FW:
1726         case BNX_DIR_TYPE_BONO_PATCH:
1727                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1728                 break;
1729         case BNXT_FW_RESET_CHIP:
1730                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1731                 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1732                 break;
1733         case BNXT_FW_RESET_AP:
1734                 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP;
1735                 break;
1736         default:
1737                 return -EINVAL;
1738         }
1739
1740         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1741         if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1742                 netdev_info(dev,
1743                             "PF does not have admin privileges to reset the device\n");
1744                 rc = -EACCES;
1745         } else if (rc) {
1746                 rc = -EIO;
1747         }
1748         return rc;
1749 }
1750
1751 static int bnxt_flash_firmware(struct net_device *dev,
1752                                u16 dir_type,
1753                                const u8 *fw_data,
1754                                size_t fw_size)
1755 {
1756         int     rc = 0;
1757         u16     code_type;
1758         u32     stored_crc;
1759         u32     calculated_crc;
1760         struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1761
1762         switch (dir_type) {
1763         case BNX_DIR_TYPE_BOOTCODE:
1764         case BNX_DIR_TYPE_BOOTCODE_2:
1765                 code_type = CODE_BOOT;
1766                 break;
1767         case BNX_DIR_TYPE_CHIMP_PATCH:
1768                 code_type = CODE_CHIMP_PATCH;
1769                 break;
1770         case BNX_DIR_TYPE_APE_FW:
1771                 code_type = CODE_MCTP_PASSTHRU;
1772                 break;
1773         case BNX_DIR_TYPE_APE_PATCH:
1774                 code_type = CODE_APE_PATCH;
1775                 break;
1776         case BNX_DIR_TYPE_KONG_FW:
1777                 code_type = CODE_KONG_FW;
1778                 break;
1779         case BNX_DIR_TYPE_KONG_PATCH:
1780                 code_type = CODE_KONG_PATCH;
1781                 break;
1782         case BNX_DIR_TYPE_BONO_FW:
1783                 code_type = CODE_BONO_FW;
1784                 break;
1785         case BNX_DIR_TYPE_BONO_PATCH:
1786                 code_type = CODE_BONO_PATCH;
1787                 break;
1788         default:
1789                 netdev_err(dev, "Unsupported directory entry type: %u\n",
1790                            dir_type);
1791                 return -EINVAL;
1792         }
1793         if (fw_size < sizeof(struct bnxt_fw_header)) {
1794                 netdev_err(dev, "Invalid firmware file size: %u\n",
1795                            (unsigned int)fw_size);
1796                 return -EINVAL;
1797         }
1798         if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1799                 netdev_err(dev, "Invalid firmware signature: %08X\n",
1800                            le32_to_cpu(header->signature));
1801                 return -EINVAL;
1802         }
1803         if (header->code_type != code_type) {
1804                 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1805                            code_type, header->code_type);
1806                 return -EINVAL;
1807         }
1808         if (header->device != DEVICE_CUMULUS_FAMILY) {
1809                 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1810                            DEVICE_CUMULUS_FAMILY, header->device);
1811                 return -EINVAL;
1812         }
1813         /* Confirm the CRC32 checksum of the file: */
1814         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1815                                              sizeof(stored_crc)));
1816         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1817         if (calculated_crc != stored_crc) {
1818                 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1819                            (unsigned long)stored_crc,
1820                            (unsigned long)calculated_crc);
1821                 return -EINVAL;
1822         }
1823         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1824                               0, 0, fw_data, fw_size);
1825         if (rc == 0)    /* Firmware update successful */
1826                 rc = bnxt_firmware_reset(dev, dir_type);
1827
1828         return rc;
1829 }
1830
1831 static int bnxt_flash_microcode(struct net_device *dev,
1832                                 u16 dir_type,
1833                                 const u8 *fw_data,
1834                                 size_t fw_size)
1835 {
1836         struct bnxt_ucode_trailer *trailer;
1837         u32 calculated_crc;
1838         u32 stored_crc;
1839         int rc = 0;
1840
1841         if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1842                 netdev_err(dev, "Invalid microcode file size: %u\n",
1843                            (unsigned int)fw_size);
1844                 return -EINVAL;
1845         }
1846         trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1847                                                 sizeof(*trailer)));
1848         if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1849                 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1850                            le32_to_cpu(trailer->sig));
1851                 return -EINVAL;
1852         }
1853         if (le16_to_cpu(trailer->dir_type) != dir_type) {
1854                 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1855                            dir_type, le16_to_cpu(trailer->dir_type));
1856                 return -EINVAL;
1857         }
1858         if (le16_to_cpu(trailer->trailer_length) <
1859                 sizeof(struct bnxt_ucode_trailer)) {
1860                 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1861                            le16_to_cpu(trailer->trailer_length));
1862                 return -EINVAL;
1863         }
1864
1865         /* Confirm the CRC32 checksum of the file: */
1866         stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1867                                              sizeof(stored_crc)));
1868         calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1869         if (calculated_crc != stored_crc) {
1870                 netdev_err(dev,
1871                            "CRC32 (%08lX) does not match calculated: %08lX\n",
1872                            (unsigned long)stored_crc,
1873                            (unsigned long)calculated_crc);
1874                 return -EINVAL;
1875         }
1876         rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1877                               0, 0, fw_data, fw_size);
1878
1879         return rc;
1880 }
1881
1882 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1883 {
1884         switch (dir_type) {
1885         case BNX_DIR_TYPE_CHIMP_PATCH:
1886         case BNX_DIR_TYPE_BOOTCODE:
1887         case BNX_DIR_TYPE_BOOTCODE_2:
1888         case BNX_DIR_TYPE_APE_FW:
1889         case BNX_DIR_TYPE_APE_PATCH:
1890         case BNX_DIR_TYPE_KONG_FW:
1891         case BNX_DIR_TYPE_KONG_PATCH:
1892         case BNX_DIR_TYPE_BONO_FW:
1893         case BNX_DIR_TYPE_BONO_PATCH:
1894                 return true;
1895         }
1896
1897         return false;
1898 }
1899
1900 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1901 {
1902         switch (dir_type) {
1903         case BNX_DIR_TYPE_AVS:
1904         case BNX_DIR_TYPE_EXP_ROM_MBA:
1905         case BNX_DIR_TYPE_PCIE:
1906         case BNX_DIR_TYPE_TSCF_UCODE:
1907         case BNX_DIR_TYPE_EXT_PHY:
1908         case BNX_DIR_TYPE_CCM:
1909         case BNX_DIR_TYPE_ISCSI_BOOT:
1910         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1911         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1912                 return true;
1913         }
1914
1915         return false;
1916 }
1917
1918 static bool bnxt_dir_type_is_executable(u16 dir_type)
1919 {
1920         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1921                 bnxt_dir_type_is_other_exec_format(dir_type);
1922 }
1923
1924 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1925                                          u16 dir_type,
1926                                          const char *filename)
1927 {
1928         const struct firmware  *fw;
1929         int                     rc;
1930
1931         rc = request_firmware(&fw, filename, &dev->dev);
1932         if (rc != 0) {
1933                 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1934                            rc, filename);
1935                 return rc;
1936         }
1937         if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1938                 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1939         else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1940                 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1941         else
1942                 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1943                                       0, 0, fw->data, fw->size);
1944         release_firmware(fw);
1945         return rc;
1946 }
1947
1948 static int bnxt_flash_package_from_file(struct net_device *dev,
1949                                         char *filename, u32 install_type)
1950 {
1951         struct bnxt *bp = netdev_priv(dev);
1952         struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1953         struct hwrm_nvm_install_update_input install = {0};
1954         const struct firmware *fw;
1955         int rc, hwrm_err = 0;
1956         u32 item_len;
1957         u16 index;
1958
1959         bnxt_hwrm_fw_set_time(bp);
1960
1961         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1962                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1963                                  &index, &item_len, NULL) != 0) {
1964                 netdev_err(dev, "PKG update area not created in nvram\n");
1965                 return -ENOBUFS;
1966         }
1967
1968         rc = request_firmware(&fw, filename, &dev->dev);
1969         if (rc != 0) {
1970                 netdev_err(dev, "PKG error %d requesting file: %s\n",
1971                            rc, filename);
1972                 return rc;
1973         }
1974
1975         if (fw->size > item_len) {
1976                 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1977                            (unsigned long)fw->size);
1978                 rc = -EFBIG;
1979         } else {
1980                 dma_addr_t dma_handle;
1981                 u8 *kmem;
1982                 struct hwrm_nvm_modify_input modify = {0};
1983
1984                 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1985
1986                 modify.dir_idx = cpu_to_le16(index);
1987                 modify.len = cpu_to_le32(fw->size);
1988
1989                 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1990                                           &dma_handle, GFP_KERNEL);
1991                 if (!kmem) {
1992                         netdev_err(dev,
1993                                    "dma_alloc_coherent failure, length = %u\n",
1994                                    (unsigned int)fw->size);
1995                         rc = -ENOMEM;
1996                 } else {
1997                         memcpy(kmem, fw->data, fw->size);
1998                         modify.host_src_addr = cpu_to_le64(dma_handle);
1999
2000                         hwrm_err = hwrm_send_message(bp, &modify,
2001                                                      sizeof(modify),
2002                                                      FLASH_PACKAGE_TIMEOUT);
2003                         dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
2004                                           dma_handle);
2005                 }
2006         }
2007         release_firmware(fw);
2008         if (rc || hwrm_err)
2009                 goto err_exit;
2010
2011         if ((install_type & 0xffff) == 0)
2012                 install_type >>= 16;
2013         bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
2014         install.install_type = cpu_to_le32(install_type);
2015
2016         mutex_lock(&bp->hwrm_cmd_lock);
2017         hwrm_err = _hwrm_send_message(bp, &install, sizeof(install),
2018                                       INSTALL_PACKAGE_TIMEOUT);
2019         if (hwrm_err) {
2020                 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
2021
2022                 if (resp->error_code && error_code ==
2023                     NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
2024                         install.flags |= cpu_to_le16(
2025                                NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
2026                         hwrm_err = _hwrm_send_message(bp, &install,
2027                                                       sizeof(install),
2028                                                       INSTALL_PACKAGE_TIMEOUT);
2029                 }
2030                 if (hwrm_err)
2031                         goto flash_pkg_exit;
2032         }
2033
2034         if (resp->result) {
2035                 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
2036                            (s8)resp->result, (int)resp->problem_item);
2037                 rc = -ENOPKG;
2038         }
2039 flash_pkg_exit:
2040         mutex_unlock(&bp->hwrm_cmd_lock);
2041 err_exit:
2042         if (hwrm_err == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
2043                 netdev_info(dev,
2044                             "PF does not have admin privileges to flash the device\n");
2045                 rc = -EACCES;
2046         } else if (hwrm_err) {
2047                 rc = -EOPNOTSUPP;
2048         }
2049         return rc;
2050 }
2051
2052 static int bnxt_flash_device(struct net_device *dev,
2053                              struct ethtool_flash *flash)
2054 {
2055         if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
2056                 netdev_err(dev, "flashdev not supported from a virtual function\n");
2057                 return -EINVAL;
2058         }
2059
2060         if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
2061             flash->region > 0xffff)
2062                 return bnxt_flash_package_from_file(dev, flash->data,
2063                                                     flash->region);
2064
2065         return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
2066 }
2067
2068 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
2069 {
2070         struct bnxt *bp = netdev_priv(dev);
2071         int rc;
2072         struct hwrm_nvm_get_dir_info_input req = {0};
2073         struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
2074
2075         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
2076
2077         mutex_lock(&bp->hwrm_cmd_lock);
2078         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2079         if (!rc) {
2080                 *entries = le32_to_cpu(output->entries);
2081                 *length = le32_to_cpu(output->entry_length);
2082         }
2083         mutex_unlock(&bp->hwrm_cmd_lock);
2084         return rc;
2085 }
2086
2087 static int bnxt_get_eeprom_len(struct net_device *dev)
2088 {
2089         struct bnxt *bp = netdev_priv(dev);
2090
2091         if (BNXT_VF(bp))
2092                 return 0;
2093
2094         /* The -1 return value allows the entire 32-bit range of offsets to be
2095          * passed via the ethtool command-line utility.
2096          */
2097         return -1;
2098 }
2099
2100 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
2101 {
2102         struct bnxt *bp = netdev_priv(dev);
2103         int rc;
2104         u32 dir_entries;
2105         u32 entry_length;
2106         u8 *buf;
2107         size_t buflen;
2108         dma_addr_t dma_handle;
2109         struct hwrm_nvm_get_dir_entries_input req = {0};
2110
2111         rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
2112         if (rc != 0)
2113                 return rc;
2114
2115         /* Insert 2 bytes of directory info (count and size of entries) */
2116         if (len < 2)
2117                 return -EINVAL;
2118
2119         *data++ = dir_entries;
2120         *data++ = entry_length;
2121         len -= 2;
2122         memset(data, 0xff, len);
2123
2124         buflen = dir_entries * entry_length;
2125         buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
2126                                  GFP_KERNEL);
2127         if (!buf) {
2128                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2129                            (unsigned)buflen);
2130                 return -ENOMEM;
2131         }
2132         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
2133         req.host_dest_addr = cpu_to_le64(dma_handle);
2134         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2135         if (rc == 0)
2136                 memcpy(data, buf, len > buflen ? buflen : len);
2137         dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
2138         return rc;
2139 }
2140
2141 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
2142                                u32 length, u8 *data)
2143 {
2144         struct bnxt *bp = netdev_priv(dev);
2145         int rc;
2146         u8 *buf;
2147         dma_addr_t dma_handle;
2148         struct hwrm_nvm_read_input req = {0};
2149
2150         if (!length)
2151                 return -EINVAL;
2152
2153         buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
2154                                  GFP_KERNEL);
2155         if (!buf) {
2156                 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
2157                            (unsigned)length);
2158                 return -ENOMEM;
2159         }
2160         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
2161         req.host_dest_addr = cpu_to_le64(dma_handle);
2162         req.dir_idx = cpu_to_le16(index);
2163         req.offset = cpu_to_le32(offset);
2164         req.len = cpu_to_le32(length);
2165
2166         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2167         if (rc == 0)
2168                 memcpy(data, buf, length);
2169         dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
2170         return rc;
2171 }
2172
2173 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
2174                                 u16 ext, u16 *index, u32 *item_length,
2175                                 u32 *data_length)
2176 {
2177         struct bnxt *bp = netdev_priv(dev);
2178         int rc;
2179         struct hwrm_nvm_find_dir_entry_input req = {0};
2180         struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
2181
2182         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
2183         req.enables = 0;
2184         req.dir_idx = 0;
2185         req.dir_type = cpu_to_le16(type);
2186         req.dir_ordinal = cpu_to_le16(ordinal);
2187         req.dir_ext = cpu_to_le16(ext);
2188         req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
2189         mutex_lock(&bp->hwrm_cmd_lock);
2190         rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2191         if (rc == 0) {
2192                 if (index)
2193                         *index = le16_to_cpu(output->dir_idx);
2194                 if (item_length)
2195                         *item_length = le32_to_cpu(output->dir_item_length);
2196                 if (data_length)
2197                         *data_length = le32_to_cpu(output->dir_data_length);
2198         }
2199         mutex_unlock(&bp->hwrm_cmd_lock);
2200         return rc;
2201 }
2202
2203 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
2204 {
2205         char    *retval = NULL;
2206         char    *p;
2207         char    *value;
2208         int     field = 0;
2209
2210         if (datalen < 1)
2211                 return NULL;
2212         /* null-terminate the log data (removing last '\n'): */
2213         data[datalen - 1] = 0;
2214         for (p = data; *p != 0; p++) {
2215                 field = 0;
2216                 retval = NULL;
2217                 while (*p != 0 && *p != '\n') {
2218                         value = p;
2219                         while (*p != 0 && *p != '\t' && *p != '\n')
2220                                 p++;
2221                         if (field == desired_field)
2222                                 retval = value;
2223                         if (*p != '\t')
2224                                 break;
2225                         *p = 0;
2226                         field++;
2227                         p++;
2228                 }
2229                 if (*p == 0)
2230                         break;
2231                 *p = 0;
2232         }
2233         return retval;
2234 }
2235
2236 static void bnxt_get_pkgver(struct net_device *dev)
2237 {
2238         struct bnxt *bp = netdev_priv(dev);
2239         u16 index = 0;
2240         char *pkgver;
2241         u32 pkglen;
2242         u8 *pkgbuf;
2243         int len;
2244
2245         if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
2246                                  BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
2247                                  &index, NULL, &pkglen) != 0)
2248                 return;
2249
2250         pkgbuf = kzalloc(pkglen, GFP_KERNEL);
2251         if (!pkgbuf) {
2252                 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
2253                         pkglen);
2254                 return;
2255         }
2256
2257         if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
2258                 goto err;
2259
2260         pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
2261                                    pkglen);
2262         if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
2263                 len = strlen(bp->fw_ver_str);
2264                 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
2265                          "/pkg %s", pkgver);
2266         }
2267 err:
2268         kfree(pkgbuf);
2269 }
2270
2271 static int bnxt_get_eeprom(struct net_device *dev,
2272                            struct ethtool_eeprom *eeprom,
2273                            u8 *data)
2274 {
2275         u32 index;
2276         u32 offset;
2277
2278         if (eeprom->offset == 0) /* special offset value to get directory */
2279                 return bnxt_get_nvram_directory(dev, eeprom->len, data);
2280
2281         index = eeprom->offset >> 24;
2282         offset = eeprom->offset & 0xffffff;
2283
2284         if (index == 0) {
2285                 netdev_err(dev, "unsupported index value: %d\n", index);
2286                 return -EINVAL;
2287         }
2288
2289         return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
2290 }
2291
2292 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
2293 {
2294         struct bnxt *bp = netdev_priv(dev);
2295         struct hwrm_nvm_erase_dir_entry_input req = {0};
2296
2297         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
2298         req.dir_idx = cpu_to_le16(index);
2299         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2300 }
2301
2302 static int bnxt_set_eeprom(struct net_device *dev,
2303                            struct ethtool_eeprom *eeprom,
2304                            u8 *data)
2305 {
2306         struct bnxt *bp = netdev_priv(dev);
2307         u8 index, dir_op;
2308         u16 type, ext, ordinal, attr;
2309
2310         if (!BNXT_PF(bp)) {
2311                 netdev_err(dev, "NVM write not supported from a virtual function\n");
2312                 return -EINVAL;
2313         }
2314
2315         type = eeprom->magic >> 16;
2316
2317         if (type == 0xffff) { /* special value for directory operations */
2318                 index = eeprom->magic & 0xff;
2319                 dir_op = eeprom->magic >> 8;
2320                 if (index == 0)
2321                         return -EINVAL;
2322                 switch (dir_op) {
2323                 case 0x0e: /* erase */
2324                         if (eeprom->offset != ~eeprom->magic)
2325                                 return -EINVAL;
2326                         return bnxt_erase_nvram_directory(dev, index - 1);
2327                 default:
2328                         return -EINVAL;
2329                 }
2330         }
2331
2332         /* Create or re-write an NVM item: */
2333         if (bnxt_dir_type_is_executable(type) == true)
2334                 return -EOPNOTSUPP;
2335         ext = eeprom->magic & 0xffff;
2336         ordinal = eeprom->offset >> 16;
2337         attr = eeprom->offset & 0xffff;
2338
2339         return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
2340                                 eeprom->len);
2341 }
2342
2343 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
2344 {
2345         struct bnxt *bp = netdev_priv(dev);
2346         struct ethtool_eee *eee = &bp->eee;
2347         struct bnxt_link_info *link_info = &bp->link_info;
2348         u32 advertising =
2349                  _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
2350         int rc = 0;
2351
2352         if (!BNXT_SINGLE_PF(bp))
2353                 return -EOPNOTSUPP;
2354
2355         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2356                 return -EOPNOTSUPP;
2357
2358         if (!edata->eee_enabled)
2359                 goto eee_ok;
2360
2361         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2362                 netdev_warn(dev, "EEE requires autoneg\n");
2363                 return -EINVAL;
2364         }
2365         if (edata->tx_lpi_enabled) {
2366                 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2367                                        edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2368                         netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2369                                     bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2370                         return -EINVAL;
2371                 } else if (!bp->lpi_tmr_hi) {
2372                         edata->tx_lpi_timer = eee->tx_lpi_timer;
2373                 }
2374         }
2375         if (!edata->advertised) {
2376                 edata->advertised = advertising & eee->supported;
2377         } else if (edata->advertised & ~advertising) {
2378                 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2379                             edata->advertised, advertising);
2380                 return -EINVAL;
2381         }
2382
2383         eee->advertised = edata->advertised;
2384         eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2385         eee->tx_lpi_timer = edata->tx_lpi_timer;
2386 eee_ok:
2387         eee->eee_enabled = edata->eee_enabled;
2388
2389         if (netif_running(dev))
2390                 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2391
2392         return rc;
2393 }
2394
2395 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2396 {
2397         struct bnxt *bp = netdev_priv(dev);
2398
2399         if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2400                 return -EOPNOTSUPP;
2401
2402         *edata = bp->eee;
2403         if (!bp->eee.eee_enabled) {
2404                 /* Preserve tx_lpi_timer so that the last value will be used
2405                  * by default when it is re-enabled.
2406                  */
2407                 edata->advertised = 0;
2408                 edata->tx_lpi_enabled = 0;
2409         }
2410
2411         if (!bp->eee.eee_active)
2412                 edata->lp_advertised = 0;
2413
2414         return 0;
2415 }
2416
2417 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2418                                             u16 page_number, u16 start_addr,
2419                                             u16 data_length, u8 *buf)
2420 {
2421         struct hwrm_port_phy_i2c_read_input req = {0};
2422         struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2423         int rc, byte_offset = 0;
2424
2425         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2426         req.i2c_slave_addr = i2c_addr;
2427         req.page_number = cpu_to_le16(page_number);
2428         req.port_id = cpu_to_le16(bp->pf.port_id);
2429         do {
2430                 u16 xfer_size;
2431
2432                 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2433                 data_length -= xfer_size;
2434                 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2435                 req.data_length = xfer_size;
2436                 req.enables = cpu_to_le32(start_addr + byte_offset ?
2437                                  PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2438                 mutex_lock(&bp->hwrm_cmd_lock);
2439                 rc = _hwrm_send_message(bp, &req, sizeof(req),
2440                                         HWRM_CMD_TIMEOUT);
2441                 if (!rc)
2442                         memcpy(buf + byte_offset, output->data, xfer_size);
2443                 mutex_unlock(&bp->hwrm_cmd_lock);
2444                 byte_offset += xfer_size;
2445         } while (!rc && data_length > 0);
2446
2447         return rc;
2448 }
2449
2450 static int bnxt_get_module_info(struct net_device *dev,
2451                                 struct ethtool_modinfo *modinfo)
2452 {
2453         u8 data[SFF_DIAG_SUPPORT_OFFSET + 1];
2454         struct bnxt *bp = netdev_priv(dev);
2455         int rc;
2456
2457         /* No point in going further if phy status indicates
2458          * module is not inserted or if it is powered down or
2459          * if it is of type 10GBase-T
2460          */
2461         if (bp->link_info.module_status >
2462                 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2463                 return -EOPNOTSUPP;
2464
2465         /* This feature is not supported in older firmware versions */
2466         if (bp->hwrm_spec_code < 0x10202)
2467                 return -EOPNOTSUPP;
2468
2469         rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0, 0,
2470                                               SFF_DIAG_SUPPORT_OFFSET + 1,
2471                                               data);
2472         if (!rc) {
2473                 u8 module_id = data[0];
2474                 u8 diag_supported = data[SFF_DIAG_SUPPORT_OFFSET];
2475
2476                 switch (module_id) {
2477                 case SFF_MODULE_ID_SFP:
2478                         modinfo->type = ETH_MODULE_SFF_8472;
2479                         modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2480                         if (!diag_supported)
2481                                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2482                         break;
2483                 case SFF_MODULE_ID_QSFP:
2484                 case SFF_MODULE_ID_QSFP_PLUS:
2485                         modinfo->type = ETH_MODULE_SFF_8436;
2486                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2487                         break;
2488                 case SFF_MODULE_ID_QSFP28:
2489                         modinfo->type = ETH_MODULE_SFF_8636;
2490                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2491                         break;
2492                 default:
2493                         rc = -EOPNOTSUPP;
2494                         break;
2495                 }
2496         }
2497         return rc;
2498 }
2499
2500 static int bnxt_get_module_eeprom(struct net_device *dev,
2501                                   struct ethtool_eeprom *eeprom,
2502                                   u8 *data)
2503 {
2504         struct bnxt *bp = netdev_priv(dev);
2505         u16  start = eeprom->offset, length = eeprom->len;
2506         int rc = 0;
2507
2508         memset(data, 0, eeprom->len);
2509
2510         /* Read A0 portion of the EEPROM */
2511         if (start < ETH_MODULE_SFF_8436_LEN) {
2512                 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2513                         length = ETH_MODULE_SFF_8436_LEN - start;
2514                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2515                                                       start, length, data);
2516                 if (rc)
2517                         return rc;
2518                 start += length;
2519                 data += length;
2520                 length = eeprom->len - length;
2521         }
2522
2523         /* Read A2 portion of the EEPROM */
2524         if (length) {
2525                 start -= ETH_MODULE_SFF_8436_LEN;
2526                 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2527                                                       start, length, data);
2528         }
2529         return rc;
2530 }
2531
2532 static int bnxt_nway_reset(struct net_device *dev)
2533 {
2534         int rc = 0;
2535
2536         struct bnxt *bp = netdev_priv(dev);
2537         struct bnxt_link_info *link_info = &bp->link_info;
2538
2539         if (!BNXT_SINGLE_PF(bp))
2540                 return -EOPNOTSUPP;
2541
2542         if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2543                 return -EINVAL;
2544
2545         if (netif_running(dev))
2546                 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2547
2548         return rc;
2549 }
2550
2551 static int bnxt_set_phys_id(struct net_device *dev,
2552                             enum ethtool_phys_id_state state)
2553 {
2554         struct hwrm_port_led_cfg_input req = {0};
2555         struct bnxt *bp = netdev_priv(dev);
2556         struct bnxt_pf_info *pf = &bp->pf;
2557         struct bnxt_led_cfg *led_cfg;
2558         u8 led_state;
2559         __le16 duration;
2560         int i, rc;
2561
2562         if (!bp->num_leds || BNXT_VF(bp))
2563                 return -EOPNOTSUPP;
2564
2565         if (state == ETHTOOL_ID_ACTIVE) {
2566                 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2567                 duration = cpu_to_le16(500);
2568         } else if (state == ETHTOOL_ID_INACTIVE) {
2569                 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2570                 duration = cpu_to_le16(0);
2571         } else {
2572                 return -EINVAL;
2573         }
2574         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2575         req.port_id = cpu_to_le16(pf->port_id);
2576         req.num_leds = bp->num_leds;
2577         led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2578         for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2579                 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2580                 led_cfg->led_id = bp->leds[i].led_id;
2581                 led_cfg->led_state = led_state;
2582                 led_cfg->led_blink_on = duration;
2583                 led_cfg->led_blink_off = duration;
2584                 led_cfg->led_group_id = bp->leds[i].led_group_id;
2585         }
2586         rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2587         if (rc)
2588                 rc = -EIO;
2589         return rc;
2590 }
2591
2592 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2593 {
2594         struct hwrm_selftest_irq_input req = {0};
2595
2596         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2597         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2598 }
2599
2600 static int bnxt_test_irq(struct bnxt *bp)
2601 {
2602         int i;
2603
2604         for (i = 0; i < bp->cp_nr_rings; i++) {
2605                 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2606                 int rc;
2607
2608                 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2609                 if (rc)
2610                         return rc;
2611         }
2612         return 0;
2613 }
2614
2615 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2616 {
2617         struct hwrm_port_mac_cfg_input req = {0};
2618
2619         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2620
2621         req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2622         if (enable)
2623                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2624         else
2625                 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2626         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2627 }
2628
2629 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2630 {
2631         struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2632         struct hwrm_port_phy_qcaps_input req = {0};
2633         int rc;
2634
2635         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2636         mutex_lock(&bp->hwrm_cmd_lock);
2637         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2638         if (!rc)
2639                 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2640
2641         mutex_unlock(&bp->hwrm_cmd_lock);
2642         return rc;
2643 }
2644
2645 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2646                                     struct hwrm_port_phy_cfg_input *req)
2647 {
2648         struct bnxt_link_info *link_info = &bp->link_info;
2649         u16 fw_advertising;
2650         u16 fw_speed;
2651         int rc;
2652
2653         if (!link_info->autoneg)
2654                 return 0;
2655
2656         rc = bnxt_query_force_speeds(bp, &fw_advertising);
2657         if (rc)
2658                 return rc;
2659
2660         fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2661         if (netif_carrier_ok(bp->dev))
2662                 fw_speed = bp->link_info.link_speed;
2663         else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2664                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2665         else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2666                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2667         else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2668                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2669         else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2670                 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2671
2672         req->force_link_speed = cpu_to_le16(fw_speed);
2673         req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2674                                   PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2675         rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2676         req->flags = 0;
2677         req->force_link_speed = cpu_to_le16(0);
2678         return rc;
2679 }
2680
2681 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable, bool ext)
2682 {
2683         struct hwrm_port_phy_cfg_input req = {0};
2684
2685         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2686
2687         if (enable) {
2688                 bnxt_disable_an_for_lpbk(bp, &req);
2689                 if (ext)
2690                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_EXTERNAL;
2691                 else
2692                         req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2693         } else {
2694                 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2695         }
2696         req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2697         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2698 }
2699
2700 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2701                             u32 raw_cons, int pkt_size)
2702 {
2703         struct bnxt_napi *bnapi = cpr->bnapi;
2704         struct bnxt_rx_ring_info *rxr;
2705         struct bnxt_sw_rx_bd *rx_buf;
2706         struct rx_cmp *rxcmp;
2707         u16 cp_cons, cons;
2708         u8 *data;
2709         u32 len;
2710         int i;
2711
2712         rxr = bnapi->rx_ring;
2713         cp_cons = RING_CMP(raw_cons);
2714         rxcmp = (struct rx_cmp *)
2715                 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2716         cons = rxcmp->rx_cmp_opaque;
2717         rx_buf = &rxr->rx_buf_ring[cons];
2718         data = rx_buf->data_ptr;
2719         len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2720         if (len != pkt_size)
2721                 return -EIO;
2722         i = ETH_ALEN;
2723         if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2724                 return -EIO;
2725         i += ETH_ALEN;
2726         for (  ; i < pkt_size; i++) {
2727                 if (data[i] != (u8)(i & 0xff))
2728                         return -EIO;
2729         }
2730         return 0;
2731 }
2732
2733 static int bnxt_poll_loopback(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
2734                               int pkt_size)
2735 {
2736         struct tx_cmp *txcmp;
2737         int rc = -EIO;
2738         u32 raw_cons;
2739         u32 cons;
2740         int i;
2741
2742         raw_cons = cpr->cp_raw_cons;
2743         for (i = 0; i < 200; i++) {
2744                 cons = RING_CMP(raw_cons);
2745                 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2746
2747                 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2748                         udelay(5);
2749                         continue;
2750                 }
2751
2752                 /* The valid test of the entry must be done first before
2753                  * reading any further.
2754                  */
2755                 dma_rmb();
2756                 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2757                         rc = bnxt_rx_loopback(bp, cpr, raw_cons, pkt_size);
2758                         raw_cons = NEXT_RAW_CMP(raw_cons);
2759                         raw_cons = NEXT_RAW_CMP(raw_cons);
2760                         break;
2761                 }
2762                 raw_cons = NEXT_RAW_CMP(raw_cons);
2763         }
2764         cpr->cp_raw_cons = raw_cons;
2765         return rc;
2766 }
2767
2768 static int bnxt_run_loopback(struct bnxt *bp)
2769 {
2770         struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2771         struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0];
2772         struct bnxt_cp_ring_info *cpr;
2773         int pkt_size, i = 0;
2774         struct sk_buff *skb;
2775         dma_addr_t map;
2776         u8 *data;
2777         int rc;
2778
2779         cpr = &rxr->bnapi->cp_ring;
2780         if (bp->flags & BNXT_FLAG_CHIP_P5)
2781                 cpr = cpr->cp_ring_arr[BNXT_RX_HDL];
2782         pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2783         skb = netdev_alloc_skb(bp->dev, pkt_size);
2784         if (!skb)
2785                 return -ENOMEM;
2786         data = skb_put(skb, pkt_size);
2787         eth_broadcast_addr(data);
2788         i += ETH_ALEN;
2789         ether_addr_copy(&data[i], bp->dev->dev_addr);
2790         i += ETH_ALEN;
2791         for ( ; i < pkt_size; i++)
2792                 data[i] = (u8)(i & 0xff);
2793
2794         map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2795                              PCI_DMA_TODEVICE);
2796         if (dma_mapping_error(&bp->pdev->dev, map)) {
2797                 dev_kfree_skb(skb);
2798                 return -EIO;
2799         }
2800         bnxt_xmit_bd(bp, txr, map, pkt_size);
2801
2802         /* Sync BD data before updating doorbell */
2803         wmb();
2804
2805         bnxt_db_write(bp, &txr->tx_db, txr->tx_prod);
2806         rc = bnxt_poll_loopback(bp, cpr, pkt_size);
2807
2808         dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2809         dev_kfree_skb(skb);
2810         return rc;
2811 }
2812
2813 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2814 {
2815         struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2816         struct hwrm_selftest_exec_input req = {0};
2817         int rc;
2818
2819         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2820         mutex_lock(&bp->hwrm_cmd_lock);
2821         resp->test_success = 0;
2822         req.flags = test_mask;
2823         rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2824         *test_results = resp->test_success;
2825         mutex_unlock(&bp->hwrm_cmd_lock);
2826         return rc;
2827 }
2828
2829 #define BNXT_DRV_TESTS                  4
2830 #define BNXT_MACLPBK_TEST_IDX           (bp->num_tests - BNXT_DRV_TESTS)
2831 #define BNXT_PHYLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 1)
2832 #define BNXT_EXTLPBK_TEST_IDX           (BNXT_MACLPBK_TEST_IDX + 2)
2833 #define BNXT_IRQ_TEST_IDX               (BNXT_MACLPBK_TEST_IDX + 3)
2834
2835 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2836                            u64 *buf)
2837 {
2838         struct bnxt *bp = netdev_priv(dev);
2839         bool do_ext_lpbk = false;
2840         bool offline = false;
2841         u8 test_results = 0;
2842         u8 test_mask = 0;
2843         int rc = 0, i;
2844
2845         if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2846                 return;
2847         memset(buf, 0, sizeof(u64) * bp->num_tests);
2848         if (!netif_running(dev)) {
2849                 etest->flags |= ETH_TEST_FL_FAILED;
2850                 return;
2851         }
2852
2853         if ((etest->flags & ETH_TEST_FL_EXTERNAL_LB) &&
2854             (bp->test_info->flags & BNXT_TEST_FL_EXT_LPBK))
2855                 do_ext_lpbk = true;
2856
2857         if (etest->flags & ETH_TEST_FL_OFFLINE) {
2858                 if (bp->pf.active_vfs) {
2859                         etest->flags |= ETH_TEST_FL_FAILED;
2860                         netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2861                         return;
2862                 }
2863                 offline = true;
2864         }
2865
2866         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2867                 u8 bit_val = 1 << i;
2868
2869                 if (!(bp->test_info->offline_mask & bit_val))
2870                         test_mask |= bit_val;
2871                 else if (offline)
2872                         test_mask |= bit_val;
2873         }
2874         if (!offline) {
2875                 bnxt_run_fw_tests(bp, test_mask, &test_results);
2876         } else {
2877                 rc = bnxt_close_nic(bp, false, false);
2878                 if (rc)
2879                         return;
2880                 bnxt_run_fw_tests(bp, test_mask, &test_results);
2881
2882                 buf[BNXT_MACLPBK_TEST_IDX] = 1;
2883                 bnxt_hwrm_mac_loopback(bp, true);
2884                 msleep(250);
2885                 rc = bnxt_half_open_nic(bp);
2886                 if (rc) {
2887                         bnxt_hwrm_mac_loopback(bp, false);
2888                         etest->flags |= ETH_TEST_FL_FAILED;
2889                         return;
2890                 }
2891                 if (bnxt_run_loopback(bp))
2892                         etest->flags |= ETH_TEST_FL_FAILED;
2893                 else
2894                         buf[BNXT_MACLPBK_TEST_IDX] = 0;
2895
2896                 bnxt_hwrm_mac_loopback(bp, false);
2897                 bnxt_hwrm_phy_loopback(bp, true, false);
2898                 msleep(1000);
2899                 if (bnxt_run_loopback(bp)) {
2900                         buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2901                         etest->flags |= ETH_TEST_FL_FAILED;
2902                 }
2903                 if (do_ext_lpbk) {
2904                         etest->flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;
2905                         bnxt_hwrm_phy_loopback(bp, true, true);
2906                         msleep(1000);
2907                         if (bnxt_run_loopback(bp)) {
2908                                 buf[BNXT_EXTLPBK_TEST_IDX] = 1;
2909                                 etest->flags |= ETH_TEST_FL_FAILED;
2910                         }
2911                 }
2912                 bnxt_hwrm_phy_loopback(bp, false, false);
2913                 bnxt_half_close_nic(bp);
2914                 rc = bnxt_open_nic(bp, false, true);
2915         }
2916         if (rc || bnxt_test_irq(bp)) {
2917                 buf[BNXT_IRQ_TEST_IDX] = 1;
2918                 etest->flags |= ETH_TEST_FL_FAILED;
2919         }
2920         for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2921                 u8 bit_val = 1 << i;
2922
2923                 if ((test_mask & bit_val) && !(test_results & bit_val)) {
2924                         buf[i] = 1;
2925                         etest->flags |= ETH_TEST_FL_FAILED;
2926                 }
2927         }
2928 }
2929
2930 static int bnxt_reset(struct net_device *dev, u32 *flags)
2931 {
2932         struct bnxt *bp = netdev_priv(dev);
2933         int rc = 0;
2934
2935         if (!BNXT_PF(bp)) {
2936                 netdev_err(dev, "Reset is not supported from a VF\n");
2937                 return -EOPNOTSUPP;
2938         }
2939
2940         if (pci_vfs_assigned(bp->pdev)) {
2941                 netdev_err(dev,
2942                            "Reset not allowed when VFs are assigned to VMs\n");
2943                 return -EBUSY;
2944         }
2945
2946         if (*flags == ETH_RESET_ALL) {
2947                 /* This feature is not supported in older firmware versions */
2948                 if (bp->hwrm_spec_code < 0x10803)
2949                         return -EOPNOTSUPP;
2950
2951                 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2952                 if (!rc) {
2953                         netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2954                         *flags = 0;
2955                 }
2956         } else if (*flags == ETH_RESET_AP) {
2957                 /* This feature is not supported in older firmware versions */
2958                 if (bp->hwrm_spec_code < 0x10803)
2959                         return -EOPNOTSUPP;
2960
2961                 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_AP);
2962                 if (!rc) {
2963                         netdev_info(dev, "Reset Application Processor request successful.\n");
2964                         *flags = 0;
2965                 }
2966         } else {
2967                 rc = -EINVAL;
2968         }
2969
2970         return rc;
2971 }
2972
2973 static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg, int msg_len,
2974                                   struct bnxt_hwrm_dbg_dma_info *info)
2975 {
2976         struct hwrm_dbg_cmn_output *cmn_resp = bp->hwrm_cmd_resp_addr;
2977         struct hwrm_dbg_cmn_input *cmn_req = msg;
2978         __le16 *seq_ptr = msg + info->seq_off;
2979         u16 seq = 0, len, segs_off;
2980         void *resp = cmn_resp;
2981         dma_addr_t dma_handle;
2982         int rc, off = 0;
2983         void *dma_buf;
2984
2985         dma_buf = dma_alloc_coherent(&bp->pdev->dev, info->dma_len, &dma_handle,
2986                                      GFP_KERNEL);
2987         if (!dma_buf)
2988                 return -ENOMEM;
2989
2990         segs_off = offsetof(struct hwrm_dbg_coredump_list_output,
2991                             total_segments);
2992         cmn_req->host_dest_addr = cpu_to_le64(dma_handle);
2993         cmn_req->host_buf_len = cpu_to_le32(info->dma_len);
2994         mutex_lock(&bp->hwrm_cmd_lock);
2995         while (1) {
2996                 *seq_ptr = cpu_to_le16(seq);
2997                 rc = _hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT);
2998                 if (rc)
2999                         break;
3000
3001                 len = le16_to_cpu(*((__le16 *)(resp + info->data_len_off)));
3002                 if (!seq &&
3003                     cmn_req->req_type == cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {
3004                         info->segs = le16_to_cpu(*((__le16 *)(resp +
3005                                                               segs_off)));
3006                         if (!info->segs) {
3007                                 rc = -EIO;
3008                                 break;
3009                         }
3010
3011                         info->dest_buf_size = info->segs *
3012                                         sizeof(struct coredump_segment_record);
3013                         info->dest_buf = kmalloc(info->dest_buf_size,
3014                                                  GFP_KERNEL);
3015                         if (!info->dest_buf) {
3016                                 rc = -ENOMEM;
3017                                 break;
3018                         }
3019                 }
3020
3021                 if (info->dest_buf)
3022                         memcpy(info->dest_buf + off, dma_buf, len);
3023
3024                 if (cmn_req->req_type ==
3025                                 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))
3026                         info->dest_buf_size += len;
3027
3028                 if (!(cmn_resp->flags & HWRM_DBG_CMN_FLAGS_MORE))
3029                         break;
3030
3031                 seq++;
3032                 off += len;
3033         }
3034         mutex_unlock(&bp->hwrm_cmd_lock);
3035         dma_free_coherent(&bp->pdev->dev, info->dma_len, dma_buf, dma_handle);
3036         return rc;
3037 }
3038
3039 static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,
3040                                        struct bnxt_coredump *coredump)
3041 {
3042         struct hwrm_dbg_coredump_list_input req = {0};
3043         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3044         int rc;
3045
3046         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_LIST, -1, -1);
3047
3048         info.dma_len = COREDUMP_LIST_BUF_LEN;
3049         info.seq_off = offsetof(struct hwrm_dbg_coredump_list_input, seq_no);
3050         info.data_len_off = offsetof(struct hwrm_dbg_coredump_list_output,
3051                                      data_len);
3052
3053         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3054         if (!rc) {
3055                 coredump->data = info.dest_buf;
3056                 coredump->data_size = info.dest_buf_size;
3057                 coredump->total_segs = info.segs;
3058         }
3059         return rc;
3060 }
3061
3062 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,
3063                                            u16 segment_id)
3064 {
3065         struct hwrm_dbg_coredump_initiate_input req = {0};
3066
3067         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_INITIATE, -1, -1);
3068         req.component_id = cpu_to_le16(component_id);
3069         req.segment_id = cpu_to_le16(segment_id);
3070
3071         return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3072 }
3073
3074 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,
3075                                            u16 segment_id, u32 *seg_len,
3076                                            void *buf, u32 offset)
3077 {
3078         struct hwrm_dbg_coredump_retrieve_input req = {0};
3079         struct bnxt_hwrm_dbg_dma_info info = {NULL};
3080         int rc;
3081
3082         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_DBG_COREDUMP_RETRIEVE, -1, -1);
3083         req.component_id = cpu_to_le16(component_id);
3084         req.segment_id = cpu_to_le16(segment_id);
3085
3086         info.dma_len = COREDUMP_RETRIEVE_BUF_LEN;
3087         info.seq_off = offsetof(struct hwrm_dbg_coredump_retrieve_input,
3088                                 seq_no);
3089         info.data_len_off = offsetof(struct hwrm_dbg_coredump_retrieve_output,
3090                                      data_len);
3091         if (buf)
3092                 info.dest_buf = buf + offset;
3093
3094         rc = bnxt_hwrm_dbg_dma_data(bp, &req, sizeof(req), &info);
3095         if (!rc)
3096                 *seg_len = info.dest_buf_size;
3097
3098         return rc;
3099 }
3100
3101 static void
3102 bnxt_fill_coredump_seg_hdr(struct bnxt *bp,
3103                            struct bnxt_coredump_segment_hdr *seg_hdr,
3104                            struct coredump_segment_record *seg_rec, u32 seg_len,
3105                            int status, u32 duration, u32 instance)
3106 {
3107         memset(seg_hdr, 0, sizeof(*seg_hdr));
3108         memcpy(seg_hdr->signature, "sEgM", 4);
3109         if (seg_rec) {
3110                 seg_hdr->component_id = (__force __le32)seg_rec->component_id;
3111                 seg_hdr->segment_id = (__force __le32)seg_rec->segment_id;
3112                 seg_hdr->low_version = seg_rec->version_low;
3113                 seg_hdr->high_version = seg_rec->version_hi;
3114         } else {
3115                 /* For hwrm_ver_get response Component id = 2
3116                  * and Segment id = 0
3117                  */
3118                 seg_hdr->component_id = cpu_to_le32(2);
3119                 seg_hdr->segment_id = 0;
3120         }
3121         seg_hdr->function_id = cpu_to_le16(bp->pdev->devfn);
3122         seg_hdr->length = cpu_to_le32(seg_len);
3123         seg_hdr->status = cpu_to_le32(status);
3124         seg_hdr->duration = cpu_to_le32(duration);
3125         seg_hdr->data_offset = cpu_to_le32(sizeof(*seg_hdr));
3126         seg_hdr->instance = cpu_to_le32(instance);
3127 }
3128
3129 static void
3130 bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,
3131                           time64_t start, s16 start_utc, u16 total_segs,
3132                           int status)
3133 {
3134         time64_t end = ktime_get_real_seconds();
3135         u32 os_ver_major = 0, os_ver_minor = 0;
3136         struct tm tm;
3137
3138         time64_to_tm(start, 0, &tm);
3139         memset(record, 0, sizeof(*record));
3140         memcpy(record->signature, "cOrE", 4);
3141         record->flags = 0;
3142         record->low_version = 0;
3143         record->high_version = 1;
3144         record->asic_state = 0;
3145         strlcpy(record->system_name, utsname()->nodename,
3146                 sizeof(record->system_name));
3147         record->year = cpu_to_le16(tm.tm_year + 1900);
3148         record->month = cpu_to_le16(tm.tm_mon + 1);
3149         record->day = cpu_to_le16(tm.tm_mday);
3150         record->hour = cpu_to_le16(tm.tm_hour);
3151         record->minute = cpu_to_le16(tm.tm_min);
3152         record->second = cpu_to_le16(tm.tm_sec);
3153         record->utc_bias = cpu_to_le16(start_utc);
3154         strcpy(record->commandline, "ethtool -w");
3155         record->total_segments = cpu_to_le32(total_segs);
3156
3157         sscanf(utsname()->release, "%u.%u", &os_ver_major, &os_ver_minor);
3158         record->os_ver_major = cpu_to_le32(os_ver_major);
3159         record->os_ver_minor = cpu_to_le32(os_ver_minor);
3160
3161         strlcpy(record->os_name, utsname()->sysname, 32);
3162         time64_to_tm(end, 0, &tm);
3163         record->end_year = cpu_to_le16(tm.tm_year + 1900);
3164         record->end_month = cpu_to_le16(tm.tm_mon + 1);
3165         record->end_day = cpu_to_le16(tm.tm_mday);
3166         record->end_hour = cpu_to_le16(tm.tm_hour);
3167         record->end_minute = cpu_to_le16(tm.tm_min);
3168         record->end_second = cpu_to_le16(tm.tm_sec);
3169         record->end_utc_bias = cpu_to_le16(sys_tz.tz_minuteswest * 60);
3170         record->asic_id1 = cpu_to_le32(bp->chip_num << 16 |
3171                                        bp->ver_resp.chip_rev << 8 |
3172                                        bp->ver_resp.chip_metal);
3173         record->asic_id2 = 0;
3174         record->coredump_status = cpu_to_le32(status);
3175         record->ioctl_low_version = 0;
3176         record->ioctl_high_version = 0;
3177 }
3178
3179 static int bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)
3180 {
3181         u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);
3182         struct coredump_segment_record *seg_record = NULL;
3183         u32 offset = 0, seg_hdr_len, seg_record_len;
3184         struct bnxt_coredump_segment_hdr seg_hdr;
3185         struct bnxt_coredump coredump = {NULL};
3186         time64_t start_time;
3187         u16 start_utc;
3188         int rc = 0, i;
3189
3190         start_time = ktime_get_real_seconds();
3191         start_utc = sys_tz.tz_minuteswest * 60;
3192         seg_hdr_len = sizeof(seg_hdr);
3193
3194         /* First segment should be hwrm_ver_get response */
3195         *dump_len = seg_hdr_len + ver_get_resp_len;
3196         if (buf) {
3197                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, NULL, ver_get_resp_len,
3198                                            0, 0, 0);
3199                 memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3200                 offset += seg_hdr_len;
3201                 memcpy(buf + offset, &bp->ver_resp, ver_get_resp_len);
3202                 offset += ver_get_resp_len;
3203         }
3204
3205         rc = bnxt_hwrm_dbg_coredump_list(bp, &coredump);
3206         if (rc) {
3207                 netdev_err(bp->dev, "Failed to get coredump segment list\n");
3208                 goto err;
3209         }
3210
3211         *dump_len += seg_hdr_len * coredump.total_segs;
3212
3213         seg_record = (struct coredump_segment_record *)coredump.data;
3214         seg_record_len = sizeof(*seg_record);
3215
3216         for (i = 0; i < coredump.total_segs; i++) {
3217                 u16 comp_id = le16_to_cpu(seg_record->component_id);
3218                 u16 seg_id = le16_to_cpu(seg_record->segment_id);
3219                 u32 duration = 0, seg_len = 0;
3220                 unsigned long start, end;
3221
3222                 start = jiffies;
3223
3224                 rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);
3225                 if (rc) {
3226                         netdev_err(bp->dev,
3227                                    "Failed to initiate coredump for seg = %d\n",
3228                                    seg_record->segment_id);
3229                         goto next_seg;
3230                 }
3231
3232                 /* Write segment data into the buffer */
3233                 rc = bnxt_hwrm_dbg_coredump_retrieve(bp, comp_id, seg_id,
3234                                                      &seg_len, buf,
3235                                                      offset + seg_hdr_len);
3236                 if (rc)
3237                         netdev_err(bp->dev,
3238                                    "Failed to retrieve coredump for seg = %d\n",
3239                                    seg_record->segment_id);
3240
3241 next_seg:
3242                 end = jiffies;
3243                 duration = jiffies_to_msecs(end - start);
3244                 bnxt_fill_coredump_seg_hdr(bp, &seg_hdr, seg_record, seg_len,
3245                                            rc, duration, 0);
3246
3247                 if (buf) {
3248                         /* Write segment header into the buffer */
3249                         memcpy(buf + offset, &seg_hdr, seg_hdr_len);
3250                         offset += seg_hdr_len + seg_len;
3251                 }
3252
3253                 *dump_len += seg_len;
3254                 seg_record =
3255                         (struct coredump_segment_record *)((u8 *)seg_record +
3256                                                            seg_record_len);
3257         }
3258
3259 err:
3260         if (buf)
3261                 bnxt_fill_coredump_record(bp, buf + offset, start_time,
3262                                           start_utc, coredump.total_segs + 1,
3263                                           rc);
3264         kfree(coredump.data);
3265         *dump_len += sizeof(struct bnxt_coredump_record);
3266
3267         return rc;
3268 }
3269
3270 static int bnxt_get_dump_flag(struct net_device *dev, struct ethtool_dump *dump)
3271 {
3272         struct bnxt *bp = netdev_priv(dev);
3273
3274         if (bp->hwrm_spec_code < 0x10801)
3275                 return -EOPNOTSUPP;
3276
3277         dump->version = bp->ver_resp.hwrm_fw_maj_8b << 24 |
3278                         bp->ver_resp.hwrm_fw_min_8b << 16 |
3279                         bp->ver_resp.hwrm_fw_bld_8b << 8 |
3280                         bp->ver_resp.hwrm_fw_rsvd_8b;
3281
3282         return bnxt_get_coredump(bp, NULL, &dump->len);
3283 }
3284
3285 static int bnxt_get_dump_data(struct net_device *dev, struct ethtool_dump *dump,
3286                               void *buf)
3287 {
3288         struct bnxt *bp = netdev_priv(dev);
3289
3290         if (bp->hwrm_spec_code < 0x10801)
3291                 return -EOPNOTSUPP;
3292
3293         memset(buf, 0, dump->len);
3294
3295         return bnxt_get_coredump(bp, buf, &dump->len);
3296 }
3297
3298 void bnxt_ethtool_init(struct bnxt *bp)
3299 {
3300         struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
3301         struct hwrm_selftest_qlist_input req = {0};
3302         struct bnxt_test_info *test_info;
3303         struct net_device *dev = bp->dev;
3304         int i, rc;
3305
3306         if (!(bp->fw_cap & BNXT_FW_CAP_PKG_VER))
3307                 bnxt_get_pkgver(dev);
3308
3309         if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
3310                 return;
3311
3312         bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
3313         mutex_lock(&bp->hwrm_cmd_lock);
3314         rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
3315         if (rc)
3316                 goto ethtool_init_exit;
3317
3318         test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
3319         if (!test_info)
3320                 goto ethtool_init_exit;
3321
3322         bp->test_info = test_info;
3323         bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
3324         if (bp->num_tests > BNXT_MAX_TEST)
3325                 bp->num_tests = BNXT_MAX_TEST;
3326
3327         test_info->offline_mask = resp->offline_tests;
3328         test_info->timeout = le16_to_cpu(resp->test_timeout);
3329         if (!test_info->timeout)
3330                 test_info->timeout = HWRM_CMD_TIMEOUT;
3331         for (i = 0; i < bp->num_tests; i++) {
3332                 char *str = test_info->string[i];
3333                 char *fw_str = resp->test0_name + i * 32;
3334
3335                 if (i == BNXT_MACLPBK_TEST_IDX) {
3336                         strcpy(str, "Mac loopback test (offline)");
3337                 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
3338                         strcpy(str, "Phy loopback test (offline)");
3339                 } else if (i == BNXT_EXTLPBK_TEST_IDX) {
3340                         strcpy(str, "Ext loopback test (offline)");
3341                 } else if (i == BNXT_IRQ_TEST_IDX) {
3342                         strcpy(str, "Interrupt_test (offline)");
3343                 } else {
3344                         strlcpy(str, fw_str, ETH_GSTRING_LEN);
3345                         strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
3346                         if (test_info->offline_mask & (1 << i))
3347                                 strncat(str, " (offline)",
3348                                         ETH_GSTRING_LEN - strlen(str));
3349                         else
3350                                 strncat(str, " (online)",
3351                                         ETH_GSTRING_LEN - strlen(str));
3352                 }
3353         }
3354
3355 ethtool_init_exit:
3356         mutex_unlock(&bp->hwrm_cmd_lock);
3357 }
3358
3359 void bnxt_ethtool_free(struct bnxt *bp)
3360 {
3361         kfree(bp->test_info);
3362         bp->test_info = NULL;
3363 }
3364
3365 const struct ethtool_ops bnxt_ethtool_ops = {
3366         .get_link_ksettings     = bnxt_get_link_ksettings,
3367         .set_link_ksettings     = bnxt_set_link_ksettings,
3368         .get_pauseparam         = bnxt_get_pauseparam,
3369         .set_pauseparam         = bnxt_set_pauseparam,
3370         .get_drvinfo            = bnxt_get_drvinfo,
3371         .get_wol                = bnxt_get_wol,
3372         .set_wol                = bnxt_set_wol,
3373         .get_coalesce           = bnxt_get_coalesce,
3374         .set_coalesce           = bnxt_set_coalesce,
3375         .get_msglevel           = bnxt_get_msglevel,
3376         .set_msglevel           = bnxt_set_msglevel,
3377         .get_sset_count         = bnxt_get_sset_count,
3378         .get_strings            = bnxt_get_strings,
3379         .get_ethtool_stats      = bnxt_get_ethtool_stats,
3380         .set_ringparam          = bnxt_set_ringparam,
3381         .get_ringparam          = bnxt_get_ringparam,
3382         .get_channels           = bnxt_get_channels,
3383         .set_channels           = bnxt_set_channels,
3384         .get_rxnfc              = bnxt_get_rxnfc,
3385         .set_rxnfc              = bnxt_set_rxnfc,
3386         .get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,
3387         .get_rxfh_key_size      = bnxt_get_rxfh_key_size,
3388         .get_rxfh               = bnxt_get_rxfh,
3389         .flash_device           = bnxt_flash_device,
3390         .get_eeprom_len         = bnxt_get_eeprom_len,
3391         .get_eeprom             = bnxt_get_eeprom,
3392         .set_eeprom             = bnxt_set_eeprom,
3393         .get_link               = bnxt_get_link,
3394         .get_eee                = bnxt_get_eee,
3395         .set_eee                = bnxt_set_eee,
3396         .get_module_info        = bnxt_get_module_info,
3397         .get_module_eeprom      = bnxt_get_module_eeprom,
3398         .nway_reset             = bnxt_nway_reset,
3399         .set_phys_id            = bnxt_set_phys_id,
3400         .self_test              = bnxt_self_test,
3401         .reset                  = bnxt_reset,
3402         .get_dump_flag          = bnxt_get_dump_flag,
3403         .get_dump_data          = bnxt_get_dump_data,
3404 };