1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for Gigabit Ethernet adapters based on the Session Layer
4 * Interface (SLIC) technology by Alacritech. The driver does not
5 * support the hardware acceleration features provided by these cards.
7 * Copyright (C) 2016 Lino Sanfilippo <LinoSanfilippo@gmx.de>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/if_ether.h>
16 #include <linux/crc32.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/ethtool.h>
19 #include <linux/mii.h>
20 #include <linux/interrupt.h>
21 #include <linux/delay.h>
22 #include <linux/firmware.h>
23 #include <linux/list.h>
24 #include <linux/u64_stats_sync.h>
28 #define DRV_NAME "slicoss"
29 #define DRV_VERSION "1.0"
31 static const struct pci_device_id slic_id_tbl[] = {
32 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH,
33 PCI_DEVICE_ID_ALACRITECH_MOJAVE) },
34 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH,
35 PCI_DEVICE_ID_ALACRITECH_OASIS) },
39 static const char slic_stats_strings[][ETH_GSTRING_LEN] = {
65 static inline int slic_next_queue_idx(unsigned int idx, unsigned int qlen)
67 return (idx + 1) & (qlen - 1);
70 static inline int slic_get_free_queue_descs(unsigned int put_idx,
71 unsigned int done_idx,
74 if (put_idx >= done_idx)
75 return (qlen - (put_idx - done_idx) - 1);
76 return (done_idx - put_idx - 1);
79 static unsigned int slic_next_compl_idx(struct slic_device *sdev)
81 struct slic_stat_queue *stq = &sdev->stq;
82 unsigned int active = stq->active_array;
83 struct slic_stat_desc *descs;
84 struct slic_stat_desc *stat;
87 descs = stq->descs[active];
88 stat = &descs[stq->done_idx];
91 return SLIC_INVALID_STAT_DESC_IDX;
93 idx = (le32_to_cpu(stat->hnd) & 0xffff) - 1;
98 stq->done_idx = slic_next_queue_idx(stq->done_idx, stq->len);
99 /* check for wraparound */
100 if (!stq->done_idx) {
101 dma_addr_t paddr = stq->paddr[active];
103 slic_write(sdev, SLIC_REG_RBAR, lower_32_bits(paddr) |
105 /* make sure new status descriptors are immediately available */
106 slic_flush_write(sdev);
108 active &= (SLIC_NUM_STAT_DESC_ARRAYS - 1);
109 stq->active_array = active;
114 static unsigned int slic_get_free_tx_descs(struct slic_tx_queue *txq)
116 /* ensure tail idx is updated */
118 return slic_get_free_queue_descs(txq->put_idx, txq->done_idx, txq->len);
121 static unsigned int slic_get_free_rx_descs(struct slic_rx_queue *rxq)
123 return slic_get_free_queue_descs(rxq->put_idx, rxq->done_idx, rxq->len);
126 static void slic_clear_upr_list(struct slic_upr_list *upr_list)
128 struct slic_upr *upr;
129 struct slic_upr *tmp;
131 spin_lock_bh(&upr_list->lock);
132 list_for_each_entry_safe(upr, tmp, &upr_list->list, list) {
133 list_del(&upr->list);
136 upr_list->pending = false;
137 spin_unlock_bh(&upr_list->lock);
140 static void slic_start_upr(struct slic_device *sdev, struct slic_upr *upr)
144 reg = (upr->type == SLIC_UPR_CONFIG) ? SLIC_REG_RCONFIG :
146 slic_write(sdev, reg, lower_32_bits(upr->paddr));
147 slic_flush_write(sdev);
150 static void slic_queue_upr(struct slic_device *sdev, struct slic_upr *upr)
152 struct slic_upr_list *upr_list = &sdev->upr_list;
155 spin_lock_bh(&upr_list->lock);
156 pending = upr_list->pending;
157 INIT_LIST_HEAD(&upr->list);
158 list_add_tail(&upr->list, &upr_list->list);
159 upr_list->pending = true;
160 spin_unlock_bh(&upr_list->lock);
163 slic_start_upr(sdev, upr);
166 static struct slic_upr *slic_dequeue_upr(struct slic_device *sdev)
168 struct slic_upr_list *upr_list = &sdev->upr_list;
169 struct slic_upr *next_upr = NULL;
170 struct slic_upr *upr = NULL;
172 spin_lock_bh(&upr_list->lock);
173 if (!list_empty(&upr_list->list)) {
174 upr = list_first_entry(&upr_list->list, struct slic_upr, list);
175 list_del(&upr->list);
177 if (list_empty(&upr_list->list))
178 upr_list->pending = false;
180 next_upr = list_first_entry(&upr_list->list,
181 struct slic_upr, list);
183 spin_unlock_bh(&upr_list->lock);
184 /* trigger processing of the next upr in list */
186 slic_start_upr(sdev, next_upr);
191 static int slic_new_upr(struct slic_device *sdev, unsigned int type,
194 struct slic_upr *upr;
196 upr = kmalloc(sizeof(*upr), GFP_ATOMIC);
202 slic_queue_upr(sdev, upr);
207 static void slic_set_mcast_bit(u64 *mcmask, unsigned char const *addr)
211 /* Get the CRC polynomial for the mac address: we use bits 1-8 (lsb),
212 * bitwise reversed, msb (= lsb bit 0 before bitrev) is automatically
215 crc = ether_crc(ETH_ALEN, addr) >> 23;
216 /* we only have space on the SLIC for 64 entries */
218 mask |= (u64)1 << crc;
222 /* must be called with link_lock held */
223 static void slic_configure_rcv(struct slic_device *sdev)
227 val = SLIC_GRCR_RESET | SLIC_GRCR_ADDRAEN | SLIC_GRCR_RCVEN |
228 SLIC_GRCR_HASHSIZE << SLIC_GRCR_HASHSIZE_SHIFT | SLIC_GRCR_RCVBAD;
230 if (sdev->duplex == DUPLEX_FULL)
231 val |= SLIC_GRCR_CTLEN;
234 val |= SLIC_GRCR_RCVALL;
236 slic_write(sdev, SLIC_REG_WRCFG, val);
239 /* must be called with link_lock held */
240 static void slic_configure_xmt(struct slic_device *sdev)
244 val = SLIC_GXCR_RESET | SLIC_GXCR_XMTEN;
246 if (sdev->duplex == DUPLEX_FULL)
247 val |= SLIC_GXCR_PAUSEEN;
249 slic_write(sdev, SLIC_REG_WXCFG, val);
252 /* must be called with link_lock held */
253 static void slic_configure_mac(struct slic_device *sdev)
257 if (sdev->speed == SPEED_1000) {
258 val = SLIC_GMCR_GAPBB_1000 << SLIC_GMCR_GAPBB_SHIFT |
259 SLIC_GMCR_GAPR1_1000 << SLIC_GMCR_GAPR1_SHIFT |
260 SLIC_GMCR_GAPR2_1000 << SLIC_GMCR_GAPR2_SHIFT |
261 SLIC_GMCR_GBIT; /* enable GMII */
263 val = SLIC_GMCR_GAPBB_100 << SLIC_GMCR_GAPBB_SHIFT |
264 SLIC_GMCR_GAPR1_100 << SLIC_GMCR_GAPR1_SHIFT |
265 SLIC_GMCR_GAPR2_100 << SLIC_GMCR_GAPR2_SHIFT;
268 if (sdev->duplex == DUPLEX_FULL)
269 val |= SLIC_GMCR_FULLD;
271 slic_write(sdev, SLIC_REG_WMCFG, val);
274 static void slic_configure_link_locked(struct slic_device *sdev, int speed,
277 struct net_device *dev = sdev->netdev;
279 if (sdev->speed == speed && sdev->duplex == duplex)
283 sdev->duplex = duplex;
285 if (sdev->speed == SPEED_UNKNOWN) {
286 if (netif_carrier_ok(dev))
287 netif_carrier_off(dev);
289 /* (re)configure link settings */
290 slic_configure_mac(sdev);
291 slic_configure_xmt(sdev);
292 slic_configure_rcv(sdev);
293 slic_flush_write(sdev);
295 if (!netif_carrier_ok(dev))
296 netif_carrier_on(dev);
300 static void slic_configure_link(struct slic_device *sdev, int speed,
303 spin_lock_bh(&sdev->link_lock);
304 slic_configure_link_locked(sdev, speed, duplex);
305 spin_unlock_bh(&sdev->link_lock);
308 static void slic_set_rx_mode(struct net_device *dev)
310 struct slic_device *sdev = netdev_priv(dev);
311 struct netdev_hw_addr *hwaddr;
315 if (dev->flags & (IFF_PROMISC | IFF_ALLMULTI)) {
316 /* Turn on all multicast addresses. We have to do this for
317 * promiscuous mode as well as ALLMCAST mode (it saves the
318 * microcode from having to keep state about the MAC
325 netdev_for_each_mc_addr(hwaddr, dev) {
326 slic_set_mcast_bit(&mcmask, hwaddr->addr);
330 slic_write(sdev, SLIC_REG_MCASTLOW, lower_32_bits(mcmask));
331 slic_write(sdev, SLIC_REG_MCASTHIGH, upper_32_bits(mcmask));
333 set_promisc = !!(dev->flags & IFF_PROMISC);
335 spin_lock_bh(&sdev->link_lock);
336 if (sdev->promisc != set_promisc) {
337 sdev->promisc = set_promisc;
338 slic_configure_rcv(sdev);
340 spin_unlock_bh(&sdev->link_lock);
343 static void slic_xmit_complete(struct slic_device *sdev)
345 struct slic_tx_queue *txq = &sdev->txq;
346 struct net_device *dev = sdev->netdev;
347 struct slic_tx_buffer *buff;
348 unsigned int frames = 0;
349 unsigned int bytes = 0;
352 /* Limit processing to SLIC_MAX_TX_COMPLETIONS frames to avoid that new
353 * completions during processing keeps the loop running endlessly.
356 idx = slic_next_compl_idx(sdev);
357 if (idx == SLIC_INVALID_STAT_DESC_IDX)
361 buff = &txq->txbuffs[idx];
363 if (unlikely(!buff->skb)) {
365 "no skb found for desc idx %i\n", idx);
368 dma_unmap_single(&sdev->pdev->dev,
369 dma_unmap_addr(buff, map_addr),
370 dma_unmap_len(buff, map_len), DMA_TO_DEVICE);
372 bytes += buff->skb->len;
375 dev_kfree_skb_any(buff->skb);
377 } while (frames < SLIC_MAX_TX_COMPLETIONS);
378 /* make sure xmit sees the new value for done_idx */
381 u64_stats_update_begin(&sdev->stats.syncp);
382 sdev->stats.tx_bytes += bytes;
383 sdev->stats.tx_packets += frames;
384 u64_stats_update_end(&sdev->stats.syncp);
387 if (netif_queue_stopped(dev) &&
388 (slic_get_free_tx_descs(txq) >= SLIC_MIN_TX_WAKEUP_DESCS))
389 netif_wake_queue(dev);
390 netif_tx_unlock(dev);
393 static void slic_refill_rx_queue(struct slic_device *sdev, gfp_t gfp)
395 const unsigned int ALIGN_MASK = SLIC_RX_BUFF_ALIGN - 1;
396 unsigned int maplen = SLIC_RX_BUFF_SIZE;
397 struct slic_rx_queue *rxq = &sdev->rxq;
398 struct net_device *dev = sdev->netdev;
399 struct slic_rx_buffer *buff;
400 struct slic_rx_desc *desc;
401 unsigned int misalign;
406 while (slic_get_free_rx_descs(rxq) > SLIC_MAX_REQ_RX_DESCS) {
407 skb = alloc_skb(maplen + ALIGN_MASK, gfp);
411 paddr = dma_map_single(&sdev->pdev->dev, skb->data, maplen,
413 if (dma_mapping_error(&sdev->pdev->dev, paddr)) {
414 netdev_err(dev, "mapping rx packet failed\n");
416 dev_kfree_skb_any(skb);
419 /* ensure head buffer descriptors are 256 byte aligned */
421 misalign = paddr & ALIGN_MASK;
423 offset = SLIC_RX_BUFF_ALIGN - misalign;
424 skb_reserve(skb, offset);
426 /* the HW expects dma chunks for descriptor + frame data */
427 desc = (struct slic_rx_desc *)skb->data;
428 /* temporarily sync descriptor for CPU to clear status */
429 dma_sync_single_for_cpu(&sdev->pdev->dev, paddr,
430 offset + sizeof(*desc),
433 /* return it to HW again */
434 dma_sync_single_for_device(&sdev->pdev->dev, paddr,
435 offset + sizeof(*desc),
438 buff = &rxq->rxbuffs[rxq->put_idx];
440 dma_unmap_addr_set(buff, map_addr, paddr);
441 dma_unmap_len_set(buff, map_len, maplen);
442 buff->addr_offset = offset;
443 /* complete write to descriptor before it is handed to HW */
445 /* head buffer descriptors are placed immediately before skb */
446 slic_write(sdev, SLIC_REG_HBAR, lower_32_bits(paddr) + offset);
447 rxq->put_idx = slic_next_queue_idx(rxq->put_idx, rxq->len);
451 static void slic_handle_frame_error(struct slic_device *sdev,
454 struct slic_stats *stats = &sdev->stats;
456 if (sdev->model == SLIC_MODEL_OASIS) {
457 struct slic_rx_info_oasis *info;
461 info = (struct slic_rx_info_oasis *)skb->data;
462 status = le32_to_cpu(info->frame_status);
463 status_b = le32_to_cpu(info->frame_status_b);
464 /* transport layer */
465 if (status_b & SLIC_VRHSTATB_TPCSUM)
466 SLIC_INC_STATS_COUNTER(stats, rx_tpcsum);
467 if (status & SLIC_VRHSTAT_TPOFLO)
468 SLIC_INC_STATS_COUNTER(stats, rx_tpoflow);
469 if (status_b & SLIC_VRHSTATB_TPHLEN)
470 SLIC_INC_STATS_COUNTER(stats, rx_tphlen);
472 if (status_b & SLIC_VRHSTATB_IPCSUM)
473 SLIC_INC_STATS_COUNTER(stats, rx_ipcsum);
474 if (status_b & SLIC_VRHSTATB_IPLERR)
475 SLIC_INC_STATS_COUNTER(stats, rx_iplen);
476 if (status_b & SLIC_VRHSTATB_IPHERR)
477 SLIC_INC_STATS_COUNTER(stats, rx_iphlen);
479 if (status_b & SLIC_VRHSTATB_RCVE)
480 SLIC_INC_STATS_COUNTER(stats, rx_early);
481 if (status_b & SLIC_VRHSTATB_BUFF)
482 SLIC_INC_STATS_COUNTER(stats, rx_buffoflow);
483 if (status_b & SLIC_VRHSTATB_CODE)
484 SLIC_INC_STATS_COUNTER(stats, rx_lcode);
485 if (status_b & SLIC_VRHSTATB_DRBL)
486 SLIC_INC_STATS_COUNTER(stats, rx_drbl);
487 if (status_b & SLIC_VRHSTATB_CRC)
488 SLIC_INC_STATS_COUNTER(stats, rx_crc);
489 if (status & SLIC_VRHSTAT_802OE)
490 SLIC_INC_STATS_COUNTER(stats, rx_oflow802);
491 if (status_b & SLIC_VRHSTATB_802UE)
492 SLIC_INC_STATS_COUNTER(stats, rx_uflow802);
493 if (status_b & SLIC_VRHSTATB_CARRE)
494 SLIC_INC_STATS_COUNTER(stats, tx_carrier);
495 } else { /* mojave */
496 struct slic_rx_info_mojave *info;
499 info = (struct slic_rx_info_mojave *)skb->data;
500 status = le32_to_cpu(info->frame_status);
501 /* transport layer */
502 if (status & SLIC_VGBSTAT_XPERR) {
503 u32 xerr = status >> SLIC_VGBSTAT_XERRSHFT;
505 if (xerr == SLIC_VGBSTAT_XCSERR)
506 SLIC_INC_STATS_COUNTER(stats, rx_tpcsum);
507 if (xerr == SLIC_VGBSTAT_XUFLOW)
508 SLIC_INC_STATS_COUNTER(stats, rx_tpoflow);
509 if (xerr == SLIC_VGBSTAT_XHLEN)
510 SLIC_INC_STATS_COUNTER(stats, rx_tphlen);
513 if (status & SLIC_VGBSTAT_NETERR) {
514 u32 nerr = status >> SLIC_VGBSTAT_NERRSHFT &
515 SLIC_VGBSTAT_NERRMSK;
517 if (nerr == SLIC_VGBSTAT_NCSERR)
518 SLIC_INC_STATS_COUNTER(stats, rx_ipcsum);
519 if (nerr == SLIC_VGBSTAT_NUFLOW)
520 SLIC_INC_STATS_COUNTER(stats, rx_iplen);
521 if (nerr == SLIC_VGBSTAT_NHLEN)
522 SLIC_INC_STATS_COUNTER(stats, rx_iphlen);
525 if (status & SLIC_VGBSTAT_LNKERR) {
526 u32 lerr = status & SLIC_VGBSTAT_LERRMSK;
528 if (lerr == SLIC_VGBSTAT_LDEARLY)
529 SLIC_INC_STATS_COUNTER(stats, rx_early);
530 if (lerr == SLIC_VGBSTAT_LBOFLO)
531 SLIC_INC_STATS_COUNTER(stats, rx_buffoflow);
532 if (lerr == SLIC_VGBSTAT_LCODERR)
533 SLIC_INC_STATS_COUNTER(stats, rx_lcode);
534 if (lerr == SLIC_VGBSTAT_LDBLNBL)
535 SLIC_INC_STATS_COUNTER(stats, rx_drbl);
536 if (lerr == SLIC_VGBSTAT_LCRCERR)
537 SLIC_INC_STATS_COUNTER(stats, rx_crc);
538 if (lerr == SLIC_VGBSTAT_LOFLO)
539 SLIC_INC_STATS_COUNTER(stats, rx_oflow802);
540 if (lerr == SLIC_VGBSTAT_LUFLO)
541 SLIC_INC_STATS_COUNTER(stats, rx_uflow802);
544 SLIC_INC_STATS_COUNTER(stats, rx_errors);
547 static void slic_handle_receive(struct slic_device *sdev, unsigned int todo,
550 struct slic_rx_queue *rxq = &sdev->rxq;
551 struct net_device *dev = sdev->netdev;
552 struct slic_rx_buffer *buff;
553 struct slic_rx_desc *desc;
554 unsigned int frames = 0;
555 unsigned int bytes = 0;
560 while (todo && (rxq->done_idx != rxq->put_idx)) {
561 buff = &rxq->rxbuffs[rxq->done_idx];
567 desc = (struct slic_rx_desc *)skb->data;
569 dma_sync_single_for_cpu(&sdev->pdev->dev,
570 dma_unmap_addr(buff, map_addr),
571 buff->addr_offset + sizeof(*desc),
574 status = le32_to_cpu(desc->status);
575 if (!(status & SLIC_IRHDDR_SVALID)) {
576 dma_sync_single_for_device(&sdev->pdev->dev,
587 dma_unmap_single(&sdev->pdev->dev,
588 dma_unmap_addr(buff, map_addr),
589 dma_unmap_len(buff, map_len),
592 /* skip rx descriptor that is placed before the frame data */
593 skb_reserve(skb, SLIC_RX_BUFF_HDR_SIZE);
595 if (unlikely(status & SLIC_IRHDDR_ERR)) {
596 slic_handle_frame_error(sdev, skb);
597 dev_kfree_skb_any(skb);
599 struct ethhdr *eh = (struct ethhdr *)skb->data;
601 if (is_multicast_ether_addr(eh->h_dest))
602 SLIC_INC_STATS_COUNTER(&sdev->stats, rx_mcasts);
604 len = le32_to_cpu(desc->length) & SLIC_IRHDDR_FLEN_MSK;
606 skb->protocol = eth_type_trans(skb, dev);
607 skb->ip_summed = CHECKSUM_UNNECESSARY;
609 napi_gro_receive(&sdev->napi, skb);
614 rxq->done_idx = slic_next_queue_idx(rxq->done_idx, rxq->len);
618 u64_stats_update_begin(&sdev->stats.syncp);
619 sdev->stats.rx_bytes += bytes;
620 sdev->stats.rx_packets += frames;
621 u64_stats_update_end(&sdev->stats.syncp);
623 slic_refill_rx_queue(sdev, GFP_ATOMIC);
626 static void slic_handle_link_irq(struct slic_device *sdev)
628 struct slic_shmem *sm = &sdev->shmem;
629 struct slic_shmem_data *sm_data = sm->shmem_data;
634 link = le32_to_cpu(sm_data->link);
636 if (link & SLIC_GIG_LINKUP) {
637 if (link & SLIC_GIG_SPEED_1000)
639 else if (link & SLIC_GIG_SPEED_100)
644 duplex = (link & SLIC_GIG_FULLDUPLEX) ? DUPLEX_FULL :
647 duplex = DUPLEX_UNKNOWN;
648 speed = SPEED_UNKNOWN;
650 slic_configure_link(sdev, speed, duplex);
653 static void slic_handle_upr_irq(struct slic_device *sdev, u32 irqs)
655 struct slic_upr *upr;
657 /* remove upr that caused this irq (always the first entry in list) */
658 upr = slic_dequeue_upr(sdev);
660 netdev_warn(sdev->netdev, "no upr found on list\n");
664 if (upr->type == SLIC_UPR_LSTAT) {
665 if (unlikely(irqs & SLIC_ISR_UPCERR_MASK)) {
667 slic_queue_upr(sdev, upr);
670 slic_handle_link_irq(sdev);
675 static int slic_handle_link_change(struct slic_device *sdev)
677 return slic_new_upr(sdev, SLIC_UPR_LSTAT, sdev->shmem.link_paddr);
680 static void slic_handle_err_irq(struct slic_device *sdev, u32 isr)
682 struct slic_stats *stats = &sdev->stats;
684 if (isr & SLIC_ISR_RMISS)
685 SLIC_INC_STATS_COUNTER(stats, rx_buff_miss);
686 if (isr & SLIC_ISR_XDROP)
687 SLIC_INC_STATS_COUNTER(stats, tx_dropped);
688 if (!(isr & (SLIC_ISR_RMISS | SLIC_ISR_XDROP)))
689 SLIC_INC_STATS_COUNTER(stats, irq_errs);
692 static void slic_handle_irq(struct slic_device *sdev, u32 isr,
693 unsigned int todo, unsigned int *done)
695 if (isr & SLIC_ISR_ERR)
696 slic_handle_err_irq(sdev, isr);
698 if (isr & SLIC_ISR_LEVENT)
699 slic_handle_link_change(sdev);
701 if (isr & SLIC_ISR_UPC_MASK)
702 slic_handle_upr_irq(sdev, isr);
704 if (isr & SLIC_ISR_RCV)
705 slic_handle_receive(sdev, todo, done);
707 if (isr & SLIC_ISR_CMD)
708 slic_xmit_complete(sdev);
711 static int slic_poll(struct napi_struct *napi, int todo)
713 struct slic_device *sdev = container_of(napi, struct slic_device, napi);
714 struct slic_shmem *sm = &sdev->shmem;
715 struct slic_shmem_data *sm_data = sm->shmem_data;
716 u32 isr = le32_to_cpu(sm_data->isr);
719 slic_handle_irq(sdev, isr, todo, &done);
722 napi_complete_done(napi, done);
725 /* make sure sm_data->isr is cleard before irqs are reenabled */
727 slic_write(sdev, SLIC_REG_ISR, 0);
728 slic_flush_write(sdev);
734 static irqreturn_t slic_irq(int irq, void *dev_id)
736 struct slic_device *sdev = dev_id;
737 struct slic_shmem *sm = &sdev->shmem;
738 struct slic_shmem_data *sm_data = sm->shmem_data;
740 slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_MASK);
741 slic_flush_write(sdev);
742 /* make sure sm_data->isr is read after ICR_INT_MASK is set */
747 /* spurious interrupt */
748 slic_write(sdev, SLIC_REG_ISR, 0);
749 slic_flush_write(sdev);
753 napi_schedule_irqoff(&sdev->napi);
758 static void slic_card_reset(struct slic_device *sdev)
762 slic_write(sdev, SLIC_REG_RESET, SLIC_RESET_MAGIC);
763 /* flush write by means of config space */
764 pci_read_config_word(sdev->pdev, PCI_COMMAND, &cmd);
768 static int slic_init_stat_queue(struct slic_device *sdev)
770 const unsigned int DESC_ALIGN_MASK = SLIC_STATS_DESC_ALIGN - 1;
771 struct slic_stat_queue *stq = &sdev->stq;
772 struct slic_stat_desc *descs;
773 unsigned int misalign;
780 stq->len = SLIC_NUM_STAT_DESCS;
781 stq->active_array = 0;
784 size = stq->len * sizeof(*descs) + DESC_ALIGN_MASK;
786 for (i = 0; i < SLIC_NUM_STAT_DESC_ARRAYS; i++) {
787 descs = dma_alloc_coherent(&sdev->pdev->dev, size, &paddr,
790 netdev_err(sdev->netdev,
791 "failed to allocate status descriptors\n");
795 /* ensure correct alignment */
797 misalign = paddr & DESC_ALIGN_MASK;
799 offset = SLIC_STATS_DESC_ALIGN - misalign;
804 slic_write(sdev, SLIC_REG_RBAR, lower_32_bits(paddr) |
806 stq->descs[i] = descs;
807 stq->paddr[i] = paddr;
808 stq->addr_offset[i] = offset;
811 stq->mem_size = size;
817 dma_free_coherent(&sdev->pdev->dev, stq->mem_size,
818 stq->descs[i] - stq->addr_offset[i],
819 stq->paddr[i] - stq->addr_offset[i]);
825 static void slic_free_stat_queue(struct slic_device *sdev)
827 struct slic_stat_queue *stq = &sdev->stq;
830 for (i = 0; i < SLIC_NUM_STAT_DESC_ARRAYS; i++) {
831 dma_free_coherent(&sdev->pdev->dev, stq->mem_size,
832 stq->descs[i] - stq->addr_offset[i],
833 stq->paddr[i] - stq->addr_offset[i]);
837 static int slic_init_tx_queue(struct slic_device *sdev)
839 struct slic_tx_queue *txq = &sdev->txq;
840 struct slic_tx_buffer *buff;
841 struct slic_tx_desc *desc;
845 txq->len = SLIC_NUM_TX_DESCS;
849 txq->txbuffs = kcalloc(txq->len, sizeof(*buff), GFP_KERNEL);
853 txq->dma_pool = dma_pool_create("slic_pool", &sdev->pdev->dev,
854 sizeof(*desc), SLIC_TX_DESC_ALIGN,
856 if (!txq->dma_pool) {
858 netdev_err(sdev->netdev, "failed to create dma pool\n");
862 for (i = 0; i < txq->len; i++) {
863 buff = &txq->txbuffs[i];
864 desc = dma_pool_zalloc(txq->dma_pool, GFP_KERNEL,
867 netdev_err(sdev->netdev,
868 "failed to alloc pool chunk (%i)\n", i);
873 desc->hnd = cpu_to_le32((u32)(i + 1));
874 desc->cmd = SLIC_CMD_XMT_REQ;
876 desc->type = cpu_to_le32(SLIC_CMD_TYPE_DUMB);
884 buff = &txq->txbuffs[i];
885 dma_pool_free(txq->dma_pool, buff->desc, buff->desc_paddr);
887 dma_pool_destroy(txq->dma_pool);
895 static void slic_free_tx_queue(struct slic_device *sdev)
897 struct slic_tx_queue *txq = &sdev->txq;
898 struct slic_tx_buffer *buff;
901 for (i = 0; i < txq->len; i++) {
902 buff = &txq->txbuffs[i];
903 dma_pool_free(txq->dma_pool, buff->desc, buff->desc_paddr);
907 dma_unmap_single(&sdev->pdev->dev,
908 dma_unmap_addr(buff, map_addr),
909 dma_unmap_len(buff, map_len), DMA_TO_DEVICE);
910 consume_skb(buff->skb);
912 dma_pool_destroy(txq->dma_pool);
917 static int slic_init_rx_queue(struct slic_device *sdev)
919 struct slic_rx_queue *rxq = &sdev->rxq;
920 struct slic_rx_buffer *buff;
922 rxq->len = SLIC_NUM_RX_LES;
926 buff = kcalloc(rxq->len, sizeof(*buff), GFP_KERNEL);
931 slic_refill_rx_queue(sdev, GFP_KERNEL);
936 static void slic_free_rx_queue(struct slic_device *sdev)
938 struct slic_rx_queue *rxq = &sdev->rxq;
939 struct slic_rx_buffer *buff;
942 /* free rx buffers */
943 for (i = 0; i < rxq->len; i++) {
944 buff = &rxq->rxbuffs[i];
949 dma_unmap_single(&sdev->pdev->dev,
950 dma_unmap_addr(buff, map_addr),
951 dma_unmap_len(buff, map_len),
953 consume_skb(buff->skb);
958 static void slic_set_link_autoneg(struct slic_device *sdev)
960 unsigned int subid = sdev->pdev->subsystem_device;
963 if (sdev->is_fiber) {
964 /* We've got a fiber gigabit interface, and register 4 is
965 * different in fiber mode than in copper mode.
967 /* advertise FD only @1000 Mb */
968 val = MII_ADVERTISE << 16 | ADVERTISE_1000XFULL |
969 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM;
970 /* enable PAUSE frames */
971 slic_write(sdev, SLIC_REG_WPHY, val);
972 /* reset phy, enable auto-neg */
973 val = MII_BMCR << 16 | BMCR_RESET | BMCR_ANENABLE |
975 slic_write(sdev, SLIC_REG_WPHY, val);
976 } else { /* copper gigabit */
977 /* We've got a copper gigabit interface, and register 4 is
978 * different in copper mode than in fiber mode.
980 /* advertise 10/100 Mb modes */
981 val = MII_ADVERTISE << 16 | ADVERTISE_100FULL |
982 ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF;
983 /* enable PAUSE frames */
984 val |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
985 /* required by the Cicada PHY */
986 val |= ADVERTISE_CSMA;
987 slic_write(sdev, SLIC_REG_WPHY, val);
989 /* advertise FD only @1000 Mb */
990 val = MII_CTRL1000 << 16 | ADVERTISE_1000FULL;
991 slic_write(sdev, SLIC_REG_WPHY, val);
993 if (subid != PCI_SUBDEVICE_ID_ALACRITECH_CICADA) {
994 /* if a Marvell PHY enable auto crossover */
995 val = SLIC_MIICR_REG_16 | SLIC_MRV_REG16_XOVERON;
996 slic_write(sdev, SLIC_REG_WPHY, val);
998 /* reset phy, enable auto-neg */
999 val = MII_BMCR << 16 | BMCR_RESET | BMCR_ANENABLE |
1001 slic_write(sdev, SLIC_REG_WPHY, val);
1003 /* enable and restart auto-neg (don't reset) */
1004 val = MII_BMCR << 16 | BMCR_ANENABLE | BMCR_ANRESTART;
1005 slic_write(sdev, SLIC_REG_WPHY, val);
1010 static void slic_set_mac_address(struct slic_device *sdev)
1012 u8 *addr = sdev->netdev->dev_addr;
1015 val = addr[5] | addr[4] << 8 | addr[3] << 16 | addr[2] << 24;
1017 slic_write(sdev, SLIC_REG_WRADDRAL, val);
1018 slic_write(sdev, SLIC_REG_WRADDRBL, val);
1020 val = addr[0] << 8 | addr[1];
1022 slic_write(sdev, SLIC_REG_WRADDRAH, val);
1023 slic_write(sdev, SLIC_REG_WRADDRBH, val);
1024 slic_flush_write(sdev);
1027 static u32 slic_read_dword_from_firmware(const struct firmware *fw, int *offset)
1032 memcpy(&val, fw->data + *offset, sizeof(val));
1036 return le32_to_cpu(val);
1041 static int slic_load_rcvseq_firmware(struct slic_device *sdev)
1043 const struct firmware *fw;
1051 file = (sdev->model == SLIC_MODEL_OASIS) ? SLIC_RCV_FIRMWARE_OASIS :
1052 SLIC_RCV_FIRMWARE_MOJAVE;
1053 err = reject_firmware(&fw, file, &sdev->pdev->dev);
1055 dev_err(&sdev->pdev->dev,
1056 "failed to load receive sequencer firmware %s\n", file);
1059 /* Do an initial sanity check concerning firmware size now. A further
1060 * check follows below.
1062 if (fw->size < SLIC_FIRMWARE_MIN_SIZE) {
1063 dev_err(&sdev->pdev->dev,
1064 "invalid firmware size %zu (min %u expected)\n",
1065 fw->size, SLIC_FIRMWARE_MIN_SIZE);
1070 codelen = slic_read_dword_from_firmware(fw, &idx);
1072 /* do another sanity check against firmware size */
1073 if ((codelen + 4) > fw->size) {
1074 dev_err(&sdev->pdev->dev,
1075 "invalid rcv-sequencer firmware size %zu\n", fw->size);
1080 /* download sequencer code to card */
1081 slic_write(sdev, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN);
1082 for (addr = 0; addr < codelen; addr++) {
1084 /* write out instruction address */
1085 slic_write(sdev, SLIC_REG_RCV_WCS, addr);
1087 instr = slic_read_dword_from_firmware(fw, &idx);
1088 /* write out the instruction data low addr */
1089 slic_write(sdev, SLIC_REG_RCV_WCS, instr);
1091 val = (__le32)fw->data[idx];
1092 instr = le32_to_cpu(val);
1094 /* write out the instruction data high addr */
1095 slic_write(sdev, SLIC_REG_RCV_WCS, instr);
1097 /* finish download */
1098 slic_write(sdev, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH);
1099 slic_flush_write(sdev);
1101 release_firmware(fw);
1108 static int slic_load_firmware(struct slic_device *sdev)
1110 u32 sectstart[SLIC_FIRMWARE_MAX_SECTIONS];
1111 u32 sectsize[SLIC_FIRMWARE_MAX_SECTIONS];
1112 const struct firmware *fw;
1113 unsigned int datalen;
1125 file = (sdev->model == SLIC_MODEL_OASIS) ? SLIC_FIRMWARE_OASIS :
1126 SLIC_FIRMWARE_MOJAVE;
1127 err = reject_firmware(&fw, file, &sdev->pdev->dev);
1129 dev_err(&sdev->pdev->dev, "failed to load firmware %s\n", file);
1132 /* Do an initial sanity check concerning firmware size now. A further
1133 * check follows below.
1135 if (fw->size < SLIC_FIRMWARE_MIN_SIZE) {
1136 dev_err(&sdev->pdev->dev,
1137 "invalid firmware size %zu (min is %u)\n", fw->size,
1138 SLIC_FIRMWARE_MIN_SIZE);
1143 numsects = slic_read_dword_from_firmware(fw, &idx);
1144 if (numsects == 0 || numsects > SLIC_FIRMWARE_MAX_SECTIONS) {
1145 dev_err(&sdev->pdev->dev,
1146 "invalid number of sections in firmware: %u", numsects);
1151 datalen = numsects * 8 + 4;
1152 for (i = 0; i < numsects; i++) {
1153 sectsize[i] = slic_read_dword_from_firmware(fw, &idx);
1154 datalen += sectsize[i];
1157 /* do another sanity check against firmware size */
1158 if (datalen > fw->size) {
1159 dev_err(&sdev->pdev->dev,
1160 "invalid firmware size %zu (expected >= %u)\n",
1166 for (i = 0; i < numsects; i++)
1167 sectstart[i] = slic_read_dword_from_firmware(fw, &idx);
1170 instr = slic_read_dword_from_firmware(fw, &idx);
1172 for (sect = 0; sect < numsects; sect++) {
1173 unsigned int ssize = sectsize[sect] >> 3;
1175 base = sectstart[sect];
1177 for (addr = 0; addr < ssize; addr++) {
1178 /* write out instruction address */
1179 slic_write(sdev, SLIC_REG_WCS, base + addr);
1180 /* write out instruction to low addr */
1181 slic_write(sdev, SLIC_REG_WCS, instr);
1182 instr = slic_read_dword_from_firmware(fw, &idx);
1183 /* write out instruction to high addr */
1184 slic_write(sdev, SLIC_REG_WCS, instr);
1185 instr = slic_read_dword_from_firmware(fw, &idx);
1191 for (sect = 0; sect < numsects; sect++) {
1192 unsigned int ssize = sectsize[sect] >> 3;
1194 instr = slic_read_dword_from_firmware(fw, &idx);
1195 base = sectstart[sect];
1199 for (addr = 0; addr < ssize; addr++) {
1200 /* write out instruction address */
1201 slic_write(sdev, SLIC_REG_WCS,
1202 SLIC_WCS_COMPARE | (base + addr));
1203 /* write out instruction to low addr */
1204 slic_write(sdev, SLIC_REG_WCS, instr);
1205 instr = slic_read_dword_from_firmware(fw, &idx);
1206 /* write out instruction to high addr */
1207 slic_write(sdev, SLIC_REG_WCS, instr);
1208 instr = slic_read_dword_from_firmware(fw, &idx);
1211 slic_flush_write(sdev);
1213 /* everything OK, kick off the card */
1214 slic_write(sdev, SLIC_REG_WCS, SLIC_WCS_START);
1215 slic_flush_write(sdev);
1216 /* wait long enough for ucode to init card and reach the mainloop */
1219 release_firmware(fw);
1224 static int slic_init_shmem(struct slic_device *sdev)
1226 struct slic_shmem *sm = &sdev->shmem;
1227 struct slic_shmem_data *sm_data;
1230 sm_data = dma_alloc_coherent(&sdev->pdev->dev, sizeof(*sm_data),
1231 &paddr, GFP_KERNEL);
1233 dev_err(&sdev->pdev->dev, "failed to allocate shared memory\n");
1237 sm->shmem_data = sm_data;
1238 sm->isr_paddr = paddr;
1239 sm->link_paddr = paddr + offsetof(struct slic_shmem_data, link);
1244 static void slic_free_shmem(struct slic_device *sdev)
1246 struct slic_shmem *sm = &sdev->shmem;
1247 struct slic_shmem_data *sm_data = sm->shmem_data;
1249 dma_free_coherent(&sdev->pdev->dev, sizeof(*sm_data), sm_data,
1253 static int slic_init_iface(struct slic_device *sdev)
1255 struct slic_shmem *sm = &sdev->shmem;
1258 sdev->upr_list.pending = false;
1260 err = slic_init_shmem(sdev);
1262 netdev_err(sdev->netdev, "failed to init shared memory\n");
1266 err = slic_load_firmware(sdev);
1268 netdev_err(sdev->netdev, "failed to load firmware\n");
1272 err = slic_load_rcvseq_firmware(sdev);
1274 netdev_err(sdev->netdev,
1275 "failed to load firmware for receive sequencer\n");
1279 slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);
1280 slic_flush_write(sdev);
1283 err = slic_init_rx_queue(sdev);
1285 netdev_err(sdev->netdev, "failed to init rx queue: %u\n", err);
1289 err = slic_init_tx_queue(sdev);
1291 netdev_err(sdev->netdev, "failed to init tx queue: %u\n", err);
1295 err = slic_init_stat_queue(sdev);
1297 netdev_err(sdev->netdev, "failed to init status queue: %u\n",
1302 slic_write(sdev, SLIC_REG_ISP, lower_32_bits(sm->isr_paddr));
1303 napi_enable(&sdev->napi);
1304 /* disable irq mitigation */
1305 slic_write(sdev, SLIC_REG_INTAGG, 0);
1306 slic_write(sdev, SLIC_REG_ISR, 0);
1307 slic_flush_write(sdev);
1309 slic_set_mac_address(sdev);
1311 spin_lock_bh(&sdev->link_lock);
1312 sdev->duplex = DUPLEX_UNKNOWN;
1313 sdev->speed = SPEED_UNKNOWN;
1314 spin_unlock_bh(&sdev->link_lock);
1316 slic_set_link_autoneg(sdev);
1318 err = request_irq(sdev->pdev->irq, slic_irq, IRQF_SHARED, DRV_NAME,
1321 netdev_err(sdev->netdev, "failed to request irq: %u\n", err);
1325 slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_ON);
1326 slic_flush_write(sdev);
1327 /* request initial link status */
1328 err = slic_handle_link_change(sdev);
1330 netdev_warn(sdev->netdev,
1331 "failed to set initial link state: %u\n", err);
1335 napi_disable(&sdev->napi);
1336 slic_free_stat_queue(sdev);
1338 slic_free_tx_queue(sdev);
1340 slic_free_rx_queue(sdev);
1342 slic_free_shmem(sdev);
1343 slic_card_reset(sdev);
1348 static int slic_open(struct net_device *dev)
1350 struct slic_device *sdev = netdev_priv(dev);
1353 netif_carrier_off(dev);
1355 err = slic_init_iface(sdev);
1357 netdev_err(dev, "failed to initialize interface: %i\n", err);
1361 netif_start_queue(dev);
1366 static int slic_close(struct net_device *dev)
1368 struct slic_device *sdev = netdev_priv(dev);
1371 netif_stop_queue(dev);
1373 /* stop irq handling */
1374 napi_disable(&sdev->napi);
1375 slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);
1376 slic_write(sdev, SLIC_REG_ISR, 0);
1377 slic_flush_write(sdev);
1379 free_irq(sdev->pdev->irq, sdev);
1380 /* turn off RCV and XMT and power down PHY */
1381 val = SLIC_GXCR_RESET | SLIC_GXCR_PAUSEEN;
1382 slic_write(sdev, SLIC_REG_WXCFG, val);
1384 val = SLIC_GRCR_RESET | SLIC_GRCR_CTLEN | SLIC_GRCR_ADDRAEN |
1385 SLIC_GRCR_HASHSIZE << SLIC_GRCR_HASHSIZE_SHIFT;
1386 slic_write(sdev, SLIC_REG_WRCFG, val);
1388 val = MII_BMCR << 16 | BMCR_PDOWN;
1389 slic_write(sdev, SLIC_REG_WPHY, val);
1390 slic_flush_write(sdev);
1392 slic_clear_upr_list(&sdev->upr_list);
1393 slic_write(sdev, SLIC_REG_QUIESCE, 0);
1395 slic_free_stat_queue(sdev);
1396 slic_free_tx_queue(sdev);
1397 slic_free_rx_queue(sdev);
1398 slic_free_shmem(sdev);
1400 slic_card_reset(sdev);
1401 netif_carrier_off(dev);
1406 static netdev_tx_t slic_xmit(struct sk_buff *skb, struct net_device *dev)
1408 struct slic_device *sdev = netdev_priv(dev);
1409 struct slic_tx_queue *txq = &sdev->txq;
1410 struct slic_tx_buffer *buff;
1411 struct slic_tx_desc *desc;
1416 if (unlikely(slic_get_free_tx_descs(txq) < SLIC_MAX_REQ_TX_DESCS)) {
1417 netdev_err(dev, "BUG! not enough tx LEs left: %u\n",
1418 slic_get_free_tx_descs(txq));
1419 return NETDEV_TX_BUSY;
1422 maplen = skb_headlen(skb);
1423 paddr = dma_map_single(&sdev->pdev->dev, skb->data, maplen,
1425 if (dma_mapping_error(&sdev->pdev->dev, paddr)) {
1426 netdev_err(dev, "failed to map tx buffer\n");
1430 buff = &txq->txbuffs[txq->put_idx];
1432 dma_unmap_addr_set(buff, map_addr, paddr);
1433 dma_unmap_len_set(buff, map_len, maplen);
1436 desc->totlen = cpu_to_le32(maplen);
1437 desc->paddrl = cpu_to_le32(lower_32_bits(paddr));
1438 desc->paddrh = cpu_to_le32(upper_32_bits(paddr));
1439 desc->len = cpu_to_le32(maplen);
1441 txq->put_idx = slic_next_queue_idx(txq->put_idx, txq->len);
1443 cbar_val = lower_32_bits(buff->desc_paddr) | 1;
1444 /* complete writes to RAM and DMA before hardware is informed */
1447 slic_write(sdev, SLIC_REG_CBAR, cbar_val);
1449 if (slic_get_free_tx_descs(txq) < SLIC_MAX_REQ_TX_DESCS)
1450 netif_stop_queue(dev);
1452 return NETDEV_TX_OK;
1454 dev_kfree_skb_any(skb);
1456 return NETDEV_TX_OK;
1459 static void slic_get_stats(struct net_device *dev,
1460 struct rtnl_link_stats64 *lst)
1462 struct slic_device *sdev = netdev_priv(dev);
1463 struct slic_stats *stats = &sdev->stats;
1465 SLIC_GET_STATS_COUNTER(lst->rx_packets, stats, rx_packets);
1466 SLIC_GET_STATS_COUNTER(lst->tx_packets, stats, tx_packets);
1467 SLIC_GET_STATS_COUNTER(lst->rx_bytes, stats, rx_bytes);
1468 SLIC_GET_STATS_COUNTER(lst->tx_bytes, stats, tx_bytes);
1469 SLIC_GET_STATS_COUNTER(lst->rx_errors, stats, rx_errors);
1470 SLIC_GET_STATS_COUNTER(lst->rx_dropped, stats, rx_buff_miss);
1471 SLIC_GET_STATS_COUNTER(lst->tx_dropped, stats, tx_dropped);
1472 SLIC_GET_STATS_COUNTER(lst->multicast, stats, rx_mcasts);
1473 SLIC_GET_STATS_COUNTER(lst->rx_over_errors, stats, rx_buffoflow);
1474 SLIC_GET_STATS_COUNTER(lst->rx_crc_errors, stats, rx_crc);
1475 SLIC_GET_STATS_COUNTER(lst->rx_fifo_errors, stats, rx_oflow802);
1476 SLIC_GET_STATS_COUNTER(lst->tx_carrier_errors, stats, tx_carrier);
1479 static int slic_get_sset_count(struct net_device *dev, int sset)
1483 return ARRAY_SIZE(slic_stats_strings);
1489 static void slic_get_ethtool_stats(struct net_device *dev,
1490 struct ethtool_stats *eth_stats, u64 *data)
1492 struct slic_device *sdev = netdev_priv(dev);
1493 struct slic_stats *stats = &sdev->stats;
1495 SLIC_GET_STATS_COUNTER(data[0], stats, rx_packets);
1496 SLIC_GET_STATS_COUNTER(data[1], stats, rx_bytes);
1497 SLIC_GET_STATS_COUNTER(data[2], stats, rx_mcasts);
1498 SLIC_GET_STATS_COUNTER(data[3], stats, rx_errors);
1499 SLIC_GET_STATS_COUNTER(data[4], stats, rx_buff_miss);
1500 SLIC_GET_STATS_COUNTER(data[5], stats, rx_tpcsum);
1501 SLIC_GET_STATS_COUNTER(data[6], stats, rx_tpoflow);
1502 SLIC_GET_STATS_COUNTER(data[7], stats, rx_tphlen);
1503 SLIC_GET_STATS_COUNTER(data[8], stats, rx_ipcsum);
1504 SLIC_GET_STATS_COUNTER(data[9], stats, rx_iplen);
1505 SLIC_GET_STATS_COUNTER(data[10], stats, rx_iphlen);
1506 SLIC_GET_STATS_COUNTER(data[11], stats, rx_early);
1507 SLIC_GET_STATS_COUNTER(data[12], stats, rx_buffoflow);
1508 SLIC_GET_STATS_COUNTER(data[13], stats, rx_lcode);
1509 SLIC_GET_STATS_COUNTER(data[14], stats, rx_drbl);
1510 SLIC_GET_STATS_COUNTER(data[15], stats, rx_crc);
1511 SLIC_GET_STATS_COUNTER(data[16], stats, rx_oflow802);
1512 SLIC_GET_STATS_COUNTER(data[17], stats, rx_uflow802);
1513 SLIC_GET_STATS_COUNTER(data[18], stats, tx_packets);
1514 SLIC_GET_STATS_COUNTER(data[19], stats, tx_bytes);
1515 SLIC_GET_STATS_COUNTER(data[20], stats, tx_carrier);
1516 SLIC_GET_STATS_COUNTER(data[21], stats, tx_dropped);
1517 SLIC_GET_STATS_COUNTER(data[22], stats, irq_errs);
1520 static void slic_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1522 if (stringset == ETH_SS_STATS) {
1523 memcpy(data, slic_stats_strings, sizeof(slic_stats_strings));
1524 data += sizeof(slic_stats_strings);
1528 static void slic_get_drvinfo(struct net_device *dev,
1529 struct ethtool_drvinfo *info)
1531 struct slic_device *sdev = netdev_priv(dev);
1533 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1534 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1535 strlcpy(info->bus_info, pci_name(sdev->pdev), sizeof(info->bus_info));
1538 static const struct ethtool_ops slic_ethtool_ops = {
1539 .get_drvinfo = slic_get_drvinfo,
1540 .get_link = ethtool_op_get_link,
1541 .get_strings = slic_get_strings,
1542 .get_ethtool_stats = slic_get_ethtool_stats,
1543 .get_sset_count = slic_get_sset_count,
1546 static const struct net_device_ops slic_netdev_ops = {
1547 .ndo_open = slic_open,
1548 .ndo_stop = slic_close,
1549 .ndo_start_xmit = slic_xmit,
1550 .ndo_set_mac_address = eth_mac_addr,
1551 .ndo_get_stats64 = slic_get_stats,
1552 .ndo_set_rx_mode = slic_set_rx_mode,
1553 .ndo_validate_addr = eth_validate_addr,
1556 static u16 slic_eeprom_csum(unsigned char *eeprom, unsigned int len)
1558 unsigned char *ptr = eeprom;
1563 memcpy(&data, ptr, sizeof(data));
1564 csum += le16_to_cpu(data);
1571 csum = (csum & 0xFFFF) + ((csum >> 16) & 0xFFFF);
1575 /* check eeprom size, magic and checksum */
1576 static bool slic_eeprom_valid(unsigned char *eeprom, unsigned int size)
1578 const unsigned int MAX_SIZE = 128;
1579 const unsigned int MIN_SIZE = 98;
1583 if (size < MIN_SIZE || size > MAX_SIZE)
1585 memcpy(&magic, eeprom, sizeof(magic));
1586 if (le16_to_cpu(magic) != SLIC_EEPROM_MAGIC)
1588 /* cut checksum bytes */
1590 memcpy(&csum, eeprom + size, sizeof(csum));
1592 return (le16_to_cpu(csum) == slic_eeprom_csum(eeprom, size));
1595 static int slic_read_eeprom(struct slic_device *sdev)
1597 unsigned int devfn = PCI_FUNC(sdev->pdev->devfn);
1598 struct slic_shmem *sm = &sdev->shmem;
1599 struct slic_shmem_data *sm_data = sm->shmem_data;
1600 const unsigned int MAX_LOOPS = 5000;
1601 unsigned int codesize;
1602 unsigned char *eeprom;
1603 struct slic_upr *upr;
1609 eeprom = dma_alloc_coherent(&sdev->pdev->dev, SLIC_EEPROM_SIZE,
1610 &paddr, GFP_KERNEL);
1614 slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);
1615 /* setup ISP temporarily */
1616 slic_write(sdev, SLIC_REG_ISP, lower_32_bits(sm->isr_paddr));
1618 err = slic_new_upr(sdev, SLIC_UPR_CONFIG, paddr);
1620 for (i = 0; i < MAX_LOOPS; i++) {
1621 if (le32_to_cpu(sm_data->isr) & SLIC_ISR_UPC)
1625 if (i == MAX_LOOPS) {
1626 dev_err(&sdev->pdev->dev,
1627 "timed out while waiting for eeprom data\n");
1630 upr = slic_dequeue_upr(sdev);
1634 slic_write(sdev, SLIC_REG_ISP, 0);
1635 slic_write(sdev, SLIC_REG_ISR, 0);
1636 slic_flush_write(sdev);
1641 if (sdev->model == SLIC_MODEL_OASIS) {
1642 struct slic_oasis_eeprom *oee;
1644 oee = (struct slic_oasis_eeprom *)eeprom;
1647 codesize = le16_to_cpu(oee->eeprom_code_size);
1649 struct slic_mojave_eeprom *mee;
1651 mee = (struct slic_mojave_eeprom *)eeprom;
1654 codesize = le16_to_cpu(mee->eeprom_code_size);
1657 if (!slic_eeprom_valid(eeprom, codesize)) {
1658 dev_err(&sdev->pdev->dev, "invalid checksum in eeprom\n");
1662 /* set mac address */
1663 ether_addr_copy(sdev->netdev->dev_addr, mac[devfn]);
1665 dma_free_coherent(&sdev->pdev->dev, SLIC_EEPROM_SIZE, eeprom, paddr);
1670 static int slic_init(struct slic_device *sdev)
1674 spin_lock_init(&sdev->upper_lock);
1675 spin_lock_init(&sdev->link_lock);
1676 INIT_LIST_HEAD(&sdev->upr_list.list);
1677 spin_lock_init(&sdev->upr_list.lock);
1678 u64_stats_init(&sdev->stats.syncp);
1680 slic_card_reset(sdev);
1682 err = slic_load_firmware(sdev);
1684 dev_err(&sdev->pdev->dev, "failed to load firmware\n");
1688 /* we need the shared memory to read EEPROM so set it up temporarily */
1689 err = slic_init_shmem(sdev);
1691 dev_err(&sdev->pdev->dev, "failed to init shared memory\n");
1695 err = slic_read_eeprom(sdev);
1697 dev_err(&sdev->pdev->dev, "failed to read eeprom\n");
1701 slic_card_reset(sdev);
1702 slic_free_shmem(sdev);
1706 slic_free_shmem(sdev);
1711 static bool slic_is_fiber(unsigned short subdev)
1715 case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F: /* fallthrough */
1716 case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: /* fallthrough */
1718 case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF: /* fallthrough */
1719 case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF: /* fallthrough */
1720 case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF: /* fallthrough */
1721 case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF: /* fallthrough */
1727 static void slic_configure_pci(struct pci_dev *pdev)
1732 pci_read_config_word(pdev, PCI_COMMAND, &old);
1734 cmd = old | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
1736 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1739 static int slic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1741 struct slic_device *sdev;
1742 struct net_device *dev;
1745 err = pci_enable_device(pdev);
1747 dev_err(&pdev->dev, "failed to enable PCI device\n");
1751 pci_set_master(pdev);
1752 pci_try_set_mwi(pdev);
1754 slic_configure_pci(pdev);
1756 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1758 dev_err(&pdev->dev, "failed to setup DMA\n");
1762 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1764 err = pci_request_regions(pdev, DRV_NAME);
1766 dev_err(&pdev->dev, "failed to obtain PCI regions\n");
1770 dev = alloc_etherdev(sizeof(*sdev));
1772 dev_err(&pdev->dev, "failed to alloc ethernet device\n");
1777 SET_NETDEV_DEV(dev, &pdev->dev);
1778 pci_set_drvdata(pdev, dev);
1779 dev->irq = pdev->irq;
1780 dev->netdev_ops = &slic_netdev_ops;
1781 dev->hw_features = NETIF_F_RXCSUM;
1782 dev->features |= dev->hw_features;
1784 dev->ethtool_ops = &slic_ethtool_ops;
1786 sdev = netdev_priv(dev);
1787 sdev->model = (pdev->device == PCI_DEVICE_ID_ALACRITECH_OASIS) ?
1788 SLIC_MODEL_OASIS : SLIC_MODEL_MOJAVE;
1789 sdev->is_fiber = slic_is_fiber(pdev->subsystem_device);
1792 sdev->regs = ioremap_nocache(pci_resource_start(pdev, 0),
1793 pci_resource_len(pdev, 0));
1795 dev_err(&pdev->dev, "failed to map registers\n");
1800 err = slic_init(sdev);
1802 dev_err(&pdev->dev, "failed to initialize driver\n");
1806 netif_napi_add(dev, &sdev->napi, slic_poll, SLIC_NAPI_WEIGHT);
1807 netif_carrier_off(dev);
1809 err = register_netdev(dev);
1811 dev_err(&pdev->dev, "failed to register net device: %i\n", err);
1818 iounmap(sdev->regs);
1822 pci_release_regions(pdev);
1824 pci_disable_device(pdev);
1829 static void slic_remove(struct pci_dev *pdev)
1831 struct net_device *dev = pci_get_drvdata(pdev);
1832 struct slic_device *sdev = netdev_priv(dev);
1834 unregister_netdev(dev);
1835 iounmap(sdev->regs);
1837 pci_release_regions(pdev);
1838 pci_disable_device(pdev);
1841 static struct pci_driver slic_driver = {
1843 .id_table = slic_id_tbl,
1844 .probe = slic_probe,
1845 .remove = slic_remove,
1848 module_pci_driver(slic_driver);
1850 MODULE_DESCRIPTION("Alacritech non-accelerated SLIC driver");
1851 MODULE_AUTHOR("Lino Sanfilippo <LinoSanfilippo@gmx.de>");
1852 MODULE_LICENSE("GPL");
1853 MODULE_VERSION(DRV_VERSION);