1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell 88e6xxx Ethernet switch PHY and PPU support
5 * Copyright (c) 2008 Marvell Semiconductor
7 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
10 #include <linux/mdio.h>
11 #include <linux/module.h>
16 int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
17 int addr, int reg, u16 *val)
19 return mv88e6xxx_read(chip, addr, reg, val);
22 int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
23 int addr, int reg, u16 val)
25 return mv88e6xxx_write(chip, addr, reg, val);
28 int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)
30 int addr = phy; /* PHY devices addresses start at 0x0 */
33 bus = mv88e6xxx_default_mdio_bus(chip);
37 if (!chip->info->ops->phy_read)
40 return chip->info->ops->phy_read(chip, bus, addr, reg, val);
43 int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)
45 int addr = phy; /* PHY devices addresses start at 0x0 */
48 bus = mv88e6xxx_default_mdio_bus(chip);
52 if (!chip->info->ops->phy_write)
55 return chip->info->ops->phy_write(chip, bus, addr, reg, val);
58 static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)
60 return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
63 static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)
67 /* Restore PHY page Copper 0x0 for access via the registered
70 err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,
71 MV88E6XXX_PHY_PAGE_COPPER);
74 "failed to restore PHY %d page Copper (%d)\n",
79 int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,
80 u8 page, int reg, u16 *val)
84 /* There is no paging for registers 22 */
85 if (reg == MV88E6XXX_PHY_PAGE)
88 err = mv88e6xxx_phy_page_get(chip, phy, page);
90 err = mv88e6xxx_phy_read(chip, phy, reg, val);
91 mv88e6xxx_phy_page_put(chip, phy);
97 int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,
98 u8 page, int reg, u16 val)
102 /* There is no paging for registers 22 */
103 if (reg == MV88E6XXX_PHY_PAGE)
106 err = mv88e6xxx_phy_page_get(chip, phy, page);
108 err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);
110 err = mv88e6xxx_phy_write(chip, phy, reg, val);
112 mv88e6xxx_phy_page_put(chip, phy);
118 static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)
120 if (!chip->info->ops->ppu_disable)
123 return chip->info->ops->ppu_disable(chip);
126 static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)
128 if (!chip->info->ops->ppu_enable)
131 return chip->info->ops->ppu_enable(chip);
134 static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)
136 struct mv88e6xxx_chip *chip;
138 chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);
140 mv88e6xxx_reg_lock(chip);
142 if (mutex_trylock(&chip->ppu_mutex)) {
143 if (mv88e6xxx_phy_ppu_enable(chip) == 0)
144 chip->ppu_disabled = 0;
145 mutex_unlock(&chip->ppu_mutex);
148 mv88e6xxx_reg_unlock(chip);
151 static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)
153 struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);
155 schedule_work(&chip->ppu_work);
158 static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)
162 mutex_lock(&chip->ppu_mutex);
164 /* If the PHY polling unit is enabled, disable it so that
165 * we can access the PHY registers. If it was already
166 * disabled, cancel the timer that is going to re-enable
169 if (!chip->ppu_disabled) {
170 ret = mv88e6xxx_phy_ppu_disable(chip);
172 mutex_unlock(&chip->ppu_mutex);
175 chip->ppu_disabled = 1;
177 del_timer(&chip->ppu_timer);
184 static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)
186 /* Schedule a timer to re-enable the PHY polling unit. */
187 mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10));
188 mutex_unlock(&chip->ppu_mutex);
191 static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)
193 mutex_init(&chip->ppu_mutex);
194 INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work);
195 timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);
198 static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)
200 del_timer_sync(&chip->ppu_timer);
203 int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
204 int addr, int reg, u16 *val)
208 err = mv88e6xxx_phy_ppu_access_get(chip);
210 err = mv88e6xxx_read(chip, addr, reg, val);
211 mv88e6xxx_phy_ppu_access_put(chip);
217 int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,
218 int addr, int reg, u16 val)
222 err = mv88e6xxx_phy_ppu_access_get(chip);
224 err = mv88e6xxx_write(chip, addr, reg, val);
225 mv88e6xxx_phy_ppu_access_put(chip);
231 void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)
233 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
234 mv88e6xxx_phy_ppu_state_init(chip);
237 void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)
239 if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable)
240 mv88e6xxx_phy_ppu_state_destroy(chip);
243 int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)
245 return mv88e6xxx_phy_ppu_enable(chip);