3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <linux/err.h>
27 #include <linux/mtd/st_smi.h>
30 #include <asm/arch/hardware.h>
32 #if !defined(CONFIG_SYS_NO_FLASH)
34 static struct smi_regs *const smicntl =
35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
37 CONFIG_SYS_FLASH_ADDR_BASE;
38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
40 #define ST_M25Pxx_ID 0x00002020
42 static struct flash_dev flash_ids[] = {
43 {0x10, 0x10000, 2}, /* 64K Byte */
44 {0x11, 0x20000, 4}, /* 128K Byte */
45 {0x12, 0x40000, 4}, /* 256K Byte */
46 {0x13, 0x80000, 8}, /* 512K Byte */
47 {0x14, 0x100000, 16}, /* 1M Byte */
48 {0x15, 0x200000, 32}, /* 2M Byte */
49 {0x16, 0x400000, 64}, /* 4M Byte */
50 {0x17, 0x800000, 128}, /* 8M Byte */
51 {0x18, 0x1000000, 64}, /* 16M Byte */
56 * smi_wait_xfer_finish - Wait until TFF is set in status register
57 * @timeout: timeout in milliseconds
59 * Wait until TFF is set in status register
61 static int smi_wait_xfer_finish(int timeout)
64 if (readl(&smicntl->smi_sr) & TFF)
73 * smi_read_id - Read flash id
74 * @info: flash_info structure pointer
75 * @banknum: bank number
77 * Read the flash id present at bank #banknum
79 static unsigned int smi_read_id(flash_info_t *info, int banknum)
83 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
84 writel(READ_ID, &smicntl->smi_tr);
85 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
88 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
91 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
93 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
94 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
100 * flash_get_size - Detect the SMI flash by reading the ID.
101 * @base: Base address of the flash area bank #banknum
102 * @banknum: Bank number
104 * Detect the SMI flash by reading the ID. Initializes the flash_info structure
105 * with size, sector count etc.
107 static ulong flash_get_size(ulong base, int banknum)
109 flash_info_t *info = &flash_info[banknum];
110 struct flash_dev *dev;
112 unsigned int density;
115 value = smi_read_id(info, banknum);
118 printf("Flash id could not be read\n");
122 density = (value >> 16) & 0xff;
124 for (i = 0, dev = &flash_ids[0]; dev->density != 0x0;
125 i++, dev = &flash_ids[i]) {
126 if (dev->density == density) {
127 info->size = dev->size;
128 info->sector_count = dev->sector_count;
133 if (dev->density == 0x0)
136 info->flash_id = value & 0xffff;
137 info->start[0] = base;
143 * smi_read_sr - Read status register of SMI
146 * This routine will get the status register of the flash chip present at the
149 static int smi_read_sr(int bank)
153 /* store the CTRL REG1 state */
154 ctrlreg1 = readl(&smicntl->smi_cr1);
156 /* Program SMI in HW Mode */
157 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
160 /* Performing a RSR instruction in HW mode */
161 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
163 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
166 val = readl(&smicntl->smi_sr);
168 /* Restore the CTRL REG1 state */
169 writel(ctrlreg1, &smicntl->smi_cr1);
175 * smi_wait_till_ready - Wait till last operation is over.
176 * @bank: bank number shifted.
177 * @timeout: timeout in milliseconds.
179 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
180 * The routine checks for #timeout loops, each at interval of 1 milli-second.
181 * If successful the routine returns 0.
183 static int smi_wait_till_ready(int bank, int timeout)
187 /* One chip guarantees max 5 msec wait here after page writes,
188 but potentially three seconds (!) after page erase. */
190 sr = smi_read_sr(bank);
191 if ((sr >= 0) && (!(sr & WIP_BIT)))
194 /* Try again after 1m-sec */
198 printf("SMI controller is still in wait, timeout=%d\n", timeout);
203 * smi_write_enable - Enable the flash to do write operation
206 * Set write enable latch with Write Enable command.
207 * Returns negative if error occurred.
209 static int smi_write_enable(int bank)
212 int timeout = WMODE_TOUT;
215 /* Store the CTRL REG1 state */
216 ctrlreg1 = readl(&smicntl->smi_cr1);
218 /* Program SMI in H/W Mode */
219 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
221 /* Give the Flash, Write Enable command */
222 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
224 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
227 /* Restore the CTRL REG1 state */
228 writel(ctrlreg1, &smicntl->smi_cr1);
231 sr = smi_read_sr(bank);
232 if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT))))
235 /* Try again after 1m-sec */
243 * smi_init - SMI initialization routine
245 * SMI initialization routine. Sets SMI control register1.
249 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
250 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
255 * smi_sector_erase - Erase flash sector
256 * @info: flash_info structure pointer
257 * @sector: sector number
259 * Set write enable latch with Write Enable command.
260 * Returns negative if error occurred.
262 static int smi_sector_erase(flash_info_t *info, unsigned int sector)
265 unsigned int sect_add;
266 unsigned int instruction;
268 switch (info->start[0]) {
285 sect_add = sector * (info->size / info->sector_count);
286 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
288 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
290 if (info->flash_id == ST_M25Pxx_ID) {
291 /* Wait until finished previous write command. */
292 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
295 /* Send write enable, before erase commands. */
296 if (smi_write_enable(bank))
299 /* Put SMI in SW mode */
300 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
302 /* Send Sector Erase command in SW Mode */
303 writel(instruction, &smicntl->smi_tr);
304 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
306 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
309 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
312 /* Put SMI in HW mode */
313 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
318 /* Put SMI in HW mode */
319 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
326 * smi_write - Write to SMI flash
327 * @src_addr: source buffer
328 * @dst_addr: destination buffer
329 * @length: length to write in words
330 * @bank: bank base address
334 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
335 unsigned int length, ulong bank_addr)
356 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
359 /* Set SMI in Hardware Mode */
360 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
362 if (smi_write_enable(banknum))
365 /* Perform the write command */
367 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
368 if (smi_wait_till_ready(banknum,
369 CONFIG_SYS_FLASH_WRITE_TOUT))
372 if (smi_write_enable(banknum))
376 *dst_addr++ = *src_addr++;
378 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
382 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
385 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
391 * write_buff - Write to SMI flash
392 * @info: flash info structure
393 * @src: source buffer
394 * @dest_addr: destination buffer
395 * @length: length to write in words
399 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
401 return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
402 (length + 3) / 4, info->start[0]);
406 * flash_init - SMI flash initialization
408 * SMI flash initialization
410 unsigned long flash_init(void)
412 unsigned long size = 0;
417 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
418 flash_info[i].flash_id = FLASH_UNKNOWN;
419 size += flash_info[i].size = flash_get_size(bank_base[i], i);
422 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
423 for (i = 1; i < flash_info[j].sector_count; i++)
424 flash_info[j].start[i] =
425 flash_info[j].start[i - 1] +
426 flash_info->size / flash_info->sector_count;
434 * flash_print_info - Print SMI flash information
436 * Print SMI flash information
438 void flash_print_info(flash_info_t *info)
441 if (info->flash_id == FLASH_UNKNOWN) {
442 puts("missing or unknown FLASH type\n");
445 printf(" Size: %ld MB in %d Sectors\n",
446 info->size >> 20, info->sector_count);
448 puts(" Sector Start Addresses:");
449 for (i = 0; i < info->sector_count; ++i) {
450 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
456 * Check if whole sector is erased
458 size = (info->size) / (info->sector_count);
459 flash = (u32 *) info->start[i];
460 size = size / sizeof(int);
462 while ((size--) && (*flash++ == ~0))
476 erased ? " E" : " ", info->protect[i] ? "RO " : " ");
481 info->start[i], info->protect[i] ? " (RO) " : " ");
489 * flash_erase - Erase SMI flash
493 int flash_erase(flash_info_t *info, int s_first, int s_last)
499 if (info->flash_id != ST_M25Pxx_ID) {
500 puts("Can't erase unknown flash type - aborted\n");
504 if ((s_first < 0) || (s_first > s_last)) {
505 puts("- no sectors to erase\n");
509 for (sect = s_first; sect <= s_last; ++sect) {
510 if (info->protect[sect])
514 printf("- Warning: %d protected sectors will not be erased!\n",
520 for (sect = s_first; sect <= s_last; sect++) {
521 if (info->protect[sect] == 0) {
522 if (smi_sector_erase(info, sect))