4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * Licensed under the GPL-2 or later.
15 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
22 * struct spi_flash_params - SPI/QSPI flash device params structure
24 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
25 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
26 * @ext_jedec: Device ext_jedec ID
27 * @sector_size: Sector size of this device
28 * @nr_sectors: No.of sectors on this device
30 struct spi_flash_params {
38 static const struct spi_flash_params spi_flash_params_table[] = {
39 #ifdef CONFIG_SPI_FLASH_EON /* EON */
40 {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64},
41 {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256},
43 #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
44 {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128},
45 {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64},
47 #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
48 {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8},
49 {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16},
50 {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32},
51 {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64},
52 {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128},
53 {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256},
54 {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256},
56 #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
57 {"M25P10", 0x202011, 0x0, 32 * 1024, 4},
58 {"M25P20", 0x202012, 0x0, 64 * 1024, 4},
59 {"M25P40", 0x202013, 0x0, 64 * 1024, 8},
60 {"M25P80", 0x202014, 0x0, 64 * 1024, 16},
61 {"M25P16", 0x202015, 0x0, 64 * 1024, 32},
62 {"M25P32", 0x202016, 0x0, 64 * 1024, 64},
63 {"M25P64", 0x202017, 0x0, 64 * 1024, 128},
64 {"M25P128", 0x202018, 0x0, 256 * 1024, 64},
65 {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64},
66 {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64},
67 {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128},
68 {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128},
69 {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256},
70 {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256},
71 {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512},
72 {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512},
73 {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024},
74 {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024},
75 {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048},
76 {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048},
78 #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
79 {"W25P80", 0xef2014, 0x0, 64 * 1024, 16},
80 {"W25P16", 0xef2015, 0x0, 64 * 1024, 32},
81 {"W25P32", 0xef2016, 0x0, 64 * 1024, 64},
82 {"W25X40", 0xef3013, 0x0, 64 * 1024, 8},
83 {"W25X16", 0xef3015, 0x0, 64 * 1024, 32},
84 {"W25X32", 0xef3016, 0x0, 64 * 1024, 64},
85 {"W25X64", 0xef3017, 0x0, 64 * 1024, 128},
86 {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16},
87 {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32},
88 {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64},
89 {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128},
90 {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256},
91 {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512},
92 {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16},
93 {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32},
94 {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64},
95 {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128},
96 {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256},
100 * Below paired flash devices has similar spi_flash_params params.
101 * (W25Q80BL, W25Q80BV)
102 * (W25Q16CL, W25Q16DV)
103 * (W25Q32BV, W25Q32FV_SPI)
104 * (W25Q64CV, W25Q64FV_SPI)
105 * (W25Q128BV, W25Q128FV_SPI)
106 * (W25Q32DW, W25Q32FV_QPI)
107 * (W25Q64DW, W25Q64FV_QPI)
108 * (W25Q128FW, W25Q128FV_QPI)
119 struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
121 const struct spi_flash_params *params;
122 struct spi_flash *flash;
124 u16 jedec = idcode[1] << 8 | idcode[2];
126 /* Get the flash id (jedec = manuf_id + dev_id) */
127 for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
128 params = &spi_flash_params_table[i];
129 if ((params->jedec >> 16) == idcode[0]) {
130 if ((params->jedec & 0xFFFF) == jedec)
135 if (i == ARRAY_SIZE(spi_flash_params_table)) {
136 printf("SF: Unsupported flash ID: manuf %02x, jedec %04x\n",
141 flash = malloc(sizeof(*flash));
143 debug("SF: Failed to allocate spi_flash\n");
146 memset(flash, '\0', sizeof(*flash));
149 flash->name = params->name;
150 flash->poll_cmd = CMD_READ_STATUS;
152 /* Assign spi_flash ops */
153 flash->write = spi_flash_cmd_write_multi;
154 flash->erase = spi_flash_cmd_erase;
155 flash->read = spi_flash_cmd_read_fast;
157 /* Compute the flash size */
158 flash->page_size = 256;
159 flash->sector_size = params->sector_size;
160 flash->size = flash->sector_size * params->nr_sectors;
165 #ifdef CONFIG_SPI_FLASH_BAR
166 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
171 /* discover bank cmds */
173 case SPI_FLASH_SPANSION_IDCODE0:
174 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
175 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
177 case SPI_FLASH_STMICRO_IDCODE0:
178 case SPI_FLASH_WINBOND_IDCODE0:
179 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
180 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
183 printf("SF: Unsupported bank commands %02x\n", idcode0);
187 /* read the bank reg - on which bank the flash is in currently */
188 cmd = flash->bank_read_cmd;
189 if (flash->size > SPI_FLASH_16MB_BOUN) {
190 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
191 debug("SF: fail to read bank addr register\n");
194 flash->bank_curr = curr_bank;
196 flash->bank_curr = curr_bank;
203 #ifdef CONFIG_OF_CONTROL
204 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
210 /* If there is no node, do nothing */
211 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
215 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
216 if (addr == FDT_ADDR_T_NONE) {
217 debug("%s: Cannot decode address\n", __func__);
221 if (flash->size != size) {
222 debug("%s: Memory map must cover entire device\n", __func__);
225 flash->memory_map = (void *)addr;
229 #endif /* CONFIG_OF_CONTROL */
231 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
232 unsigned int max_hz, unsigned int spi_mode)
234 struct spi_slave *spi;
235 struct spi_flash *flash = NULL;
239 /* Setup spi_slave */
240 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
242 printf("SF: Failed to set up slave\n");
247 ret = spi_claim_bus(spi);
249 debug("SF: Failed to claim SPI bus: %d\n", ret);
253 /* Read the ID codes */
254 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
256 printf("SF: Failed to get idcodes\n");
261 printf("SF: Got idcodes\n");
262 print_buffer(0, idcode, 1, sizeof(idcode), 0);
265 /* Validate ID's from flash dev table */
267 flash = spi_flash_validate_ids(spi, idp);
271 #ifdef CONFIG_SPI_FLASH_BAR
272 /* Configure the BAR - discover bank cmds and read current bank */
273 ret = spi_flash_bank_config(flash, *idp);
278 #ifdef CONFIG_OF_CONTROL
279 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
280 debug("SF: FDT decode error\n");
284 #ifndef CONFIG_SPL_BUILD
285 printf("SF: Detected %s with page size ", flash->name);
286 print_size(flash->sector_size, ", total ");
287 print_size(flash->size, "");
288 if (flash->memory_map)
289 printf(", mapped at %p", flash->memory_map);
292 #ifndef CONFIG_SPI_FLASH_BAR
293 if (flash->size > SPI_FLASH_16MB_BOUN) {
294 puts("SF: Warning - Only lower 16MiB accessible,");
295 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
299 /* Release spi bus */
300 spi_release_bus(spi);
305 spi_release_bus(spi);
311 void spi_flash_free(struct spi_flash *flash)
313 spi_free_slave(flash->spi);