4 * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Copyright (C) 2008 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <linux/log2.h>
20 #include "sf_internal.h"
22 DECLARE_GLOBAL_DATA_PTR;
24 static void spi_flash_addr(u32 addr, u8 *cmd)
26 /* cmd[0] is actual command */
32 /* Read commands array */
33 static u8 spi_read_cmds_array[] = {
36 CMD_READ_DUAL_OUTPUT_FAST,
37 CMD_READ_DUAL_IO_FAST,
38 CMD_READ_QUAD_OUTPUT_FAST,
39 CMD_READ_QUAD_IO_FAST,
42 static int read_sr(struct spi_flash *flash, u8 *rs)
47 cmd = CMD_READ_STATUS;
48 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
50 debug("SF: fail to read status register\n");
57 static int read_fsr(struct spi_flash *flash, u8 *fsr)
60 const u8 cmd = CMD_FLAG_STATUS;
62 ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
64 debug("SF: fail to read flag status register\n");
71 static int write_sr(struct spi_flash *flash, u8 ws)
76 cmd = CMD_WRITE_STATUS;
77 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
79 debug("SF: fail to write status register\n");
86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
87 static int read_cr(struct spi_flash *flash, u8 *rc)
92 cmd = CMD_READ_CONFIG;
93 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
95 debug("SF: fail to read config register\n");
102 static int write_cr(struct spi_flash *flash, u8 wc)
108 ret = read_sr(flash, &data[0]);
112 cmd = CMD_WRITE_STATUS;
114 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
116 debug("SF: fail to write config register\n");
124 #ifdef CONFIG_SPI_FLASH_BAR
125 static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
130 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
131 if (bank_sel == flash->bank_curr)
134 cmd = flash->bank_write_cmd;
135 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
137 debug("SF: fail to write bank register\n");
142 flash->bank_curr = bank_sel;
143 return flash->bank_curr;
146 static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
151 if (flash->size <= SPI_FLASH_16MB_BOUN)
155 case SPI_FLASH_CFI_MFR_SPANSION:
156 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
157 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
160 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
161 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
164 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
167 debug("SF: fail to read bank addr register\n");
172 flash->bank_curr = curr_bank;
177 #ifdef CONFIG_SF_DUAL_FLASH
178 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
180 struct spi_slave *spi = flash->spi;
182 switch (flash->dual_flash) {
183 case SF_DUAL_STACKED_FLASH:
184 if (*addr >= (flash->size >> 1)) {
185 *addr -= flash->size >> 1;
186 spi->flags |= SPI_XFER_U_PAGE;
188 spi->flags &= ~SPI_XFER_U_PAGE;
191 case SF_DUAL_PARALLEL_FLASH:
192 *addr >>= flash->shift;
195 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
201 static int spi_flash_sr_ready(struct spi_flash *flash)
206 ret = read_sr(flash, &sr);
210 return !(sr & STATUS_WIP);
213 static int spi_flash_fsr_ready(struct spi_flash *flash)
218 ret = read_fsr(flash, &fsr);
222 return fsr & STATUS_PEC;
225 static int spi_flash_ready(struct spi_flash *flash)
229 sr = spi_flash_sr_ready(flash);
234 if (flash->flags & SNOR_F_USE_FSR) {
235 fsr = spi_flash_fsr_ready(flash);
243 static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
244 unsigned long timeout)
248 timebase = get_timer(0);
250 while (get_timer(timebase) < timeout) {
251 ret = spi_flash_ready(flash);
258 printf("SF: Timeout!\n");
263 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
264 size_t cmd_len, const void *buf, size_t buf_len)
266 struct spi_slave *spi = flash->spi;
267 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
271 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
273 ret = spi_claim_bus(spi);
275 debug("SF: unable to claim SPI bus\n");
279 ret = spi_flash_cmd_write_enable(flash);
281 debug("SF: enabling write failed\n");
285 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
287 debug("SF: write cmd failed\n");
291 ret = spi_flash_cmd_wait_ready(flash, timeout);
293 debug("SF: write %s timed out\n",
294 timeout == SPI_FLASH_PROG_TIMEOUT ?
295 "program" : "page erase");
299 spi_release_bus(spi);
304 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
306 u32 erase_size, erase_addr;
307 u8 cmd[SPI_FLASH_CMD_LEN];
310 erase_size = flash->erase_size;
311 if (offset % erase_size || len % erase_size) {
312 debug("SF: Erase offset/length not multiple of erase size\n");
316 if (flash->flash_is_locked) {
317 if (flash->flash_is_locked(flash, offset, len) > 0) {
318 printf("offset 0x%x is protected and cannot be erased\n",
324 cmd[0] = flash->erase_cmd;
328 #ifdef CONFIG_SF_DUAL_FLASH
329 if (flash->dual_flash > SF_SINGLE_FLASH)
330 spi_flash_dual(flash, &erase_addr);
332 #ifdef CONFIG_SPI_FLASH_BAR
333 ret = spi_flash_write_bar(flash, erase_addr);
337 spi_flash_addr(erase_addr, cmd);
339 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
340 cmd[2], cmd[3], erase_addr);
342 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
344 debug("SF: erase failed\n");
348 offset += erase_size;
355 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
356 size_t len, const void *buf)
358 struct spi_slave *spi = flash->spi;
359 unsigned long byte_addr, page_size;
361 size_t chunk_len, actual;
362 u8 cmd[SPI_FLASH_CMD_LEN];
365 page_size = flash->page_size;
367 if (flash->flash_is_locked) {
368 if (flash->flash_is_locked(flash, offset, len) > 0) {
369 printf("offset 0x%x is protected and cannot be written\n",
375 cmd[0] = flash->write_cmd;
376 for (actual = 0; actual < len; actual += chunk_len) {
379 #ifdef CONFIG_SF_DUAL_FLASH
380 if (flash->dual_flash > SF_SINGLE_FLASH)
381 spi_flash_dual(flash, &write_addr);
383 #ifdef CONFIG_SPI_FLASH_BAR
384 ret = spi_flash_write_bar(flash, write_addr);
388 byte_addr = offset % page_size;
389 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
391 if (spi->max_write_size)
392 chunk_len = min(chunk_len,
393 (size_t)spi->max_write_size);
395 spi_flash_addr(write_addr, cmd);
397 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
398 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
400 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
401 buf + actual, chunk_len);
403 debug("SF: write failed\n");
413 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
414 size_t cmd_len, void *data, size_t data_len)
416 struct spi_slave *spi = flash->spi;
419 ret = spi_claim_bus(spi);
421 debug("SF: unable to claim SPI bus\n");
425 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
427 debug("SF: read cmd failed\n");
431 spi_release_bus(spi);
436 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
438 memcpy(data, offset, len);
441 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
442 size_t len, void *data)
444 struct spi_slave *spi = flash->spi;
446 u32 remain_len, read_len, read_addr;
450 /* Handle memory-mapped SPI */
451 if (flash->memory_map) {
452 ret = spi_claim_bus(spi);
454 debug("SF: unable to claim SPI bus\n");
457 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
458 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
459 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
460 spi_release_bus(spi);
464 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
465 cmd = calloc(1, cmdsz);
467 debug("SF: Failed to allocate cmd\n");
471 cmd[0] = flash->read_cmd;
475 #ifdef CONFIG_SF_DUAL_FLASH
476 if (flash->dual_flash > SF_SINGLE_FLASH)
477 spi_flash_dual(flash, &read_addr);
479 #ifdef CONFIG_SPI_FLASH_BAR
480 ret = spi_flash_write_bar(flash, read_addr);
483 bank_sel = flash->bank_curr;
485 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
486 (bank_sel + 1)) - offset;
487 if (len < remain_len)
490 read_len = remain_len;
492 spi_flash_addr(read_addr, cmd);
494 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
496 debug("SF: read failed\n");
509 #ifdef CONFIG_SPI_FLASH_SST
510 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
512 struct spi_slave *spi = flash->spi;
521 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
522 spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
524 ret = spi_flash_cmd_write_enable(flash);
528 ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
532 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
535 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
538 struct spi_slave *spi = flash->spi;
539 size_t actual, cmd_len;
543 ret = spi_claim_bus(spi);
545 debug("SF: Unable to claim SPI bus\n");
549 /* If the data is not word aligned, write out leading single byte */
552 ret = sst_byte_write(flash, offset, buf);
558 ret = spi_flash_cmd_write_enable(flash);
563 cmd[0] = CMD_SST_AAI_WP;
564 cmd[1] = offset >> 16;
565 cmd[2] = offset >> 8;
568 for (; actual < len - 1; actual += 2) {
569 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
570 spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
573 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
576 debug("SF: sst word program failed\n");
580 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
589 ret = spi_flash_cmd_write_disable(flash);
591 /* If there is a single trailing byte, write it out */
592 if (!ret && actual != len)
593 ret = sst_byte_write(flash, offset, buf + actual);
596 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
597 ret ? "failure" : "success", len, offset - actual);
599 spi_release_bus(spi);
603 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
606 struct spi_slave *spi = flash->spi;
610 ret = spi_claim_bus(spi);
612 debug("SF: Unable to claim SPI bus\n");
616 for (actual = 0; actual < len; actual++) {
617 ret = sst_byte_write(flash, offset, buf + actual);
619 debug("SF: sst byte program failed\n");
626 ret = spi_flash_cmd_write_disable(flash);
628 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
629 ret ? "failure" : "success", len, offset - actual);
631 spi_release_bus(spi);
636 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
637 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
640 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
641 int shift = ffs(mask) - 1;
649 pow = ((sr & mask) ^ mask) >> shift;
650 *len = flash->size >> pow;
651 *ofs = flash->size - *len;
656 * Return 1 if the entire region is locked, 0 otherwise
658 static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len,
664 stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
666 return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
670 * Check if a region of the flash is (completely) locked. See stm_lock() for
673 * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
674 * negative on errors.
676 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
681 status = read_sr(flash, &sr);
685 return stm_is_locked_sr(flash, ofs, len, sr);
689 * Lock a region of the flash. Compatible with ST Micro and similar flash.
690 * Supports only the block protection bits BP{0,1,2} in the status register
691 * (SR). Does not support these features found in newer SR bitfields:
692 * - TB: top/bottom protect - only handle TB=0 (top protect)
693 * - SEC: sector/block protect - only handle SEC=0 (block protect)
694 * - CMP: complement protect - only support CMP=0 (range is not complemented)
696 * Sample table portion for 8MB flash (Winbond w25q64fw):
698 * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion
699 * --------------------------------------------------------------------------
700 * X | X | 0 | 0 | 0 | NONE | NONE
701 * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64
702 * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32
703 * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16
704 * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8
705 * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4
706 * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2
707 * X | X | 1 | 1 | 1 | 8 MB | ALL
709 * Returns negative on errors, 0 on success.
711 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
713 u8 status_old, status_new;
714 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
715 u8 shift = ffs(mask) - 1, pow, val;
718 ret = read_sr(flash, &status_old);
722 /* SPI NOR always locks to the end */
723 if (ofs + len != flash->size) {
724 /* Does combined region extend to end? */
725 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
728 len = flash->size - ofs;
732 * Need smallest pow such that:
734 * 1 / (2^pow) <= (len / size)
736 * so (assuming power-of-2 size) we do:
738 * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
740 pow = ilog2(flash->size) - ilog2(len);
741 val = mask - (pow << shift);
745 /* Don't "lock" with no region! */
749 status_new = (status_old & ~mask) | val;
751 /* Only modify protection if it will not unlock other areas */
752 if ((status_new & mask) <= (status_old & mask))
755 write_sr(flash, status_new);
761 * Unlock a region of the flash. See stm_lock() for more info
763 * Returns negative on errors, 0 on success.
765 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
767 uint8_t status_old, status_new;
768 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
769 u8 shift = ffs(mask) - 1, pow, val;
772 ret = read_sr(flash, &status_old);
776 /* Cannot unlock; would unlock larger region than requested */
777 if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
781 * Need largest pow such that:
783 * 1 / (2^pow) >= (len / size)
785 * so (assuming power-of-2 size) we do:
787 * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
789 pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
790 if (ofs + len == flash->size) {
791 val = 0; /* fully unlocked */
793 val = mask - (pow << shift);
794 /* Some power-of-two sizes are not supported */
799 status_new = (status_old & ~mask) | val;
801 /* Only modify protection if it will not lock other areas */
802 if ((status_new & mask) >= (status_old & mask))
805 write_sr(flash, status_new);
812 #ifdef CONFIG_SPI_FLASH_MACRONIX
813 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
818 ret = read_sr(flash, &qeb_status);
822 if (qeb_status & STATUS_QEB_MXIC) {
823 debug("SF: mxic: QEB is already set\n");
825 ret = write_sr(flash, STATUS_QEB_MXIC);
834 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
835 static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
840 ret = read_cr(flash, &qeb_status);
844 if (qeb_status & STATUS_QEB_WINSPAN) {
845 debug("SF: winspan: QEB is already set\n");
847 ret = write_cr(flash, STATUS_QEB_WINSPAN);
856 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
859 #ifdef CONFIG_SPI_FLASH_MACRONIX
860 case SPI_FLASH_CFI_MFR_MACRONIX:
861 return spi_flash_set_qeb_mxic(flash);
863 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
864 case SPI_FLASH_CFI_MFR_SPANSION:
865 case SPI_FLASH_CFI_MFR_WINBOND:
866 return spi_flash_set_qeb_winspan(flash);
868 #ifdef CONFIG_SPI_FLASH_STMICRO
869 case SPI_FLASH_CFI_MFR_STMICRO:
870 debug("SF: QEB is volatile for %02x flash\n", idcode0);
874 printf("SF: Need set QEB func for %02x flash\n", idcode0);
879 #if CONFIG_IS_ENABLED(OF_CONTROL)
880 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
886 /* If there is no node, do nothing */
887 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
891 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
892 if (addr == FDT_ADDR_T_NONE) {
893 debug("%s: Cannot decode address\n", __func__);
897 if (flash->size != size) {
898 debug("%s: Memory map must cover entire device\n", __func__);
901 flash->memory_map = map_sysmem(addr, size);
905 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
907 int spi_flash_scan(struct spi_flash *flash)
909 struct spi_slave *spi = flash->spi;
910 const struct spi_flash_params *params;
911 u16 jedec, ext_jedec;
916 /* Read the ID codes */
917 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
919 printf("SF: Failed to get idcodes\n");
924 printf("SF: Got idcodes\n");
925 print_buffer(0, idcode, 1, sizeof(idcode), 0);
928 jedec = idcode[1] << 8 | idcode[2];
929 ext_jedec = idcode[3] << 8 | idcode[4];
931 /* Validate params from spi_flash_params table */
932 params = spi_flash_params_table;
933 for (; params->name != NULL; params++) {
934 if ((params->jedec >> 16) == idcode[0]) {
935 if ((params->jedec & 0xFFFF) == jedec) {
936 if (params->ext_jedec == 0)
938 else if (params->ext_jedec == ext_jedec)
945 printf("SF: Unsupported flash IDs: ");
946 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
947 idcode[0], jedec, ext_jedec);
948 return -EPROTONOSUPPORT;
951 /* Flash powers up read-only, so clear BP# bits */
952 if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
953 idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
954 idcode[0] == SPI_FLASH_CFI_MFR_SST)
957 /* Assign spi data */
958 flash->name = params->name;
959 flash->memory_map = spi->memory_map;
960 flash->dual_flash = spi->option;
962 /* Assign spi flash flags */
963 if (params->flags & SST_WR)
964 flash->flags |= SNOR_F_SST_WR;
966 /* Assign spi_flash ops */
967 #ifndef CONFIG_DM_SPI_FLASH
968 flash->write = spi_flash_cmd_write_ops;
969 #if defined(CONFIG_SPI_FLASH_SST)
970 if (flash->flags & SNOR_F_SST_WR) {
971 if (spi->op_mode_tx & SPI_OPM_TX_BP)
972 flash->write = sst_write_bp;
974 flash->write = sst_write_wp;
977 flash->erase = spi_flash_cmd_erase_ops;
978 flash->read = spi_flash_cmd_read_ops;
981 /* lock hooks are flash specific - assign them based on idcode0 */
983 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
984 case SPI_FLASH_CFI_MFR_STMICRO:
985 case SPI_FLASH_CFI_MFR_SST:
986 flash->flash_lock = stm_lock;
987 flash->flash_unlock = stm_unlock;
988 flash->flash_is_locked = stm_is_locked;
992 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
995 /* Compute the flash size */
996 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
998 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
999 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1000 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1003 if (ext_jedec == 0x4d00) {
1004 if ((jedec == 0x0215) || (jedec == 0x216))
1005 flash->page_size = 256;
1007 flash->page_size = 512;
1009 flash->page_size = 256;
1011 flash->page_size <<= flash->shift;
1012 flash->sector_size = params->sector_size << flash->shift;
1013 flash->size = flash->sector_size * params->nr_sectors << flash->shift;
1014 #ifdef CONFIG_SF_DUAL_FLASH
1015 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1019 /* Compute erase sector and command */
1020 if (params->flags & SECT_4K) {
1021 flash->erase_cmd = CMD_ERASE_4K;
1022 flash->erase_size = 4096 << flash->shift;
1023 } else if (params->flags & SECT_32K) {
1024 flash->erase_cmd = CMD_ERASE_32K;
1025 flash->erase_size = 32768 << flash->shift;
1027 flash->erase_cmd = CMD_ERASE_64K;
1028 flash->erase_size = flash->sector_size;
1031 /* Now erase size becomes valid sector size */
1032 flash->sector_size = flash->erase_size;
1034 /* Look for the fastest read cmd */
1035 cmd = fls(params->e_rd_cmd & spi->op_mode_rx);
1037 cmd = spi_read_cmds_array[cmd - 1];
1038 flash->read_cmd = cmd;
1040 /* Go for default supported read cmd */
1041 flash->read_cmd = CMD_READ_ARRAY_FAST;
1044 /* Not require to look for fastest only two write cmds yet */
1045 if (params->flags & WR_QPP && spi->op_mode_tx & SPI_OPM_TX_QPP)
1046 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1048 /* Go for default supported write cmd */
1049 flash->write_cmd = CMD_PAGE_PROGRAM;
1051 /* Set the quad enable bit - only for quad commands */
1052 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1053 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1054 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1055 ret = spi_flash_set_qeb(flash, idcode[0]);
1057 debug("SF: Fail to set QEB for %02x\n", idcode[0]);
1062 /* Read dummy_byte: dummy byte is determined based on the
1063 * dummy cycles of a particular command.
1064 * Fast commands - dummy_byte = dummy_cycles/8
1065 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1066 * For I/O commands except cmd[0] everything goes on no.of lines
1067 * based on particular command but incase of fast commands except
1068 * data all go on single line irrespective of command.
1070 switch (flash->read_cmd) {
1071 case CMD_READ_QUAD_IO_FAST:
1072 flash->dummy_byte = 2;
1074 case CMD_READ_ARRAY_SLOW:
1075 flash->dummy_byte = 0;
1078 flash->dummy_byte = 1;
1081 #ifdef CONFIG_SPI_FLASH_STMICRO
1082 if (params->flags & E_FSR)
1083 flash->flags |= SNOR_F_USE_FSR;
1086 /* Configure the BAR - discover bank cmds and read current bank */
1087 #ifdef CONFIG_SPI_FLASH_BAR
1088 ret = spi_flash_read_bar(flash, idcode[0]);
1093 #if CONFIG_IS_ENABLED(OF_CONTROL)
1094 ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1096 debug("SF: FDT decode error\n");
1101 #ifndef CONFIG_SPL_BUILD
1102 printf("SF: Detected %s with page size ", flash->name);
1103 print_size(flash->page_size, ", erase size ");
1104 print_size(flash->erase_size, ", total ");
1105 print_size(flash->size, "");
1106 if (flash->memory_map)
1107 printf(", mapped at %p", flash->memory_map);
1111 #ifndef CONFIG_SPI_FLASH_BAR
1112 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1113 (flash->size > SPI_FLASH_16MB_BOUN)) ||
1114 ((flash->dual_flash > SF_SINGLE_FLASH) &&
1115 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1116 puts("SF: Warning - Only lower 16MiB accessible,");
1117 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");