4 * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Copyright (C) 2008 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <linux/log2.h>
21 #include "sf_internal.h"
23 DECLARE_GLOBAL_DATA_PTR;
25 static void spi_flash_addr(u32 addr, u8 *cmd)
27 /* cmd[0] is actual command */
33 static int read_sr(struct spi_flash *flash, u8 *rs)
38 cmd = CMD_READ_STATUS;
39 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
41 debug("SF: fail to read status register\n");
48 static int read_fsr(struct spi_flash *flash, u8 *fsr)
51 const u8 cmd = CMD_FLAG_STATUS;
53 ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
55 debug("SF: fail to read flag status register\n");
62 static int write_sr(struct spi_flash *flash, u8 ws)
67 cmd = CMD_WRITE_STATUS;
68 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
70 debug("SF: fail to write status register\n");
77 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
78 static int read_cr(struct spi_flash *flash, u8 *rc)
83 cmd = CMD_READ_CONFIG;
84 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
86 debug("SF: fail to read config register\n");
93 static int write_cr(struct spi_flash *flash, u8 wc)
99 ret = read_sr(flash, &data[0]);
103 cmd = CMD_WRITE_STATUS;
105 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
107 debug("SF: fail to write config register\n");
115 #ifdef CONFIG_SPI_FLASH_STMICRO
116 static int read_evcr(struct spi_flash *flash, u8 *evcr)
119 const u8 cmd = CMD_READ_EVCR;
121 ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
123 debug("SF: error reading EVCR\n");
130 static int write_evcr(struct spi_flash *flash, u8 evcr)
135 cmd = CMD_WRITE_EVCR;
136 ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
138 debug("SF: error while writing EVCR register\n");
146 #ifdef CONFIG_SPI_FLASH_BAR
147 static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
152 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
153 if (bank_sel == flash->bank_curr)
156 cmd = flash->bank_write_cmd;
157 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
159 debug("SF: fail to write bank register\n");
164 flash->bank_curr = bank_sel;
165 return flash->bank_curr;
168 static int spi_flash_read_bar(struct spi_flash *flash,
169 const struct spi_flash_info *info)
174 if (flash->size <= SPI_FLASH_16MB_BOUN)
177 switch (JEDEC_MFR(info)) {
178 case SPI_FLASH_CFI_MFR_SPANSION:
179 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
180 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
183 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
184 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
187 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
190 debug("SF: fail to read bank addr register\n");
195 flash->bank_curr = curr_bank;
200 #ifdef CONFIG_SF_DUAL_FLASH
201 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
203 struct spi_slave *spi = flash->spi;
205 switch (flash->dual_flash) {
206 case SF_DUAL_STACKED_FLASH:
207 if (*addr >= (flash->size >> 1)) {
208 *addr -= flash->size >> 1;
209 spi->flags |= SPI_XFER_U_PAGE;
211 spi->flags &= ~SPI_XFER_U_PAGE;
214 case SF_DUAL_PARALLEL_FLASH:
215 *addr >>= flash->shift;
218 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
224 static int spi_flash_sr_ready(struct spi_flash *flash)
229 ret = read_sr(flash, &sr);
233 return !(sr & STATUS_WIP);
236 static int spi_flash_fsr_ready(struct spi_flash *flash)
241 ret = read_fsr(flash, &fsr);
245 return fsr & STATUS_PEC;
248 static int spi_flash_ready(struct spi_flash *flash)
252 sr = spi_flash_sr_ready(flash);
257 if (flash->flags & SNOR_F_USE_FSR) {
258 fsr = spi_flash_fsr_ready(flash);
266 static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
267 unsigned long timeout)
269 unsigned long timebase;
272 timebase = get_timer(0);
274 while (get_timer(timebase) < timeout) {
275 ret = spi_flash_ready(flash);
282 printf("SF: Timeout!\n");
287 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
288 size_t cmd_len, const void *buf, size_t buf_len)
290 struct spi_slave *spi = flash->spi;
291 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
295 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
297 ret = spi_claim_bus(spi);
299 debug("SF: unable to claim SPI bus\n");
303 ret = spi_flash_cmd_write_enable(flash);
305 debug("SF: enabling write failed\n");
309 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
311 debug("SF: write cmd failed\n");
315 ret = spi_flash_cmd_wait_ready(flash, timeout);
317 debug("SF: write %s timed out\n",
318 timeout == SPI_FLASH_PROG_TIMEOUT ?
319 "program" : "page erase");
323 spi_release_bus(spi);
328 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
330 u32 erase_size, erase_addr;
331 u8 cmd[SPI_FLASH_CMD_LEN];
334 erase_size = flash->erase_size;
335 if (offset % erase_size || len % erase_size) {
336 debug("SF: Erase offset/length not multiple of erase size\n");
340 if (flash->flash_is_locked) {
341 if (flash->flash_is_locked(flash, offset, len) > 0) {
342 printf("offset 0x%x is protected and cannot be erased\n",
348 cmd[0] = flash->erase_cmd;
352 #ifdef CONFIG_SF_DUAL_FLASH
353 if (flash->dual_flash > SF_SINGLE_FLASH)
354 spi_flash_dual(flash, &erase_addr);
356 #ifdef CONFIG_SPI_FLASH_BAR
357 ret = spi_flash_write_bar(flash, erase_addr);
361 spi_flash_addr(erase_addr, cmd);
363 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
364 cmd[2], cmd[3], erase_addr);
366 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
368 debug("SF: erase failed\n");
372 offset += erase_size;
379 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
380 size_t len, const void *buf)
382 struct spi_slave *spi = flash->spi;
383 unsigned long byte_addr, page_size;
385 size_t chunk_len, actual;
386 u8 cmd[SPI_FLASH_CMD_LEN];
389 page_size = flash->page_size;
391 if (flash->flash_is_locked) {
392 if (flash->flash_is_locked(flash, offset, len) > 0) {
393 printf("offset 0x%x is protected and cannot be written\n",
399 cmd[0] = flash->write_cmd;
400 for (actual = 0; actual < len; actual += chunk_len) {
403 #ifdef CONFIG_SF_DUAL_FLASH
404 if (flash->dual_flash > SF_SINGLE_FLASH)
405 spi_flash_dual(flash, &write_addr);
407 #ifdef CONFIG_SPI_FLASH_BAR
408 ret = spi_flash_write_bar(flash, write_addr);
412 byte_addr = offset % page_size;
413 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
415 if (spi->max_write_size)
416 chunk_len = min(chunk_len,
417 (size_t)spi->max_write_size);
419 spi_flash_addr(write_addr, cmd);
421 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
422 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
424 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
425 buf + actual, chunk_len);
427 debug("SF: write failed\n");
437 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
438 size_t cmd_len, void *data, size_t data_len)
440 struct spi_slave *spi = flash->spi;
443 ret = spi_claim_bus(spi);
445 debug("SF: unable to claim SPI bus\n");
449 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
451 debug("SF: read cmd failed\n");
455 spi_release_bus(spi);
461 * TODO: remove the weak after all the other spi_flash_copy_mmap
462 * implementations removed from drivers
464 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
467 if (!dma_memcpy(data, offset, len))
470 memcpy(data, offset, len);
473 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
474 size_t len, void *data)
476 struct spi_slave *spi = flash->spi;
478 u32 remain_len, read_len, read_addr;
482 /* Handle memory-mapped SPI */
483 if (flash->memory_map) {
484 ret = spi_claim_bus(spi);
486 debug("SF: unable to claim SPI bus\n");
489 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
490 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
491 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
492 spi_release_bus(spi);
496 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
497 cmd = calloc(1, cmdsz);
499 debug("SF: Failed to allocate cmd\n");
503 cmd[0] = flash->read_cmd;
507 #ifdef CONFIG_SF_DUAL_FLASH
508 if (flash->dual_flash > SF_SINGLE_FLASH)
509 spi_flash_dual(flash, &read_addr);
511 #ifdef CONFIG_SPI_FLASH_BAR
512 ret = spi_flash_write_bar(flash, read_addr);
515 bank_sel = flash->bank_curr;
517 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
518 (bank_sel + 1)) - offset;
519 if (len < remain_len)
522 read_len = remain_len;
524 spi_flash_addr(read_addr, cmd);
526 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
528 debug("SF: read failed\n");
541 #ifdef CONFIG_SPI_FLASH_SST
542 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
544 struct spi_slave *spi = flash->spi;
553 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
554 spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
556 ret = spi_flash_cmd_write_enable(flash);
560 ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
564 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
567 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
570 struct spi_slave *spi = flash->spi;
571 size_t actual, cmd_len;
575 ret = spi_claim_bus(spi);
577 debug("SF: Unable to claim SPI bus\n");
581 /* If the data is not word aligned, write out leading single byte */
584 ret = sst_byte_write(flash, offset, buf);
590 ret = spi_flash_cmd_write_enable(flash);
595 cmd[0] = CMD_SST_AAI_WP;
596 cmd[1] = offset >> 16;
597 cmd[2] = offset >> 8;
600 for (; actual < len - 1; actual += 2) {
601 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
602 spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
605 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
608 debug("SF: sst word program failed\n");
612 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
621 ret = spi_flash_cmd_write_disable(flash);
623 /* If there is a single trailing byte, write it out */
624 if (!ret && actual != len)
625 ret = sst_byte_write(flash, offset, buf + actual);
628 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
629 ret ? "failure" : "success", len, offset - actual);
631 spi_release_bus(spi);
635 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
638 struct spi_slave *spi = flash->spi;
642 ret = spi_claim_bus(spi);
644 debug("SF: Unable to claim SPI bus\n");
648 for (actual = 0; actual < len; actual++) {
649 ret = sst_byte_write(flash, offset, buf + actual);
651 debug("SF: sst byte program failed\n");
658 ret = spi_flash_cmd_write_disable(flash);
660 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
661 ret ? "failure" : "success", len, offset - actual);
663 spi_release_bus(spi);
668 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
669 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
672 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
673 int shift = ffs(mask) - 1;
681 pow = ((sr & mask) ^ mask) >> shift;
682 *len = flash->size >> pow;
683 *ofs = flash->size - *len;
688 * Return 1 if the entire region is locked, 0 otherwise
690 static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u64 len,
696 stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
698 return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
702 * Check if a region of the flash is (completely) locked. See stm_lock() for
705 * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
706 * negative on errors.
708 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
713 status = read_sr(flash, &sr);
717 return stm_is_locked_sr(flash, ofs, len, sr);
721 * Lock a region of the flash. Compatible with ST Micro and similar flash.
722 * Supports only the block protection bits BP{0,1,2} in the status register
723 * (SR). Does not support these features found in newer SR bitfields:
724 * - TB: top/bottom protect - only handle TB=0 (top protect)
725 * - SEC: sector/block protect - only handle SEC=0 (block protect)
726 * - CMP: complement protect - only support CMP=0 (range is not complemented)
728 * Sample table portion for 8MB flash (Winbond w25q64fw):
730 * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion
731 * --------------------------------------------------------------------------
732 * X | X | 0 | 0 | 0 | NONE | NONE
733 * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64
734 * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32
735 * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16
736 * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8
737 * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4
738 * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2
739 * X | X | 1 | 1 | 1 | 8 MB | ALL
741 * Returns negative on errors, 0 on success.
743 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
745 u8 status_old, status_new;
746 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
747 u8 shift = ffs(mask) - 1, pow, val;
750 ret = read_sr(flash, &status_old);
754 /* SPI NOR always locks to the end */
755 if (ofs + len != flash->size) {
756 /* Does combined region extend to end? */
757 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
760 len = flash->size - ofs;
764 * Need smallest pow such that:
766 * 1 / (2^pow) <= (len / size)
768 * so (assuming power-of-2 size) we do:
770 * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
772 pow = ilog2(flash->size) - ilog2(len);
773 val = mask - (pow << shift);
777 /* Don't "lock" with no region! */
781 status_new = (status_old & ~mask) | val;
783 /* Only modify protection if it will not unlock other areas */
784 if ((status_new & mask) <= (status_old & mask))
787 write_sr(flash, status_new);
793 * Unlock a region of the flash. See stm_lock() for more info
795 * Returns negative on errors, 0 on success.
797 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
799 uint8_t status_old, status_new;
800 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
801 u8 shift = ffs(mask) - 1, pow, val;
804 ret = read_sr(flash, &status_old);
808 /* Cannot unlock; would unlock larger region than requested */
809 if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
813 * Need largest pow such that:
815 * 1 / (2^pow) >= (len / size)
817 * so (assuming power-of-2 size) we do:
819 * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
821 pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
822 if (ofs + len == flash->size) {
823 val = 0; /* fully unlocked */
825 val = mask - (pow << shift);
826 /* Some power-of-two sizes are not supported */
831 status_new = (status_old & ~mask) | val;
833 /* Only modify protection if it will not lock other areas */
834 if ((status_new & mask) >= (status_old & mask))
837 write_sr(flash, status_new);
844 #ifdef CONFIG_SPI_FLASH_MACRONIX
845 static int macronix_quad_enable(struct spi_flash *flash)
850 ret = read_sr(flash, &qeb_status);
854 if (qeb_status & STATUS_QEB_MXIC)
857 ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC);
861 /* read SR and check it */
862 ret = read_sr(flash, &qeb_status);
863 if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) {
864 printf("SF: Macronix SR Quad bit not clear\n");
872 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
873 static int spansion_quad_enable(struct spi_flash *flash)
878 ret = read_cr(flash, &qeb_status);
882 if (qeb_status & STATUS_QEB_WINSPAN)
885 ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN);
889 /* read CR and check it */
890 ret = read_cr(flash, &qeb_status);
891 if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
892 printf("SF: Spansion CR Quad bit not clear\n");
900 #ifdef CONFIG_SPI_FLASH_STMICRO
901 static int micron_quad_enable(struct spi_flash *flash)
906 ret = read_evcr(flash, &qeb_status);
910 if (!(qeb_status & STATUS_QEB_MICRON))
913 ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
917 /* read EVCR and check it */
918 ret = read_evcr(flash, &qeb_status);
919 if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
920 printf("SF: Micron EVCR Quad bit not clear\n");
928 static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash)
931 u8 id[SPI_FLASH_MAX_ID_LEN];
932 const struct spi_flash_info *info;
934 tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, SPI_FLASH_MAX_ID_LEN);
936 printf("SF: error %d reading JEDEC ID\n", tmp);
940 info = spi_flash_ids;
941 for (; info->name != NULL; info++) {
943 if (!memcmp(info->id, id, info->id_len))
948 printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
949 id[0], id[1], id[2]);
950 return ERR_PTR(-ENODEV);
953 static int set_quad_mode(struct spi_flash *flash,
954 const struct spi_flash_info *info)
956 switch (JEDEC_MFR(info)) {
957 #ifdef CONFIG_SPI_FLASH_MACRONIX
958 case SPI_FLASH_CFI_MFR_MACRONIX:
959 return macronix_quad_enable(flash);
961 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
962 case SPI_FLASH_CFI_MFR_SPANSION:
963 case SPI_FLASH_CFI_MFR_WINBOND:
964 return spansion_quad_enable(flash);
966 #ifdef CONFIG_SPI_FLASH_STMICRO
967 case SPI_FLASH_CFI_MFR_STMICRO:
968 return micron_quad_enable(flash);
971 printf("SF: Need set QEB func for %02x flash\n",
977 #if CONFIG_IS_ENABLED(OF_CONTROL)
978 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
980 #ifdef CONFIG_DM_SPI_FLASH
983 int node = flash->dev->of_offset;
985 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
986 if (addr == FDT_ADDR_T_NONE) {
987 debug("%s: Cannot decode address\n", __func__);
991 if (flash->size != size) {
992 debug("%s: Memory map must cover entire device\n", __func__);
995 flash->memory_map = map_sysmem(addr, size);
1000 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
1002 int spi_flash_scan(struct spi_flash *flash)
1004 struct spi_slave *spi = flash->spi;
1005 const struct spi_flash_info *info = NULL;
1008 info = spi_flash_read_id(flash);
1009 if (IS_ERR_OR_NULL(info))
1012 /* Flash powers up read-only, so clear BP# bits */
1013 if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
1014 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
1015 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
1018 flash->name = info->name;
1019 flash->memory_map = spi->memory_map;
1020 flash->dual_flash = spi->option;
1022 if (info->flags & SST_WR)
1023 flash->flags |= SNOR_F_SST_WR;
1025 #ifndef CONFIG_DM_SPI_FLASH
1026 flash->write = spi_flash_cmd_write_ops;
1027 #if defined(CONFIG_SPI_FLASH_SST)
1028 if (flash->flags & SNOR_F_SST_WR) {
1029 if (spi->mode & SPI_TX_BYTE)
1030 flash->write = sst_write_bp;
1032 flash->write = sst_write_wp;
1035 flash->erase = spi_flash_cmd_erase_ops;
1036 flash->read = spi_flash_cmd_read_ops;
1039 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
1040 /* NOR protection support for STmicro/Micron chips and similar */
1041 if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
1042 JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
1043 flash->flash_lock = stm_lock;
1044 flash->flash_unlock = stm_unlock;
1045 flash->flash_is_locked = stm_is_locked;
1049 /* Compute the flash size */
1050 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
1051 flash->page_size = info->page_size;
1053 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1054 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1055 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1058 if (JEDEC_EXT(info) == 0x4d00) {
1059 if ((JEDEC_ID(info) != 0x0215) &&
1060 (JEDEC_ID(info) != 0x0216))
1061 flash->page_size = 512;
1063 flash->page_size <<= flash->shift;
1064 flash->sector_size = info->sector_size << flash->shift;
1065 flash->size = flash->sector_size * info->n_sectors << flash->shift;
1066 #ifdef CONFIG_SF_DUAL_FLASH
1067 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1071 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
1072 /* Compute erase sector and command */
1073 if (info->flags & SECT_4K) {
1074 flash->erase_cmd = CMD_ERASE_4K;
1075 flash->erase_size = 4096 << flash->shift;
1079 flash->erase_cmd = CMD_ERASE_64K;
1080 flash->erase_size = flash->sector_size;
1083 /* Now erase size becomes valid sector size */
1084 flash->sector_size = flash->erase_size;
1086 /* Look for read commands */
1087 flash->read_cmd = CMD_READ_ARRAY_FAST;
1088 if (spi->mode & SPI_RX_SLOW)
1089 flash->read_cmd = CMD_READ_ARRAY_SLOW;
1090 else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD)
1091 flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
1092 else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL)
1093 flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
1095 /* Look for write commands */
1096 if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1097 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1099 /* Go for default supported write cmd */
1100 flash->write_cmd = CMD_PAGE_PROGRAM;
1102 /* Set the quad enable bit - only for quad commands */
1103 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1104 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1105 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1106 ret = set_quad_mode(flash, info);
1108 debug("SF: Fail to set QEB for %02x\n",
1114 /* Read dummy_byte: dummy byte is determined based on the
1115 * dummy cycles of a particular command.
1116 * Fast commands - dummy_byte = dummy_cycles/8
1117 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1118 * For I/O commands except cmd[0] everything goes on no.of lines
1119 * based on particular command but incase of fast commands except
1120 * data all go on single line irrespective of command.
1122 switch (flash->read_cmd) {
1123 case CMD_READ_QUAD_IO_FAST:
1124 flash->dummy_byte = 2;
1126 case CMD_READ_ARRAY_SLOW:
1127 flash->dummy_byte = 0;
1130 flash->dummy_byte = 1;
1133 #ifdef CONFIG_SPI_FLASH_STMICRO
1134 if (info->flags & E_FSR)
1135 flash->flags |= SNOR_F_USE_FSR;
1138 /* Configure the BAR - discover bank cmds and read current bank */
1139 #ifdef CONFIG_SPI_FLASH_BAR
1140 ret = spi_flash_read_bar(flash, info);
1145 #if CONFIG_IS_ENABLED(OF_CONTROL)
1146 ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1148 debug("SF: FDT decode error\n");
1153 #ifndef CONFIG_SPL_BUILD
1154 printf("SF: Detected %s with page size ", flash->name);
1155 print_size(flash->page_size, ", erase size ");
1156 print_size(flash->erase_size, ", total ");
1157 print_size(flash->size, "");
1158 if (flash->memory_map)
1159 printf(", mapped at %p", flash->memory_map);
1163 #ifndef CONFIG_SPI_FLASH_BAR
1164 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1165 (flash->size > SPI_FLASH_16MB_BOUN)) ||
1166 ((flash->dual_flash > SF_SINGLE_FLASH) &&
1167 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1168 puts("SF: Warning - Only lower 16MiB accessible,");
1169 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");