4 * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Copyright (C) 2008 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <linux/log2.h>
21 #include "sf_internal.h"
23 DECLARE_GLOBAL_DATA_PTR;
25 static void spi_flash_addr(u32 addr, u8 *cmd)
27 /* cmd[0] is actual command */
33 static int read_sr(struct spi_flash *flash, u8 *rs)
38 cmd = CMD_READ_STATUS;
39 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
41 debug("SF: fail to read status register\n");
48 static int read_fsr(struct spi_flash *flash, u8 *fsr)
51 const u8 cmd = CMD_FLAG_STATUS;
53 ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
55 debug("SF: fail to read flag status register\n");
62 static int write_sr(struct spi_flash *flash, u8 ws)
67 cmd = CMD_WRITE_STATUS;
68 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
70 debug("SF: fail to write status register\n");
77 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
78 static int read_cr(struct spi_flash *flash, u8 *rc)
83 cmd = CMD_READ_CONFIG;
84 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
86 debug("SF: fail to read config register\n");
93 static int write_cr(struct spi_flash *flash, u8 wc)
99 ret = read_sr(flash, &data[0]);
103 cmd = CMD_WRITE_STATUS;
105 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
107 debug("SF: fail to write config register\n");
115 #ifdef CONFIG_SPI_FLASH_STMICRO
116 static int read_evcr(struct spi_flash *flash, u8 *evcr)
119 const u8 cmd = CMD_READ_EVCR;
121 ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
123 debug("SF: error reading EVCR\n");
130 static int write_evcr(struct spi_flash *flash, u8 evcr)
135 cmd = CMD_WRITE_EVCR;
136 ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
138 debug("SF: error while writing EVCR register\n");
146 #ifdef CONFIG_SPI_FLASH_BAR
147 static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
152 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
153 if (bank_sel == flash->bank_curr)
156 cmd = flash->bank_write_cmd;
157 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
159 debug("SF: fail to write bank register\n");
164 flash->bank_curr = bank_sel;
165 return flash->bank_curr;
168 static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
173 if (flash->size <= SPI_FLASH_16MB_BOUN)
177 case SPI_FLASH_CFI_MFR_SPANSION:
178 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
179 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
182 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
183 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
186 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
189 debug("SF: fail to read bank addr register\n");
194 flash->bank_curr = curr_bank;
199 #ifdef CONFIG_SF_DUAL_FLASH
200 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
202 struct spi_slave *spi = flash->spi;
204 switch (flash->dual_flash) {
205 case SF_DUAL_STACKED_FLASH:
206 if (*addr >= (flash->size >> 1)) {
207 *addr -= flash->size >> 1;
208 spi->flags |= SPI_XFER_U_PAGE;
210 spi->flags &= ~SPI_XFER_U_PAGE;
213 case SF_DUAL_PARALLEL_FLASH:
214 *addr >>= flash->shift;
217 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
223 static int spi_flash_sr_ready(struct spi_flash *flash)
228 ret = read_sr(flash, &sr);
232 return !(sr & STATUS_WIP);
235 static int spi_flash_fsr_ready(struct spi_flash *flash)
240 ret = read_fsr(flash, &fsr);
244 return fsr & STATUS_PEC;
247 static int spi_flash_ready(struct spi_flash *flash)
251 sr = spi_flash_sr_ready(flash);
256 if (flash->flags & SNOR_F_USE_FSR) {
257 fsr = spi_flash_fsr_ready(flash);
265 static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
266 unsigned long timeout)
268 unsigned long timebase;
271 timebase = get_timer(0);
273 while (get_timer(timebase) < timeout) {
274 ret = spi_flash_ready(flash);
281 printf("SF: Timeout!\n");
286 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
287 size_t cmd_len, const void *buf, size_t buf_len)
289 struct spi_slave *spi = flash->spi;
290 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
294 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
296 ret = spi_claim_bus(spi);
298 debug("SF: unable to claim SPI bus\n");
302 ret = spi_flash_cmd_write_enable(flash);
304 debug("SF: enabling write failed\n");
308 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
310 debug("SF: write cmd failed\n");
314 ret = spi_flash_cmd_wait_ready(flash, timeout);
316 debug("SF: write %s timed out\n",
317 timeout == SPI_FLASH_PROG_TIMEOUT ?
318 "program" : "page erase");
322 spi_release_bus(spi);
327 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
329 u32 erase_size, erase_addr;
330 u8 cmd[SPI_FLASH_CMD_LEN];
333 erase_size = flash->erase_size;
334 if (offset % erase_size || len % erase_size) {
335 debug("SF: Erase offset/length not multiple of erase size\n");
339 if (flash->flash_is_locked) {
340 if (flash->flash_is_locked(flash, offset, len) > 0) {
341 printf("offset 0x%x is protected and cannot be erased\n",
347 cmd[0] = flash->erase_cmd;
351 #ifdef CONFIG_SF_DUAL_FLASH
352 if (flash->dual_flash > SF_SINGLE_FLASH)
353 spi_flash_dual(flash, &erase_addr);
355 #ifdef CONFIG_SPI_FLASH_BAR
356 ret = spi_flash_write_bar(flash, erase_addr);
360 spi_flash_addr(erase_addr, cmd);
362 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
363 cmd[2], cmd[3], erase_addr);
365 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
367 debug("SF: erase failed\n");
371 offset += erase_size;
378 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
379 size_t len, const void *buf)
381 struct spi_slave *spi = flash->spi;
382 unsigned long byte_addr, page_size;
384 size_t chunk_len, actual;
385 u8 cmd[SPI_FLASH_CMD_LEN];
388 page_size = flash->page_size;
390 if (flash->flash_is_locked) {
391 if (flash->flash_is_locked(flash, offset, len) > 0) {
392 printf("offset 0x%x is protected and cannot be written\n",
398 cmd[0] = flash->write_cmd;
399 for (actual = 0; actual < len; actual += chunk_len) {
402 #ifdef CONFIG_SF_DUAL_FLASH
403 if (flash->dual_flash > SF_SINGLE_FLASH)
404 spi_flash_dual(flash, &write_addr);
406 #ifdef CONFIG_SPI_FLASH_BAR
407 ret = spi_flash_write_bar(flash, write_addr);
411 byte_addr = offset % page_size;
412 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
414 if (spi->max_write_size)
415 chunk_len = min(chunk_len,
416 (size_t)spi->max_write_size);
418 spi_flash_addr(write_addr, cmd);
420 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
421 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
423 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
424 buf + actual, chunk_len);
426 debug("SF: write failed\n");
436 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
437 size_t cmd_len, void *data, size_t data_len)
439 struct spi_slave *spi = flash->spi;
442 ret = spi_claim_bus(spi);
444 debug("SF: unable to claim SPI bus\n");
448 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
450 debug("SF: read cmd failed\n");
454 spi_release_bus(spi);
460 * TODO: remove the weak after all the other spi_flash_copy_mmap
461 * implementations removed from drivers
463 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
466 if (!dma_memcpy(data, offset, len))
469 memcpy(data, offset, len);
472 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
473 size_t len, void *data)
475 struct spi_slave *spi = flash->spi;
477 u32 remain_len, read_len, read_addr;
481 /* Handle memory-mapped SPI */
482 if (flash->memory_map) {
483 ret = spi_claim_bus(spi);
485 debug("SF: unable to claim SPI bus\n");
488 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
489 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
490 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
491 spi_release_bus(spi);
495 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
496 cmd = calloc(1, cmdsz);
498 debug("SF: Failed to allocate cmd\n");
502 cmd[0] = flash->read_cmd;
506 #ifdef CONFIG_SF_DUAL_FLASH
507 if (flash->dual_flash > SF_SINGLE_FLASH)
508 spi_flash_dual(flash, &read_addr);
510 #ifdef CONFIG_SPI_FLASH_BAR
511 ret = spi_flash_write_bar(flash, read_addr);
514 bank_sel = flash->bank_curr;
516 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
517 (bank_sel + 1)) - offset;
518 if (len < remain_len)
521 read_len = remain_len;
523 spi_flash_addr(read_addr, cmd);
525 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
527 debug("SF: read failed\n");
540 #ifdef CONFIG_SPI_FLASH_SST
541 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
543 struct spi_slave *spi = flash->spi;
552 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
553 spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
555 ret = spi_flash_cmd_write_enable(flash);
559 ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
563 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
566 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
569 struct spi_slave *spi = flash->spi;
570 size_t actual, cmd_len;
574 ret = spi_claim_bus(spi);
576 debug("SF: Unable to claim SPI bus\n");
580 /* If the data is not word aligned, write out leading single byte */
583 ret = sst_byte_write(flash, offset, buf);
589 ret = spi_flash_cmd_write_enable(flash);
594 cmd[0] = CMD_SST_AAI_WP;
595 cmd[1] = offset >> 16;
596 cmd[2] = offset >> 8;
599 for (; actual < len - 1; actual += 2) {
600 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
601 spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
604 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
607 debug("SF: sst word program failed\n");
611 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
620 ret = spi_flash_cmd_write_disable(flash);
622 /* If there is a single trailing byte, write it out */
623 if (!ret && actual != len)
624 ret = sst_byte_write(flash, offset, buf + actual);
627 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
628 ret ? "failure" : "success", len, offset - actual);
630 spi_release_bus(spi);
634 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
637 struct spi_slave *spi = flash->spi;
641 ret = spi_claim_bus(spi);
643 debug("SF: Unable to claim SPI bus\n");
647 for (actual = 0; actual < len; actual++) {
648 ret = sst_byte_write(flash, offset, buf + actual);
650 debug("SF: sst byte program failed\n");
657 ret = spi_flash_cmd_write_disable(flash);
659 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
660 ret ? "failure" : "success", len, offset - actual);
662 spi_release_bus(spi);
667 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
668 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
671 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
672 int shift = ffs(mask) - 1;
680 pow = ((sr & mask) ^ mask) >> shift;
681 *len = flash->size >> pow;
682 *ofs = flash->size - *len;
687 * Return 1 if the entire region is locked, 0 otherwise
689 static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u64 len,
695 stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
697 return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
701 * Check if a region of the flash is (completely) locked. See stm_lock() for
704 * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
705 * negative on errors.
707 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
712 status = read_sr(flash, &sr);
716 return stm_is_locked_sr(flash, ofs, len, sr);
720 * Lock a region of the flash. Compatible with ST Micro and similar flash.
721 * Supports only the block protection bits BP{0,1,2} in the status register
722 * (SR). Does not support these features found in newer SR bitfields:
723 * - TB: top/bottom protect - only handle TB=0 (top protect)
724 * - SEC: sector/block protect - only handle SEC=0 (block protect)
725 * - CMP: complement protect - only support CMP=0 (range is not complemented)
727 * Sample table portion for 8MB flash (Winbond w25q64fw):
729 * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion
730 * --------------------------------------------------------------------------
731 * X | X | 0 | 0 | 0 | NONE | NONE
732 * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64
733 * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32
734 * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16
735 * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8
736 * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4
737 * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2
738 * X | X | 1 | 1 | 1 | 8 MB | ALL
740 * Returns negative on errors, 0 on success.
742 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
744 u8 status_old, status_new;
745 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
746 u8 shift = ffs(mask) - 1, pow, val;
749 ret = read_sr(flash, &status_old);
753 /* SPI NOR always locks to the end */
754 if (ofs + len != flash->size) {
755 /* Does combined region extend to end? */
756 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
759 len = flash->size - ofs;
763 * Need smallest pow such that:
765 * 1 / (2^pow) <= (len / size)
767 * so (assuming power-of-2 size) we do:
769 * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
771 pow = ilog2(flash->size) - ilog2(len);
772 val = mask - (pow << shift);
776 /* Don't "lock" with no region! */
780 status_new = (status_old & ~mask) | val;
782 /* Only modify protection if it will not unlock other areas */
783 if ((status_new & mask) <= (status_old & mask))
786 write_sr(flash, status_new);
792 * Unlock a region of the flash. See stm_lock() for more info
794 * Returns negative on errors, 0 on success.
796 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
798 uint8_t status_old, status_new;
799 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
800 u8 shift = ffs(mask) - 1, pow, val;
803 ret = read_sr(flash, &status_old);
807 /* Cannot unlock; would unlock larger region than requested */
808 if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
812 * Need largest pow such that:
814 * 1 / (2^pow) >= (len / size)
816 * so (assuming power-of-2 size) we do:
818 * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
820 pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
821 if (ofs + len == flash->size) {
822 val = 0; /* fully unlocked */
824 val = mask - (pow << shift);
825 /* Some power-of-two sizes are not supported */
830 status_new = (status_old & ~mask) | val;
832 /* Only modify protection if it will not lock other areas */
833 if ((status_new & mask) >= (status_old & mask))
836 write_sr(flash, status_new);
843 #ifdef CONFIG_SPI_FLASH_MACRONIX
844 static int macronix_quad_enable(struct spi_flash *flash)
849 ret = read_sr(flash, &qeb_status);
853 if (qeb_status & STATUS_QEB_MXIC)
856 ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC);
860 /* read SR and check it */
861 ret = read_sr(flash, &qeb_status);
862 if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) {
863 printf("SF: Macronix SR Quad bit not clear\n");
871 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
872 static int spansion_quad_enable(struct spi_flash *flash)
877 ret = read_cr(flash, &qeb_status);
881 if (qeb_status & STATUS_QEB_WINSPAN)
884 ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN);
888 /* read CR and check it */
889 ret = read_cr(flash, &qeb_status);
890 if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
891 printf("SF: Spansion CR Quad bit not clear\n");
899 #ifdef CONFIG_SPI_FLASH_STMICRO
900 static int micron_quad_enable(struct spi_flash *flash)
905 ret = read_evcr(flash, &qeb_status);
909 if (!(qeb_status & STATUS_QEB_MICRON))
912 ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
916 /* read EVCR and check it */
917 ret = read_evcr(flash, &qeb_status);
918 if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
919 printf("SF: Micron EVCR Quad bit not clear\n");
927 static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
930 #ifdef CONFIG_SPI_FLASH_MACRONIX
931 case SPI_FLASH_CFI_MFR_MACRONIX:
932 return macronix_quad_enable(flash);
934 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
935 case SPI_FLASH_CFI_MFR_SPANSION:
936 case SPI_FLASH_CFI_MFR_WINBOND:
937 return spansion_quad_enable(flash);
939 #ifdef CONFIG_SPI_FLASH_STMICRO
940 case SPI_FLASH_CFI_MFR_STMICRO:
941 return micron_quad_enable(flash);
944 printf("SF: Need set QEB func for %02x flash\n", idcode0);
949 #if CONFIG_IS_ENABLED(OF_CONTROL)
950 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
952 #ifdef CONFIG_DM_SPI_FLASH
955 int node = flash->dev->of_offset;
957 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
958 if (addr == FDT_ADDR_T_NONE) {
959 debug("%s: Cannot decode address\n", __func__);
963 if (flash->size != size) {
964 debug("%s: Memory map must cover entire device\n", __func__);
967 flash->memory_map = map_sysmem(addr, size);
972 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
974 int spi_flash_scan(struct spi_flash *flash)
976 struct spi_slave *spi = flash->spi;
977 const struct spi_flash_params *params;
978 u16 jedec, ext_jedec;
981 static u8 spi_read_cmds_array[] = {
984 CMD_READ_DUAL_OUTPUT_FAST,
985 CMD_READ_QUAD_OUTPUT_FAST,
986 CMD_READ_DUAL_IO_FAST,
987 CMD_READ_QUAD_IO_FAST };
989 /* Read the ID codes */
990 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
992 printf("SF: Failed to get idcodes\n");
997 printf("SF: Got idcodes\n");
998 print_buffer(0, idcode, 1, sizeof(idcode), 0);
1001 jedec = idcode[1] << 8 | idcode[2];
1002 ext_jedec = idcode[3] << 8 | idcode[4];
1004 /* Validate params from spi_flash_params table */
1005 params = spi_flash_params_table;
1006 for (; params->name != NULL; params++) {
1007 if ((params->jedec >> 16) == idcode[0]) {
1008 if ((params->jedec & 0xFFFF) == jedec) {
1009 if (params->ext_jedec == 0)
1011 else if (params->ext_jedec == ext_jedec)
1017 if (!params->name) {
1018 printf("SF: Unsupported flash IDs: ");
1019 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
1020 idcode[0], jedec, ext_jedec);
1021 return -EPROTONOSUPPORT;
1024 /* Flash powers up read-only, so clear BP# bits */
1025 if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
1026 idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
1027 idcode[0] == SPI_FLASH_CFI_MFR_SST)
1030 /* Assign spi data */
1031 flash->name = params->name;
1032 flash->memory_map = spi->memory_map;
1033 flash->dual_flash = spi->option;
1035 /* Assign spi flash flags */
1036 if (params->flags & SST_WR)
1037 flash->flags |= SNOR_F_SST_WR;
1039 /* Assign spi_flash ops */
1040 #ifndef CONFIG_DM_SPI_FLASH
1041 flash->write = spi_flash_cmd_write_ops;
1042 #if defined(CONFIG_SPI_FLASH_SST)
1043 if (flash->flags & SNOR_F_SST_WR) {
1044 if (spi->mode & SPI_TX_BYTE)
1045 flash->write = sst_write_bp;
1047 flash->write = sst_write_wp;
1050 flash->erase = spi_flash_cmd_erase_ops;
1051 flash->read = spi_flash_cmd_read_ops;
1054 /* lock hooks are flash specific - assign them based on idcode0 */
1055 switch (idcode[0]) {
1056 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
1057 case SPI_FLASH_CFI_MFR_STMICRO:
1058 case SPI_FLASH_CFI_MFR_SST:
1059 flash->flash_lock = stm_lock;
1060 flash->flash_unlock = stm_unlock;
1061 flash->flash_is_locked = stm_is_locked;
1065 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
1068 /* Compute the flash size */
1069 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
1071 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1072 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1073 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1076 if (ext_jedec == 0x4d00) {
1077 if ((jedec == 0x0215) || (jedec == 0x216))
1078 flash->page_size = 256;
1080 flash->page_size = 512;
1082 flash->page_size = 256;
1084 flash->page_size <<= flash->shift;
1085 flash->sector_size = params->sector_size << flash->shift;
1086 flash->size = flash->sector_size * params->nr_sectors << flash->shift;
1087 #ifdef CONFIG_SF_DUAL_FLASH
1088 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1092 /* Compute erase sector and command */
1093 if (params->flags & SECT_4K) {
1094 flash->erase_cmd = CMD_ERASE_4K;
1095 flash->erase_size = 4096 << flash->shift;
1096 } else if (params->flags & SECT_32K) {
1097 flash->erase_cmd = CMD_ERASE_32K;
1098 flash->erase_size = 32768 << flash->shift;
1100 flash->erase_cmd = CMD_ERASE_64K;
1101 flash->erase_size = flash->sector_size;
1104 /* Now erase size becomes valid sector size */
1105 flash->sector_size = flash->erase_size;
1107 /* Look for the fastest read cmd */
1108 cmd = fls(params->e_rd_cmd & spi->mode_rx);
1110 cmd = spi_read_cmds_array[cmd - 1];
1111 flash->read_cmd = cmd;
1113 /* Go for default supported read cmd */
1114 flash->read_cmd = CMD_READ_ARRAY_FAST;
1117 /* Not require to look for fastest only two write cmds yet */
1118 if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1119 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1121 /* Go for default supported write cmd */
1122 flash->write_cmd = CMD_PAGE_PROGRAM;
1124 /* Set the quad enable bit - only for quad commands */
1125 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1126 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1127 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1128 ret = set_quad_mode(flash, idcode[0]);
1130 debug("SF: Fail to set QEB for %02x\n", idcode[0]);
1135 /* Read dummy_byte: dummy byte is determined based on the
1136 * dummy cycles of a particular command.
1137 * Fast commands - dummy_byte = dummy_cycles/8
1138 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1139 * For I/O commands except cmd[0] everything goes on no.of lines
1140 * based on particular command but incase of fast commands except
1141 * data all go on single line irrespective of command.
1143 switch (flash->read_cmd) {
1144 case CMD_READ_QUAD_IO_FAST:
1145 flash->dummy_byte = 2;
1147 case CMD_READ_ARRAY_SLOW:
1148 flash->dummy_byte = 0;
1151 flash->dummy_byte = 1;
1154 #ifdef CONFIG_SPI_FLASH_STMICRO
1155 if (params->flags & E_FSR)
1156 flash->flags |= SNOR_F_USE_FSR;
1159 /* Configure the BAR - discover bank cmds and read current bank */
1160 #ifdef CONFIG_SPI_FLASH_BAR
1161 ret = spi_flash_read_bar(flash, idcode[0]);
1166 #if CONFIG_IS_ENABLED(OF_CONTROL)
1167 ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1169 debug("SF: FDT decode error\n");
1174 #ifndef CONFIG_SPL_BUILD
1175 printf("SF: Detected %s with page size ", flash->name);
1176 print_size(flash->page_size, ", erase size ");
1177 print_size(flash->erase_size, ", total ");
1178 print_size(flash->size, "");
1179 if (flash->memory_map)
1180 printf(", mapped at %p", flash->memory_map);
1184 #ifndef CONFIG_SPI_FLASH_BAR
1185 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1186 (flash->size > SPI_FLASH_16MB_BOUN)) ||
1187 ((flash->dual_flash > SF_SINGLE_FLASH) &&
1188 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1189 puts("SF: Warning - Only lower 16MiB accessible,");
1190 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");