drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <spi.h>
  15 #include <spi_flash.h>
  16 #include <watchdog.h>
  17 #include <linux/compiler.h>
  18
  19 #include "sf_internal.h"
  20
  21 static void spi_flash_addr(u32 addr, u8 *cmd)
  22 {
  23         /* cmd[0] is actual command */
  24         cmd[1] = addr >> 16;
  25         cmd[2] = addr >> 8;
  26         cmd[3] = addr >> 0;
  27 }
  28
  29 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  30 {
  31         int ret;
  32         u8 cmd;
  33
  34         cmd = CMD_READ_STATUS;
  35         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  36         if (ret < 0) {
  37                 debug("SF: fail to read status register\n");
  38                 return ret;
  39         }
  40
  41         return 0;
  42 }
  43
  44 static int read_fsr(struct spi_flash *flash, u8 *fsr)
  45 {
  46         int ret;
  47         const u8 cmd = CMD_FLAG_STATUS;
  48
  49         ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
  50         if (ret < 0) {
  51                 debug("SF: fail to read flag status register\n");
  52                 return ret;
  53         }
  54
  55         return 0;
  56 }
  57
  58 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  59 {
  60         u8 cmd;
  61         int ret;
  62
  63         cmd = CMD_WRITE_STATUS;
  64         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  65         if (ret < 0) {
  66                 debug("SF: fail to write status register\n");
  67                 return ret;
  68         }
  69
  70         return 0;
  71 }
  72
  73 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  74 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  75 {
  76         int ret;
  77         u8 cmd;
  78
  79         cmd = CMD_READ_CONFIG;
  80         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  81         if (ret < 0) {
  82                 debug("SF: fail to read config register\n");
  83                 return ret;
  84         }
  85
  86         return 0;
  87 }
  88
  89 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  90 {
  91         u8 data[2];
  92         u8 cmd;
  93         int ret;
  94
  95         ret = spi_flash_cmd_read_status(flash, &data[0]);
  96         if (ret < 0)
  97                 return ret;
  98
  99         cmd = CMD_WRITE_STATUS;
 100         data[1] = wc;
 101         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
 102         if (ret) {
 103                 debug("SF: fail to write config register\n");
 104                 return ret;
 105         }
 106
 107         return 0;
 108 }
 109 #endif
 110
 111 #ifdef CONFIG_SPI_FLASH_BAR
 112 static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
 113 {
 114         u8 cmd, bank_sel;
 115         int ret;
 116
 117         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 118         if (bank_sel == flash->bank_curr)
 119                 goto bar_end;
 120
 121         cmd = flash->bank_write_cmd;
 122         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 123         if (ret < 0) {
 124                 debug("SF: fail to write bank register\n");
 125                 return ret;
 126         }
 127
 128 bar_end:
 129         flash->bank_curr = bank_sel;
 130         return flash->bank_curr;
 131 }
 132 #endif
 133
 134 #ifdef CONFIG_SF_DUAL_FLASH
 135 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 136 {
 137         switch (flash->dual_flash) {
 138         case SF_DUAL_STACKED_FLASH:
 139                 if (*addr >= (flash->size >> 1)) {
 140                         *addr -= flash->size >> 1;
 141                         flash->spi->flags |= SPI_XFER_U_PAGE;
 142                 } else {
 143                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 144                 }
 145                 break;
 146         case SF_DUAL_PARALLEL_FLASH:
 147                 *addr >>= flash->shift;
 148                 break;
 149         default:
 150                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 151                 break;
 152         }
 153 }
 154 #endif
 155
 156 static int spi_flash_sr_ready(struct spi_flash *flash)
 157 {
 158         u8 sr;
 159         int ret;
 160
 161         ret = spi_flash_cmd_read_status(flash, &sr);
 162         if (ret < 0)
 163                 return ret;
 164
 165         return !(sr & STATUS_WIP);
 166 }
 167
 168 static int spi_flash_fsr_ready(struct spi_flash *flash)
 169 {
 170         u8 fsr;
 171         int ret;
 172
 173         ret = read_fsr(flash, &fsr);
 174         if (ret < 0)
 175                 return ret;
 176
 177         return fsr & STATUS_PEC;
 178 }
 179
 180 static int spi_flash_ready(struct spi_flash *flash)
 181 {
 182         int sr, fsr;
 183
 184         sr = spi_flash_sr_ready(flash);
 185         if (sr < 0)
 186                 return sr;
 187
 188         fsr = 1;
 189         if (flash->flags & SNOR_F_USE_FSR) {
 190                 fsr = spi_flash_fsr_ready(flash);
 191                 if (fsr < 0)
 192                         return fsr;
 193         }
 194
 195         return sr && fsr;
 196 }
 197
 198 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 199 {
 200         int timebase, ret;
 201
 202         timebase = get_timer(0);
 203
 204         while (get_timer(timebase) < timeout) {
 205                 ret = spi_flash_ready(flash);
 206                 if (ret < 0)
 207                         return ret;
 208                 if (ret)
 209                         return 0;
 210         }
 211
 212         printf("SF: Timeout!\n");
 213
 214         return -ETIMEDOUT;
 215 }
 216
 217 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 218                 size_t cmd_len, const void *buf, size_t buf_len)
 219 {
 220         struct spi_slave *spi = flash->spi;
 221         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 222         int ret;
 223
 224         if (buf == NULL)
 225                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 226
 227         ret = spi_claim_bus(flash->spi);
 228         if (ret) {
 229                 debug("SF: unable to claim SPI bus\n");
 230                 return ret;
 231         }
 232
 233         ret = spi_flash_cmd_write_enable(flash);
 234         if (ret < 0) {
 235                 debug("SF: enabling write failed\n");
 236                 return ret;
 237         }
 238
 239         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 240         if (ret < 0) {
 241                 debug("SF: write cmd failed\n");
 242                 return ret;
 243         }
 244
 245         ret = spi_flash_cmd_wait_ready(flash, timeout);
 246         if (ret < 0) {
 247                 debug("SF: write %s timed out\n",
 248                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 249                         "program" : "page erase");
 250                 return ret;
 251         }
 252
 253         spi_release_bus(spi);
 254
 255         return ret;
 256 }
 257
 258 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 259 {
 260         u32 erase_size, erase_addr;
 261         u8 cmd[SPI_FLASH_CMD_LEN];
 262         int ret = -1;
 263
 264         erase_size = flash->erase_size;
 265         if (offset % erase_size || len % erase_size) {
 266                 debug("SF: Erase offset/length not multiple of erase size\n");
 267                 return -1;
 268         }
 269
 270         cmd[0] = flash->erase_cmd;
 271         while (len) {
 272                 erase_addr = offset;
 273
 274 #ifdef CONFIG_SF_DUAL_FLASH
 275                 if (flash->dual_flash > SF_SINGLE_FLASH)
 276                         spi_flash_dual_flash(flash, &erase_addr);
 277 #endif
 278 #ifdef CONFIG_SPI_FLASH_BAR
 279                 ret = spi_flash_write_bank(flash, erase_addr);
 280                 if (ret < 0)
 281                         return ret;
 282 #endif
 283                 spi_flash_addr(erase_addr, cmd);
 284
 285                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 286                       cmd[2], cmd[3], erase_addr);
 287
 288                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 289                 if (ret < 0) {
 290                         debug("SF: erase failed\n");
 291                         break;
 292                 }
 293
 294                 offset += erase_size;
 295                 len -= erase_size;
 296         }
 297
 298         return ret;
 299 }
 300
 301 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 302                 size_t len, const void *buf)
 303 {
 304         unsigned long byte_addr, page_size;
 305         u32 write_addr;
 306         size_t chunk_len, actual;
 307         u8 cmd[SPI_FLASH_CMD_LEN];
 308         int ret = -1;
 309
 310         page_size = flash->page_size;
 311
 312         cmd[0] = flash->write_cmd;
 313         for (actual = 0; actual < len; actual += chunk_len) {
 314                 write_addr = offset;
 315
 316 #ifdef CONFIG_SF_DUAL_FLASH
 317                 if (flash->dual_flash > SF_SINGLE_FLASH)
 318                         spi_flash_dual_flash(flash, &write_addr);
 319 #endif
 320 #ifdef CONFIG_SPI_FLASH_BAR
 321                 ret = spi_flash_write_bank(flash, write_addr);
 322                 if (ret < 0)
 323                         return ret;
 324 #endif
 325                 byte_addr = offset % page_size;
 326                 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
 327
 328                 if (flash->spi->max_write_size)
 329                         chunk_len = min(chunk_len,
 330                                         (size_t)flash->spi->max_write_size);
 331
 332                 spi_flash_addr(write_addr, cmd);
 333
 334                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 335                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 336
 337                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 338                                         buf + actual, chunk_len);
 339                 if (ret < 0) {
 340                         debug("SF: write failed\n");
 341                         break;
 342                 }
 343
 344                 offset += chunk_len;
 345         }
 346
 347         return ret;
 348 }
 349
 350 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 351                 size_t cmd_len, void *data, size_t data_len)
 352 {
 353         struct spi_slave *spi = flash->spi;
 354         int ret;
 355
 356         ret = spi_claim_bus(flash->spi);
 357         if (ret) {
 358                 debug("SF: unable to claim SPI bus\n");
 359                 return ret;
 360         }
 361
 362         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 363         if (ret < 0) {
 364                 debug("SF: read cmd failed\n");
 365                 return ret;
 366         }
 367
 368         spi_release_bus(spi);
 369
 370         return ret;
 371 }
 372
 373 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
 374 {
 375         memcpy(data, offset, len);
 376 }
 377
 378 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 379                 size_t len, void *data)
 380 {
 381         u8 *cmd, cmdsz;
 382         u32 remain_len, read_len, read_addr;
 383         int bank_sel = 0;
 384         int ret = -1;
 385
 386         /* Handle memory-mapped SPI */
 387         if (flash->memory_map) {
 388                 ret = spi_claim_bus(flash->spi);
 389                 if (ret) {
 390                         debug("SF: unable to claim SPI bus\n");
 391                         return ret;
 392                 }
 393                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 394                 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
 395                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 396                 spi_release_bus(flash->spi);
 397                 return 0;
 398         }
 399
 400         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 401         cmd = calloc(1, cmdsz);
 402         if (!cmd) {
 403                 debug("SF: Failed to allocate cmd\n");
 404                 return -ENOMEM;
 405         }
 406
 407         cmd[0] = flash->read_cmd;
 408         while (len) {
 409                 read_addr = offset;
 410
 411 #ifdef CONFIG_SF_DUAL_FLASH
 412                 if (flash->dual_flash > SF_SINGLE_FLASH)
 413                         spi_flash_dual_flash(flash, &read_addr);
 414 #endif
 415 #ifdef CONFIG_SPI_FLASH_BAR
 416                 ret = spi_flash_write_bank(flash, read_addr);
 417                 if (ret < 0)
 418                         return ret;
 419                 bank_sel = flash->bank_curr;
 420 #endif
 421                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 422                                 (bank_sel + 1)) - offset;
 423                 if (len < remain_len)
 424                         read_len = len;
 425                 else
 426                         read_len = remain_len;
 427
 428                 spi_flash_addr(read_addr, cmd);
 429
 430                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 431                 if (ret < 0) {
 432                         debug("SF: read failed\n");
 433                         break;
 434                 }
 435
 436                 offset += read_len;
 437                 len -= read_len;
 438                 data += read_len;
 439         }
 440
 441         free(cmd);
 442         return ret;
 443 }
 444
 445 #ifdef CONFIG_SPI_FLASH_SST
 446 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 447 {
 448         int ret;
 449         u8 cmd[4] = {
 450                 CMD_SST_BP,
 451                 offset >> 16,
 452                 offset >> 8,
 453                 offset,
 454         };
 455
 456         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 457               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 458
 459         ret = spi_flash_cmd_write_enable(flash);
 460         if (ret)
 461                 return ret;
 462
 463         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 464         if (ret)
 465                 return ret;
 466
 467         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 468 }
 469
 470 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 471                 const void *buf)
 472 {
 473         size_t actual, cmd_len;
 474         int ret;
 475         u8 cmd[4];
 476
 477         ret = spi_claim_bus(flash->spi);
 478         if (ret) {
 479                 debug("SF: Unable to claim SPI bus\n");
 480                 return ret;
 481         }
 482
 483         /* If the data is not word aligned, write out leading single byte */
 484         actual = offset % 2;
 485         if (actual) {
 486                 ret = sst_byte_write(flash, offset, buf);
 487                 if (ret)
 488                         goto done;
 489         }
 490         offset += actual;
 491
 492         ret = spi_flash_cmd_write_enable(flash);
 493         if (ret)
 494                 goto done;
 495
 496         cmd_len = 4;
 497         cmd[0] = CMD_SST_AAI_WP;
 498         cmd[1] = offset >> 16;
 499         cmd[2] = offset >> 8;
 500         cmd[3] = offset;
 501
 502         for (; actual < len - 1; actual += 2) {
 503                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 504                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 505                       cmd[0], offset);
 506
 507                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 508                                         buf + actual, 2);
 509                 if (ret) {
 510                         debug("SF: sst word program failed\n");
 511                         break;
 512                 }
 513
 514                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 515                 if (ret)
 516                         break;
 517
 518                 cmd_len = 1;
 519                 offset += 2;
 520         }
 521
 522         if (!ret)
 523                 ret = spi_flash_cmd_write_disable(flash);
 524
 525         /* If there is a single trailing byte, write it out */
 526         if (!ret && actual != len)
 527                 ret = sst_byte_write(flash, offset, buf + actual);
 528
 529  done:
 530         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 531               ret ? "failure" : "success", len, offset - actual);
 532
 533         spi_release_bus(flash->spi);
 534         return ret;
 535 }
 536
 537 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
 538                 const void *buf)
 539 {
 540         size_t actual;
 541         int ret;
 542
 543         ret = spi_claim_bus(flash->spi);
 544         if (ret) {
 545                 debug("SF: Unable to claim SPI bus\n");
 546                 return ret;
 547         }
 548
 549         for (actual = 0; actual < len; actual++) {
 550                 ret = sst_byte_write(flash, offset, buf + actual);
 551                 if (ret) {
 552                         debug("SF: sst byte program failed\n");
 553                         break;
 554                 }
 555                 offset++;
 556         }
 557
 558         if (!ret)
 559                 ret = spi_flash_cmd_write_disable(flash);
 560
 561         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 562               ret ? "failure" : "success", len, offset - actual);
 563
 564         spi_release_bus(flash->spi);
 565         return ret;
 566 }
 567 #endif