drivers/mtd/spi/sf_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <malloc.h>
  13 #include <spi.h>
  14 #include <spi_flash.h>
  15 #include <watchdog.h>
  16
  17 #include "sf_internal.h"
  18
  19 static void spi_flash_addr(u32 addr, u8 *cmd)
  20 {
  21         /* cmd[0] is actual command */
  22         cmd[1] = addr >> 16;
  23         cmd[2] = addr >> 8;
  24         cmd[3] = addr >> 0;
  25 }
  26
  27 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  28 {
  29         int ret;
  30         u8 cmd;
  31
  32         cmd = CMD_READ_STATUS;
  33         ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  34         if (ret < 0) {
  35                 debug("SF: fail to read status register\n");
  36                 return ret;
  37         }
  38
  39         return 0;
  40 }
  41
  42 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  43 {
  44         u8 cmd;
  45         int ret;
  46
  47         cmd = CMD_WRITE_STATUS;
  48         ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  49         if (ret < 0) {
  50                 debug("SF: fail to write status register\n");
  51                 return ret;
  52         }
  53
  54         return 0;
  55 }
  56
  57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  58 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  59 {
  60         int ret;
  61         u8 cmd;
  62
  63         cmd = CMD_READ_CONFIG;
  64         ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  65         if (ret < 0) {
  66                 debug("SF: fail to read config register\n");
  67                 return ret;
  68         }
  69
  70         return 0;
  71 }
  72
  73 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  74 {
  75         u8 data[2];
  76         u8 cmd;
  77         int ret;
  78
  79         ret = spi_flash_cmd_read_status(flash, &data[0]);
  80         if (ret < 0)
  81                 return ret;
  82
  83         cmd = CMD_WRITE_STATUS;
  84         data[1] = wc;
  85         ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
  86         if (ret) {
  87                 debug("SF: fail to write config register\n");
  88                 return ret;
  89         }
  90
  91         return 0;
  92 }
  93 #endif
  94
  95 #ifdef CONFIG_SPI_FLASH_BAR
  96 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  97 {
  98         u8 cmd;
  99         int ret;
 100
 101         if (flash->bank_curr == bank_sel) {
 102                 debug("SF: not require to enable bank%d\n", bank_sel);
 103                 return 0;
 104         }
 105
 106         cmd = flash->bank_write_cmd;
 107         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 108         if (ret < 0) {
 109                 debug("SF: fail to write bank register\n");
 110                 return ret;
 111         }
 112         flash->bank_curr = bank_sel;
 113
 114         return 0;
 115 }
 116
 117 static int spi_flash_bank(struct spi_flash *flash, u32 offset)
 118 {
 119         u8 bank_sel;
 120         int ret;
 121
 122         bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
 123
 124         ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 125         if (ret) {
 126                 debug("SF: fail to set bank%d\n", bank_sel);
 127                 return ret;
 128         }
 129
 130         return bank_sel;
 131 }
 132 #endif
 133
 134 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
 135 {
 136         switch (flash->dual_flash) {
 137         case SF_DUAL_STACKED_FLASH:
 138                 if (*addr >= (flash->size >> 1)) {
 139                         *addr -= flash->size >> 1;
 140                         flash->spi->flags |= SPI_XFER_U_PAGE;
 141                 } else {
 142                         flash->spi->flags &= ~SPI_XFER_U_PAGE;
 143                 }
 144                 break;
 145         case SF_DUAL_PARALLEL_FLASH:
 146                 *addr >>= flash->shift;
 147                 break;
 148         default:
 149                 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
 150                 break;
 151         }
 152 }
 153
 154 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
 155 {
 156         struct spi_slave *spi = flash->spi;
 157         unsigned long timebase;
 158         unsigned long flags = SPI_XFER_BEGIN;
 159         int ret;
 160         u8 status;
 161         u8 check_status = 0x0;
 162         u8 poll_bit = STATUS_WIP;
 163         u8 cmd = flash->poll_cmd;
 164
 165         if (cmd == CMD_FLAG_STATUS) {
 166                 poll_bit = STATUS_PEC;
 167                 check_status = poll_bit;
 168         }
 169
 170         if (spi->flags & SPI_XFER_U_PAGE)
 171                 flags |= SPI_XFER_U_PAGE;
 172
 173         ret = spi_xfer(spi, 8, &cmd, NULL, flags);
 174         if (ret) {
 175                 debug("SF: fail to read %s status register\n",
 176                       cmd == CMD_READ_STATUS ? "read" : "flag");
 177                 return ret;
 178         }
 179
 180         timebase = get_timer(0);
 181         do {
 182                 WATCHDOG_RESET();
 183
 184                 ret = spi_xfer(spi, 8, NULL, &status, 0);
 185                 if (ret)
 186                         return -1;
 187
 188                 if ((status & poll_bit) == check_status)
 189                         break;
 190
 191         } while (get_timer(timebase) < timeout);
 192
 193         spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
 194
 195         if ((status & poll_bit) == check_status)
 196                 return 0;
 197
 198         /* Timed out */
 199         debug("SF: time out!\n");
 200         return -1;
 201 }
 202
 203 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 204                 size_t cmd_len, const void *buf, size_t buf_len)
 205 {
 206         struct spi_slave *spi = flash->spi;
 207         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 208         int ret;
 209
 210         if (buf == NULL)
 211                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 212
 213         ret = spi_claim_bus(flash->spi);
 214         if (ret) {
 215                 debug("SF: unable to claim SPI bus\n");
 216                 return ret;
 217         }
 218
 219         ret = spi_flash_cmd_write_enable(flash);
 220         if (ret < 0) {
 221                 debug("SF: enabling write failed\n");
 222                 return ret;
 223         }
 224
 225         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 226         if (ret < 0) {
 227                 debug("SF: write cmd failed\n");
 228                 return ret;
 229         }
 230
 231         ret = spi_flash_cmd_wait_ready(flash, timeout);
 232         if (ret < 0) {
 233                 debug("SF: write %s timed out\n",
 234                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 235                         "program" : "page erase");
 236                 return ret;
 237         }
 238
 239         spi_release_bus(spi);
 240
 241         return ret;
 242 }
 243
 244 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 245 {
 246         u32 erase_size, erase_addr;
 247         u8 cmd[SPI_FLASH_CMD_LEN];
 248         int ret = -1;
 249
 250         erase_size = flash->erase_size;
 251         if (offset % erase_size || len % erase_size) {
 252                 debug("SF: Erase offset/length not multiple of erase size\n");
 253                 return -1;
 254         }
 255
 256         cmd[0] = flash->erase_cmd;
 257         while (len) {
 258                 erase_addr = offset;
 259
 260                 if (flash->dual_flash > SF_SINGLE_FLASH)
 261                         spi_flash_dual_flash(flash, &erase_addr);
 262
 263 #ifdef CONFIG_SPI_FLASH_BAR
 264                 ret = spi_flash_bank(flash, erase_addr);
 265                 if (ret < 0)
 266                         return ret;
 267 #endif
 268                 spi_flash_addr(erase_addr, cmd);
 269
 270                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 271                       cmd[2], cmd[3], erase_addr);
 272
 273                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 274                 if (ret < 0) {
 275                         debug("SF: erase failed\n");
 276                         break;
 277                 }
 278
 279                 offset += erase_size;
 280                 len -= erase_size;
 281         }
 282
 283         return ret;
 284 }
 285
 286 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 287                 size_t len, const void *buf)
 288 {
 289         unsigned long byte_addr, page_size;
 290         u32 write_addr;
 291         size_t chunk_len, actual;
 292         u8 cmd[SPI_FLASH_CMD_LEN];
 293         int ret = -1;
 294
 295         page_size = flash->page_size;
 296
 297         cmd[0] = flash->write_cmd;
 298         for (actual = 0; actual < len; actual += chunk_len) {
 299                 write_addr = offset;
 300
 301                 if (flash->dual_flash > SF_SINGLE_FLASH)
 302                         spi_flash_dual_flash(flash, &write_addr);
 303
 304 #ifdef CONFIG_SPI_FLASH_BAR
 305                 ret = spi_flash_bank(flash, write_addr);
 306                 if (ret < 0)
 307                         return ret;
 308 #endif
 309                 byte_addr = offset % page_size;
 310                 chunk_len = min(len - actual, page_size - byte_addr);
 311
 312                 if (flash->spi->max_write_size)
 313                         chunk_len = min(chunk_len, flash->spi->max_write_size);
 314
 315                 spi_flash_addr(write_addr, cmd);
 316
 317                 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 318                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 319
 320                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 321                                         buf + actual, chunk_len);
 322                 if (ret < 0) {
 323                         debug("SF: write failed\n");
 324                         break;
 325                 }
 326
 327                 offset += chunk_len;
 328         }
 329
 330         return ret;
 331 }
 332
 333 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 334                 size_t cmd_len, void *data, size_t data_len)
 335 {
 336         struct spi_slave *spi = flash->spi;
 337         int ret;
 338
 339         ret = spi_claim_bus(flash->spi);
 340         if (ret) {
 341                 debug("SF: unable to claim SPI bus\n");
 342                 return ret;
 343         }
 344
 345         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 346         if (ret < 0) {
 347                 debug("SF: read cmd failed\n");
 348                 return ret;
 349         }
 350
 351         spi_release_bus(spi);
 352
 353         return ret;
 354 }
 355
 356 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 357                 size_t len, void *data)
 358 {
 359         u8 *cmd, cmdsz;
 360         u32 remain_len, read_len, read_addr;
 361         int bank_sel = 0;
 362         int ret = -1;
 363
 364         /* Handle memory-mapped SPI */
 365         if (flash->memory_map) {
 366                 ret = spi_claim_bus(flash->spi);
 367                 if (ret) {
 368                         debug("SF: unable to claim SPI bus\n");
 369                         return ret;
 370                 }
 371                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
 372                 memcpy(data, flash->memory_map + offset, len);
 373                 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
 374                 spi_release_bus(flash->spi);
 375                 return 0;
 376         }
 377
 378         cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
 379         cmd = malloc(cmdsz);
 380         memset(cmd, 0, cmdsz);
 381
 382         cmd[0] = flash->read_cmd;
 383         while (len) {
 384                 read_addr = offset;
 385
 386                 if (flash->dual_flash > SF_SINGLE_FLASH)
 387                         spi_flash_dual_flash(flash, &read_addr);
 388
 389 #ifdef CONFIG_SPI_FLASH_BAR
 390                 bank_sel = spi_flash_bank(flash, read_addr);
 391                 if (bank_sel < 0)
 392                         return ret;
 393 #endif
 394                 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 395                                 (bank_sel + 1)) - offset;
 396                 if (len < remain_len)
 397                         read_len = len;
 398                 else
 399                         read_len = remain_len;
 400
 401                 spi_flash_addr(read_addr, cmd);
 402
 403                 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 404                 if (ret < 0) {
 405                         debug("SF: read failed\n");
 406                         break;
 407                 }
 408
 409                 offset += read_len;
 410                 len -= read_len;
 411                 data += read_len;
 412         }
 413
 414         return ret;
 415 }
 416
 417 #ifdef CONFIG_SPI_FLASH_SST
 418 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 419 {
 420         int ret;
 421         u8 cmd[4] = {
 422                 CMD_SST_BP,
 423                 offset >> 16,
 424                 offset >> 8,
 425                 offset,
 426         };
 427
 428         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 429               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 430
 431         ret = spi_flash_cmd_write_enable(flash);
 432         if (ret)
 433                 return ret;
 434
 435         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 436         if (ret)
 437                 return ret;
 438
 439         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 440 }
 441
 442 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 443                 const void *buf)
 444 {
 445         size_t actual, cmd_len;
 446         int ret;
 447         u8 cmd[4];
 448
 449         ret = spi_claim_bus(flash->spi);
 450         if (ret) {
 451                 debug("SF: Unable to claim SPI bus\n");
 452                 return ret;
 453         }
 454
 455         /* If the data is not word aligned, write out leading single byte */
 456         actual = offset % 2;
 457         if (actual) {
 458                 ret = sst_byte_write(flash, offset, buf);
 459                 if (ret)
 460                         goto done;
 461         }
 462         offset += actual;
 463
 464         ret = spi_flash_cmd_write_enable(flash);
 465         if (ret)
 466                 goto done;
 467
 468         cmd_len = 4;
 469         cmd[0] = CMD_SST_AAI_WP;
 470         cmd[1] = offset >> 16;
 471         cmd[2] = offset >> 8;
 472         cmd[3] = offset;
 473
 474         for (; actual < len - 1; actual += 2) {
 475                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 476                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 477                       cmd[0], offset);
 478
 479                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 480                                         buf + actual, 2);
 481                 if (ret) {
 482                         debug("SF: sst word program failed\n");
 483                         break;
 484                 }
 485
 486                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 487                 if (ret)
 488                         break;
 489
 490                 cmd_len = 1;
 491                 offset += 2;
 492         }
 493
 494         if (!ret)
 495                 ret = spi_flash_cmd_write_disable(flash);
 496
 497         /* If there is a single trailing byte, write it out */
 498         if (!ret && actual != len)
 499                 ret = sst_byte_write(flash, offset, buf + actual);
 500
 501  done:
 502         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 503               ret ? "failure" : "success", len, offset - actual);
 504
 505         spi_release_bus(flash->spi);
 506         return ret;
 507 }
 508 #endif