2 * SPI flash internal definitions
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
13 #include <linux/types.h>
14 #include <linux/compiler.h>
16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
19 SF_DUAL_STACKED_FLASH = 1 << 0,
20 SF_DUAL_PARALLEL_FLASH = 1 << 1,
23 /* Enum list - Full read commands */
27 DUAL_OUTPUT_FAST = 1 << 2,
28 DUAL_IO_FAST = 1 << 3,
29 QUAD_OUTPUT_FAST = 1 << 4,
30 QUAD_IO_FAST = 1 << 5,
33 /* Normal - Extended - Full command set */
34 #define RD_NORM (ARRAY_SLOW | ARRAY_FAST)
35 #define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST)
36 #define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST)
40 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
52 #define SST_WR (SST_BP | SST_WP)
54 enum spi_nor_option_flags {
55 SNOR_F_SST_WR = (1 << 0),
56 SNOR_F_USE_FSR = (1 << 1),
59 #define SPI_FLASH_3B_ADDR_LEN 3
60 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
61 #define SPI_FLASH_16MB_BOUN 0x1000000
63 /* CFI Manufacture ID's */
64 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
65 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
66 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
67 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
70 #define CMD_ERASE_4K 0x20
71 #define CMD_ERASE_32K 0x52
72 #define CMD_ERASE_CHIP 0xc7
73 #define CMD_ERASE_64K 0xd8
76 #define CMD_WRITE_STATUS 0x01
77 #define CMD_PAGE_PROGRAM 0x02
78 #define CMD_WRITE_DISABLE 0x04
79 #define CMD_READ_STATUS 0x05
80 #define CMD_QUAD_PAGE_PROGRAM 0x32
81 #define CMD_READ_STATUS1 0x35
82 #define CMD_WRITE_ENABLE 0x06
83 #define CMD_READ_CONFIG 0x35
84 #define CMD_FLAG_STATUS 0x70
87 #define CMD_READ_ARRAY_SLOW 0x03
88 #define CMD_READ_ARRAY_FAST 0x0b
89 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
90 #define CMD_READ_DUAL_IO_FAST 0xbb
91 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
92 #define CMD_READ_QUAD_IO_FAST 0xeb
93 #define CMD_READ_ID 0x9f
95 /* Bank addr access commands */
96 #ifdef CONFIG_SPI_FLASH_BAR
97 # define CMD_BANKADDR_BRWR 0x17
98 # define CMD_BANKADDR_BRRD 0x16
99 # define CMD_EXTNADDR_WREAR 0xC5
100 # define CMD_EXTNADDR_RDEAR 0xC8
104 #define STATUS_WIP (1 << 0)
105 #define STATUS_QEB_WINSPAN (1 << 1)
106 #define STATUS_QEB_MXIC (1 << 6)
107 #define STATUS_PEC (1 << 7)
108 #define SR_BP0 BIT(2) /* Block protect 0 */
109 #define SR_BP1 BIT(3) /* Block protect 1 */
110 #define SR_BP2 BIT(4) /* Block protect 2 */
112 /* Flash timeout values */
113 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
114 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
115 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
118 #ifdef CONFIG_SPI_FLASH_SST
119 # define CMD_SST_BP 0x02 /* Byte Program */
120 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
122 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
124 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
129 * struct spi_flash_params - SPI/QSPI flash device params structure
131 * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
132 * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
133 * @ext_jedec: Device ext_jedec ID
134 * @sector_size: Isn't necessarily a sector size from vendor,
135 * the size listed here is what works with CMD_ERASE_64K
136 * @nr_sectors: No.of sectors on this device
137 * @e_rd_cmd: Enum list for read commands
138 * @flags: Important param, for flash specific behaviour
140 struct spi_flash_params {
150 extern const struct spi_flash_params spi_flash_params_table[];
152 /* Send a single-byte command to the device and read the response */
153 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
156 * Send a multi-byte command to the device and read the response. Used
157 * for flash array reads, etc.
159 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
160 size_t cmd_len, void *data, size_t data_len);
163 * Send a multi-byte command to the device followed by (optional)
164 * data. Used for programming the flash array, etc.
166 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
167 const void *data, size_t data_len);
170 /* Flash erase(sectors) operation, support all possible erase commands */
171 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
173 /* Read the status register */
174 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs);
176 /* Program the status register */
177 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
179 /* Lock stmicro spi flash region */
180 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
182 /* Unlock stmicro spi flash region */
183 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
185 /* Check if a stmicro spi flash region is completely locked */
186 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
188 /* Read the config register */
189 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
191 /* Program the config register */
192 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc);
194 /* Enable writing on the SPI flash */
195 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
197 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
200 /* Disable writing on the SPI flash */
201 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
203 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
207 * Send the read status command to the device and wait for the wip
208 * (write-in-progress) bit to clear itself.
210 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout);
213 * Used for spi_flash write operation
215 * - spi_flash_cmd_write_enable
216 * - spi_flash_cmd_write
217 * - spi_flash_cmd_wait_ready
220 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
221 size_t cmd_len, const void *buf, size_t buf_len);
224 * Flash write operation, support all possible write commands.
225 * Write the requested data out breaking it up into multiple write
226 * commands as needed per the write size.
228 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
229 size_t len, const void *buf);
232 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
233 * bus. Used as common part of the ->read() operation.
235 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
236 size_t cmd_len, void *data, size_t data_len);
238 /* Flash read operation, support all possible read commands */
239 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
240 size_t len, void *data);
242 #ifdef CONFIG_SPI_FLASH_MTD
243 int spi_flash_mtd_register(struct spi_flash *flash);
244 void spi_flash_mtd_unregister(void);
247 #endif /* _SF_INTERNAL_H_ */