2 * SPI flash internal definitions
4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef _SF_INTERNAL_H_
11 #define _SF_INTERNAL_H_
13 #include <linux/types.h>
14 #include <linux/compiler.h>
16 /* Dual SPI flash memories - see SPI_COMM_DUAL_... */
19 SF_DUAL_STACKED_FLASH = BIT(0),
20 SF_DUAL_PARALLEL_FLASH = BIT(1),
23 enum spi_nor_option_flags {
24 SNOR_F_SST_WR = BIT(0),
25 SNOR_F_USE_FSR = BIT(1),
26 SNOR_F_USE_UPAGE = BIT(3),
29 #define SPI_FLASH_3B_ADDR_LEN 3
30 #define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN)
31 #define SPI_FLASH_16MB_BOUN 0x1000000
33 /* CFI Manufacture ID's */
34 #define SPI_FLASH_CFI_MFR_SPANSION 0x01
35 #define SPI_FLASH_CFI_MFR_STMICRO 0x20
36 #define SPI_FLASH_CFI_MFR_MACRONIX 0xc2
37 #define SPI_FLASH_CFI_MFR_SST 0xbf
38 #define SPI_FLASH_CFI_MFR_WINBOND 0xef
39 #define SPI_FLASH_CFI_MFR_ATMEL 0x1f
42 #define CMD_ERASE_4K 0x20
43 #define CMD_ERASE_CHIP 0xc7
44 #define CMD_ERASE_64K 0xd8
47 #define CMD_WRITE_STATUS 0x01
48 #define CMD_PAGE_PROGRAM 0x02
49 #define CMD_WRITE_DISABLE 0x04
50 #define CMD_WRITE_ENABLE 0x06
51 #define CMD_QUAD_PAGE_PROGRAM 0x32
54 #define CMD_READ_ARRAY_SLOW 0x03
55 #define CMD_READ_ARRAY_FAST 0x0b
56 #define CMD_READ_DUAL_OUTPUT_FAST 0x3b
57 #define CMD_READ_DUAL_IO_FAST 0xbb
58 #define CMD_READ_QUAD_OUTPUT_FAST 0x6b
59 #define CMD_READ_QUAD_IO_FAST 0xeb
60 #define CMD_READ_ID 0x9f
61 #define CMD_READ_STATUS 0x05
62 #define CMD_READ_STATUS1 0x35
63 #define CMD_READ_CONFIG 0x35
64 #define CMD_FLAG_STATUS 0x70
66 /* Bank addr access commands */
67 #ifdef CONFIG_SPI_FLASH_BAR
68 # define CMD_BANKADDR_BRWR 0x17
69 # define CMD_BANKADDR_BRRD 0x16
70 # define CMD_EXTNADDR_WREAR 0xC5
71 # define CMD_EXTNADDR_RDEAR 0xC8
75 #define STATUS_WIP BIT(0)
76 #define STATUS_QEB_WINSPAN BIT(1)
77 #define STATUS_QEB_MXIC BIT(6)
78 #define STATUS_PEC BIT(7)
79 #define SR_BP0 BIT(2) /* Block protect 0 */
80 #define SR_BP1 BIT(3) /* Block protect 1 */
81 #define SR_BP2 BIT(4) /* Block protect 2 */
83 /* Flash timeout values */
84 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
85 #define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ)
86 #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ)
89 #ifdef CONFIG_SPI_FLASH_SST
90 # define CMD_SST_BP 0x02 /* Byte Program */
91 # define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
93 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
95 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
99 #define JEDEC_MFR(info) ((info)->id[0])
100 #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
101 #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
102 #define SPI_FLASH_MAX_ID_LEN 6
104 struct spi_flash_info {
105 /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
109 * This array stores the ID bytes.
110 * The first three bytes are the JEDIC ID.
111 * JEDEC ID zero means "no ID" (mostly older chips).
113 u8 id[SPI_FLASH_MAX_ID_LEN];
117 * The size listed here is what works with SPINOR_OP_SE, which isn't
118 * necessarily called a "sector" by the vendor.
126 #define SECT_4K BIT(0) /* CMD_ERASE_4K works uniformly */
127 #define E_FSR BIT(1) /* use flag status register for */
128 #define SST_WR BIT(2) /* use SST byte/word programming */
129 #define WR_QPP BIT(3) /* use Quad Page Program */
130 #define RD_QUAD BIT(4) /* use Quad Read */
131 #define RD_DUAL BIT(5) /* use Dual Read */
132 #define RD_QUADIO BIT(6) /* use Quad IO Read */
133 #define RD_DUALIO BIT(7) /* use Dual IO Read */
134 #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO)
137 extern const struct spi_flash_info spi_flash_ids[];
139 /* Send a single-byte command to the device and read the response */
140 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
143 * Send a multi-byte command to the device and read the response. Used
144 * for flash array reads, etc.
146 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
147 size_t cmd_len, void *data, size_t data_len);
150 * Send a multi-byte command to the device followed by (optional)
151 * data. Used for programming the flash array, etc.
153 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
154 const void *data, size_t data_len);
157 /* Flash erase(sectors) operation, support all possible erase commands */
158 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len);
160 /* Lock stmicro spi flash region */
161 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len);
163 /* Unlock stmicro spi flash region */
164 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len);
166 /* Check if a stmicro spi flash region is completely locked */
167 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len);
169 /* Enable writing on the SPI flash */
170 static inline int spi_flash_cmd_write_enable(struct spi_flash *flash)
172 return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0);
175 /* Disable writing on the SPI flash */
176 static inline int spi_flash_cmd_write_disable(struct spi_flash *flash)
178 return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0);
182 * Used for spi_flash write operation
184 * - spi_flash_cmd_write_enable
185 * - spi_flash_cmd_write
186 * - spi_flash_wait_till_ready
189 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
190 size_t cmd_len, const void *buf, size_t buf_len);
193 * Flash write operation, support all possible write commands.
194 * Write the requested data out breaking it up into multiple write
195 * commands as needed per the write size.
197 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
198 size_t len, const void *buf);
201 * Same as spi_flash_cmd_read() except it also claims/releases the SPI
202 * bus. Used as common part of the ->read() operation.
204 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
205 size_t cmd_len, void *data, size_t data_len);
207 /* Flash read operation, support all possible read commands */
208 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
209 size_t len, void *data);
211 #ifdef CONFIG_SPI_FLASH_MTD
212 int spi_flash_mtd_register(struct spi_flash *flash);
213 void spi_flash_mtd_unregister(void);
217 * spi_flash_scan - scan the SPI FLASH
218 * @flash: the spi flash structure
220 * The drivers can use this fuction to scan the SPI FLASH.
221 * In the scanning, it will try to get all the necessary information to
222 * fill the spi_flash{}.
224 * Return: 0 for success, others for failure.
226 int spi_flash_scan(struct spi_flash *flash);
228 #endif /* _SF_INTERNAL_H_ */