1 // SPDX-License-Identifier: GPL-2.0+
3 * Atmel DataFlash probing
5 * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
6 * Haikun Wang (haikun.wang@freescale.com)
16 #include <spi_flash.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
21 #include "sf_internal.h"
23 #define CMD_READ_ID 0x9f
24 /* reads can bypass the buffers */
25 #define OP_READ_CONTINUOUS 0xE8
26 #define OP_READ_PAGE 0xD2
28 /* group B requests can run even while status reports "busy" */
29 #define OP_READ_STATUS 0xD7 /* group B */
31 /* move data between host and buffer */
32 #define OP_READ_BUFFER1 0xD4 /* group B */
33 #define OP_READ_BUFFER2 0xD6 /* group B */
34 #define OP_WRITE_BUFFER1 0x84 /* group B */
35 #define OP_WRITE_BUFFER2 0x87 /* group B */
38 #define OP_ERASE_PAGE 0x81
39 #define OP_ERASE_BLOCK 0x50
41 /* move data between buffer and flash */
42 #define OP_TRANSFER_BUF1 0x53
43 #define OP_TRANSFER_BUF2 0x55
44 #define OP_MREAD_BUFFER1 0xD4
45 #define OP_MREAD_BUFFER2 0xD6
46 #define OP_MWERASE_BUFFER1 0x83
47 #define OP_MWERASE_BUFFER2 0x86
48 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
49 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
51 /* write to buffer, then write-erase to flash */
52 #define OP_PROGRAM_VIA_BUF1 0x82
53 #define OP_PROGRAM_VIA_BUF2 0x85
55 /* compare buffer to flash */
56 #define OP_COMPARE_BUF1 0x60
57 #define OP_COMPARE_BUF2 0x61
59 /* read flash to buffer, then write-erase to flash */
60 #define OP_REWRITE_VIA_BUF1 0x58
61 #define OP_REWRITE_VIA_BUF2 0x59
64 * newer chips report JEDEC manufacturer and device IDs; chip
65 * serial number and OTP bits; and per-sector writeprotect.
67 #define OP_READ_ID 0x9F
68 #define OP_READ_SECURITY 0x77
69 #define OP_WRITE_SECURITY_REVC 0x9A
70 #define OP_WRITE_SECURITY 0x9B /* revision D */
74 unsigned short page_offset; /* offset in flash address */
77 /* Return the status of the DataFlash device */
78 static inline int dataflash_status(struct spi_slave *spi)
81 u8 opcode = OP_READ_STATUS;
85 * NOTE: at45db321c over 25 MHz wants to write
86 * a dummy byte after the opcode...
88 ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1);
89 return ret ? -EIO : status;
93 * Poll the DataFlash device until it is READY.
94 * This usually takes 5-20 msec or so; more for sector erase.
97 static int dataflash_waitready(struct spi_slave *spi)
100 int timeout = 2 * CONFIG_SYS_HZ;
103 timebase = get_timer(0);
105 status = dataflash_status(spi);
109 if (status & (1 << 7)) /* RDY/nBSY */
113 } while (get_timer(timebase) < timeout);
118 /* Erase pages of flash */
119 static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
121 struct dataflash *dataflash;
122 struct spi_flash *spi_flash;
123 struct spi_slave *spi;
129 dataflash = dev_get_priv(dev);
130 spi_flash = dev_get_uclass_priv(dev);
131 spi = spi_flash->spi;
133 blocksize = spi_flash->page_size << 3;
135 memset(dataflash->command, 0 , sizeof(dataflash->command));
136 command = dataflash->command;
138 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
140 div_u64_rem(len, spi_flash->page_size, &rem);
142 printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
143 dev->name, len, spi_flash->page_size);
146 div_u64_rem(offset, spi_flash->page_size, &rem);
148 printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
149 dev->name, offset, spi_flash->page_size);
153 status = spi_claim_bus(spi);
155 debug("dataflash: unable to claim SPI bus\n");
160 unsigned int pageaddr;
163 * Calculate flash page address; use block erase (for speed) if
164 * we're at a block boundary and need to erase the whole block.
166 pageaddr = div_u64(offset, spi_flash->page_size);
167 do_block = (pageaddr & 0x7) == 0 && len >= blocksize;
168 pageaddr = pageaddr << dataflash->page_offset;
170 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
171 command[1] = (uint8_t)(pageaddr >> 16);
172 command[2] = (uint8_t)(pageaddr >> 8);
175 debug("%s ERASE %s: (%x) %x %x %x [%d]\n",
176 dev->name, do_block ? "block" : "page",
177 command[0], command[1], command[2], command[3],
180 status = spi_write_then_read(spi, command, 4, NULL, NULL, 0);
182 debug("%s: erase send command error!\n", dev->name);
186 status = dataflash_waitready(spi);
188 debug("%s: erase waitready error!\n", dev->name);
196 offset += spi_flash->page_size;
197 len -= spi_flash->page_size;
201 spi_release_bus(spi);
207 * Read from the DataFlash device.
208 * offset : Start offset in flash device
209 * len : Amount to read
210 * buf : Buffer containing the data
212 static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
215 struct dataflash *dataflash;
216 struct spi_flash *spi_flash;
217 struct spi_slave *spi;
222 dataflash = dev_get_priv(dev);
223 spi_flash = dev_get_uclass_priv(dev);
224 spi = spi_flash->spi;
226 memset(dataflash->command, 0 , sizeof(dataflash->command));
227 command = dataflash->command;
229 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
230 debug("READ: (%x) %x %x %x\n",
231 command[0], command[1], command[2], command[3]);
233 /* Calculate flash page/byte address */
234 addr = (((unsigned)offset / spi_flash->page_size)
235 << dataflash->page_offset)
236 + ((unsigned)offset % spi_flash->page_size);
238 status = spi_claim_bus(spi);
240 debug("dataflash: unable to claim SPI bus\n");
245 * Continuous read, max clock = f(car) which may be less than
246 * the peak rate available. Some chips support commands with
247 * fewer "don't care" bytes. Both buffers stay unchanged.
249 command[0] = OP_READ_CONTINUOUS;
250 command[1] = (uint8_t)(addr >> 16);
251 command[2] = (uint8_t)(addr >> 8);
252 command[3] = (uint8_t)(addr >> 0);
254 /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
255 status = spi_write_then_read(spi, command, 8, NULL, buf, len);
257 spi_release_bus(spi);
263 * Write to the DataFlash device.
264 * offset : Start offset in flash device
265 * len : Amount to write
266 * buf : Buffer containing the data
268 int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
271 struct dataflash *dataflash;
272 struct spi_flash *spi_flash;
273 struct spi_slave *spi;
275 unsigned int pageaddr, addr, to, writelen;
276 size_t remaining = len;
277 u_char *writebuf = (u_char *)buf;
278 int status = -EINVAL;
280 dataflash = dev_get_priv(dev);
281 spi_flash = dev_get_uclass_priv(dev);
282 spi = spi_flash->spi;
284 memset(dataflash->command, 0 , sizeof(dataflash->command));
285 command = dataflash->command;
287 debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len));
289 pageaddr = ((unsigned)offset / spi_flash->page_size);
290 to = ((unsigned)offset % spi_flash->page_size);
291 if (to + len > spi_flash->page_size)
292 writelen = spi_flash->page_size - to;
296 status = spi_claim_bus(spi);
298 debug("dataflash: unable to claim SPI bus\n");
302 while (remaining > 0) {
303 debug("write @ %d:%d len=%d\n", pageaddr, to, writelen);
307 * (a) each page in a sector must be rewritten at least
308 * once every 10K sibling erase/program operations.
309 * (b) for pages that are already erased, we could
310 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
311 * (c) WRITE to buffer could be done while waiting for
312 * a previous MWRITE/MWERASE to complete ...
313 * (d) error handling here seems to be mostly missing.
315 * Two persistent bits per page, plus a per-sector counter,
316 * could support (a) and (b) ... we might consider using
317 * the second half of sector zero, which is just one block,
318 * to track that state. (On AT91, that sector should also
319 * support boot-from-DataFlash.)
322 addr = pageaddr << dataflash->page_offset;
324 /* (1) Maybe transfer partial page to Buffer1 */
325 if (writelen != spi_flash->page_size) {
326 command[0] = OP_TRANSFER_BUF1;
327 command[1] = (addr & 0x00FF0000) >> 16;
328 command[2] = (addr & 0x0000FF00) >> 8;
331 debug("TRANSFER: (%x) %x %x %x\n",
332 command[0], command[1], command[2], command[3]);
334 status = spi_write_then_read(spi, command, 4,
337 debug("%s: write(<pagesize) command error!\n",
342 status = dataflash_waitready(spi);
344 debug("%s: write(<pagesize) waitready error!\n",
350 /* (2) Program full page via Buffer1 */
352 command[0] = OP_PROGRAM_VIA_BUF1;
353 command[1] = (addr & 0x00FF0000) >> 16;
354 command[2] = (addr & 0x0000FF00) >> 8;
355 command[3] = (addr & 0x000000FF);
357 debug("PROGRAM: (%x) %x %x %x\n",
358 command[0], command[1], command[2], command[3]);
360 status = spi_write_then_read(spi, command, 4,
361 writebuf, NULL, writelen);
363 debug("%s: write send command error!\n", dev->name);
367 status = dataflash_waitready(spi);
369 debug("%s: write waitready error!\n", dev->name);
373 #ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY
374 /* (3) Compare to Buffer1 */
375 addr = pageaddr << dataflash->page_offset;
376 command[0] = OP_COMPARE_BUF1;
377 command[1] = (addr & 0x00FF0000) >> 16;
378 command[2] = (addr & 0x0000FF00) >> 8;
381 debug("COMPARE: (%x) %x %x %x\n",
382 command[0], command[1], command[2], command[3]);
384 status = spi_write_then_read(spi, command, 4,
385 writebuf, NULL, writelen);
387 debug("%s: write(compare) send command error!\n",
392 status = dataflash_waitready(spi);
394 /* Check result of the compare operation */
395 if (status & (1 << 6)) {
396 printf("dataflash: write compare page %u, err %d\n",
405 #endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */
406 remaining = remaining - writelen;
409 writebuf += writelen;
411 if (remaining > spi_flash->page_size)
412 writelen = spi_flash->page_size;
414 writelen = remaining;
417 spi_release_bus(spi);
422 static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
423 int pagesize, int pageoffset, char revision)
425 struct spi_flash *spi_flash;
426 struct dataflash *dataflash;
428 dataflash = dev_get_priv(dev);
429 spi_flash = dev_get_uclass_priv(dev);
431 dataflash->page_offset = pageoffset;
433 spi_flash->name = name;
434 spi_flash->page_size = pagesize;
435 spi_flash->size = nr_pages * pagesize;
436 spi_flash->erase_size = pagesize;
438 #ifndef CONFIG_SPL_BUILD
439 printf("SPI DataFlash: Detected %s with page size ", spi_flash->name);
440 print_size(spi_flash->page_size, ", erase size ");
441 print_size(spi_flash->erase_size, ", total ");
442 print_size(spi_flash->size, "");
443 printf(", revision %c", revision);
450 struct data_flash_info {
454 * JEDEC id has a high byte of zero plus three data bytes:
455 * the manufacturer id, then a two byte device id.
459 /* The size listed here is what works with OP_ERASE_PAGE. */
465 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
466 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
469 static struct data_flash_info dataflash_data[] = {
471 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
472 * one with IS_POW2PS and the other without. The entry with the
473 * non-2^N byte page size can't name exact chip revisions without
474 * losing backwards compatibility for cmdlinepart.
476 * Those two entries have different name spelling format in order to
477 * show their difference obviously.
478 * The upper case refer to the chip isn't in normal 2^N bytes page-size
480 * The lower case refer to the chip is in normal 2^N bytes page-size
483 * These newer chips also support 128-byte security registers (with
484 * 64 bytes one-time-programmable) and software write-protection.
486 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
487 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
489 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
490 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
492 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
493 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
495 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
496 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
498 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
499 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
501 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
503 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
504 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
506 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
507 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
510 static struct data_flash_info *jedec_probe(struct spi_slave *spi)
515 struct data_flash_info *info;
516 u8 opcode = CMD_READ_ID;
520 * JEDEC also defines an optional "extended device information"
521 * string for after vendor-specific data, after the three bytes
522 * we use here. Supporting some chips might require using it.
524 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
525 * That's not an error; only rev C and newer chips handle it, and
526 * only Atmel sells these chips.
528 tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, sizeof(id));
530 printf("dataflash: error %d reading JEDEC ID\n", tmp);
542 for (tmp = 0, info = dataflash_data;
543 tmp < ARRAY_SIZE(dataflash_data);
545 if (info->jedec_id == jedec) {
546 if (info->flags & SUP_POW2PS) {
547 status = dataflash_status(spi);
549 debug("dataflash: status error %d\n",
554 if (info->flags & IS_POW2PS)
557 if (!(info->flags & IS_POW2PS))
567 * Treat other chips as errors ... we won't know the right page
568 * size (it might be binary) even when we can tell which density
569 * class is involved (legacy chip id scheme).
571 printf("dataflash: JEDEC id %06x not handled\n", jedec);
572 return ERR_PTR(-ENODEV);
576 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
577 * or else the ID code embedded in the status bits:
579 * Device Density ID code #Pages PageSize Offset
580 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
581 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
582 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
583 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
584 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
585 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
586 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
587 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
589 static int spi_dataflash_probe(struct udevice *dev)
591 struct spi_slave *spi = dev_get_parent_priv(dev);
592 struct spi_flash *spi_flash;
593 struct data_flash_info *info;
596 spi_flash = dev_get_uclass_priv(dev);
597 spi_flash->spi = spi;
598 spi_flash->dev = dev;
600 status = spi_claim_bus(spi);
605 * Try to detect dataflash by JEDEC ID.
606 * If it succeeds we know we have either a C or D part.
607 * D will support power of 2 pagesize option.
608 * Both support the security register, though with different
611 info = jedec_probe(spi);
613 goto err_jedec_probe;
615 status = add_dataflash(dev, info->name, info->nr_pages,
616 info->pagesize, info->pageoffset,
617 (info->flags & SUP_POW2PS) ? 'd' : 'c');
623 * Older chips support only legacy commands, identifing
624 * capacity using bits in the status byte.
626 status = dataflash_status(spi);
627 if (status <= 0 || status == 0xff) {
628 printf("dataflash: read status error %d\n", status);
629 if (status == 0 || status == 0xff)
631 goto err_jedec_probe;
635 * if there's a device there, assume it's dataflash.
636 * board setup should have set spi->max_speed_max to
637 * match f(car) for continuous reads, mode 0 or 3.
639 switch (status & 0x3c) {
640 case 0x0c: /* 0 0 1 1 x x */
641 status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0);
643 case 0x14: /* 0 1 0 1 x x */
644 status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0);
646 case 0x1c: /* 0 1 1 1 x x */
647 status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0);
649 case 0x24: /* 1 0 0 1 x x */
650 status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0);
652 case 0x2c: /* 1 0 1 1 x x */
653 status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0);
655 case 0x34: /* 1 1 0 1 x x */
656 status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0);
658 case 0x38: /* 1 1 1 x x x */
660 status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0);
662 /* obsolete AT45DB1282 not (yet?) supported */
664 printf("dataflash: unsupported device (%x)\n", status & 0x3c);
674 spi_release_bus(spi);
678 static const struct dm_spi_flash_ops spi_dataflash_ops = {
679 .read = spi_dataflash_read,
680 .write = spi_dataflash_write,
681 .erase = spi_dataflash_erase,
684 static const struct udevice_id spi_dataflash_ids[] = {
685 { .compatible = "atmel,at45", },
686 { .compatible = "atmel,dataflash", },
690 U_BOOT_DRIVER(spi_dataflash) = {
691 .name = "spi_dataflash",
692 .id = UCLASS_SPI_FLASH,
693 .of_match = spi_dataflash_ids,
694 .probe = spi_dataflash_probe,
695 .priv_auto_alloc_size = sizeof(struct dataflash),
696 .ops = &spi_dataflash_ops,