1 // SPDX-License-Identifier: GPL-2.0+
3 * Atmel DataFlash probing
5 * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
6 * Haikun Wang (haikun.wang@freescale.com)
14 #include <spi_flash.h>
16 #include <linux/err.h>
17 #include <linux/math64.h>
19 #include "sf_internal.h"
21 #define CMD_READ_ID 0x9f
22 /* reads can bypass the buffers */
23 #define OP_READ_CONTINUOUS 0xE8
24 #define OP_READ_PAGE 0xD2
26 /* group B requests can run even while status reports "busy" */
27 #define OP_READ_STATUS 0xD7 /* group B */
29 /* move data between host and buffer */
30 #define OP_READ_BUFFER1 0xD4 /* group B */
31 #define OP_READ_BUFFER2 0xD6 /* group B */
32 #define OP_WRITE_BUFFER1 0x84 /* group B */
33 #define OP_WRITE_BUFFER2 0x87 /* group B */
36 #define OP_ERASE_PAGE 0x81
37 #define OP_ERASE_BLOCK 0x50
39 /* move data between buffer and flash */
40 #define OP_TRANSFER_BUF1 0x53
41 #define OP_TRANSFER_BUF2 0x55
42 #define OP_MREAD_BUFFER1 0xD4
43 #define OP_MREAD_BUFFER2 0xD6
44 #define OP_MWERASE_BUFFER1 0x83
45 #define OP_MWERASE_BUFFER2 0x86
46 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
47 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
49 /* write to buffer, then write-erase to flash */
50 #define OP_PROGRAM_VIA_BUF1 0x82
51 #define OP_PROGRAM_VIA_BUF2 0x85
53 /* compare buffer to flash */
54 #define OP_COMPARE_BUF1 0x60
55 #define OP_COMPARE_BUF2 0x61
57 /* read flash to buffer, then write-erase to flash */
58 #define OP_REWRITE_VIA_BUF1 0x58
59 #define OP_REWRITE_VIA_BUF2 0x59
62 * newer chips report JEDEC manufacturer and device IDs; chip
63 * serial number and OTP bits; and per-sector writeprotect.
65 #define OP_READ_ID 0x9F
66 #define OP_READ_SECURITY 0x77
67 #define OP_WRITE_SECURITY_REVC 0x9A
68 #define OP_WRITE_SECURITY 0x9B /* revision D */
72 unsigned short page_offset; /* offset in flash address */
75 /* Return the status of the DataFlash device */
76 static inline int dataflash_status(struct spi_slave *spi)
79 u8 opcode = OP_READ_STATUS;
83 * NOTE: at45db321c over 25 MHz wants to write
84 * a dummy byte after the opcode...
86 ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1);
87 return ret ? -EIO : status;
91 * Poll the DataFlash device until it is READY.
92 * This usually takes 5-20 msec or so; more for sector erase.
95 static int dataflash_waitready(struct spi_slave *spi)
98 int timeout = 2 * CONFIG_SYS_HZ;
101 timebase = get_timer(0);
103 status = dataflash_status(spi);
107 if (status & (1 << 7)) /* RDY/nBSY */
111 } while (get_timer(timebase) < timeout);
116 /* Erase pages of flash */
117 static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
119 struct dataflash *dataflash;
120 struct spi_flash *spi_flash;
121 struct spi_slave *spi;
127 dataflash = dev_get_priv(dev);
128 spi_flash = dev_get_uclass_priv(dev);
129 spi = spi_flash->spi;
131 blocksize = spi_flash->page_size << 3;
133 memset(dataflash->command, 0 , sizeof(dataflash->command));
134 command = dataflash->command;
136 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
138 div_u64_rem(len, spi_flash->page_size, &rem);
140 printf("%s: len(0x%x) isn't the multiple of page size(0x%x)\n",
141 dev->name, len, spi_flash->page_size);
144 div_u64_rem(offset, spi_flash->page_size, &rem);
146 printf("%s: offset(0x%x) isn't the multiple of page size(0x%x)\n",
147 dev->name, offset, spi_flash->page_size);
151 status = spi_claim_bus(spi);
153 debug("dataflash: unable to claim SPI bus\n");
158 unsigned int pageaddr;
161 * Calculate flash page address; use block erase (for speed) if
162 * we're at a block boundary and need to erase the whole block.
164 pageaddr = div_u64(offset, spi_flash->page_size);
165 do_block = (pageaddr & 0x7) == 0 && len >= blocksize;
166 pageaddr = pageaddr << dataflash->page_offset;
168 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
169 command[1] = (uint8_t)(pageaddr >> 16);
170 command[2] = (uint8_t)(pageaddr >> 8);
173 debug("%s ERASE %s: (%x) %x %x %x [%d]\n",
174 dev->name, do_block ? "block" : "page",
175 command[0], command[1], command[2], command[3],
178 status = spi_write_then_read(spi, command, 4, NULL, NULL, 0);
180 debug("%s: erase send command error!\n", dev->name);
184 status = dataflash_waitready(spi);
186 debug("%s: erase waitready error!\n", dev->name);
194 offset += spi_flash->page_size;
195 len -= spi_flash->page_size;
199 spi_release_bus(spi);
205 * Read from the DataFlash device.
206 * offset : Start offset in flash device
207 * len : Amount to read
208 * buf : Buffer containing the data
210 static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
213 struct dataflash *dataflash;
214 struct spi_flash *spi_flash;
215 struct spi_slave *spi;
220 dataflash = dev_get_priv(dev);
221 spi_flash = dev_get_uclass_priv(dev);
222 spi = spi_flash->spi;
224 memset(dataflash->command, 0 , sizeof(dataflash->command));
225 command = dataflash->command;
227 debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len);
228 debug("READ: (%x) %x %x %x\n",
229 command[0], command[1], command[2], command[3]);
231 /* Calculate flash page/byte address */
232 addr = (((unsigned)offset / spi_flash->page_size)
233 << dataflash->page_offset)
234 + ((unsigned)offset % spi_flash->page_size);
236 status = spi_claim_bus(spi);
238 debug("dataflash: unable to claim SPI bus\n");
243 * Continuous read, max clock = f(car) which may be less than
244 * the peak rate available. Some chips support commands with
245 * fewer "don't care" bytes. Both buffers stay unchanged.
247 command[0] = OP_READ_CONTINUOUS;
248 command[1] = (uint8_t)(addr >> 16);
249 command[2] = (uint8_t)(addr >> 8);
250 command[3] = (uint8_t)(addr >> 0);
252 /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */
253 status = spi_write_then_read(spi, command, 8, NULL, buf, len);
255 spi_release_bus(spi);
261 * Write to the DataFlash device.
262 * offset : Start offset in flash device
263 * len : Amount to write
264 * buf : Buffer containing the data
266 int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
269 struct dataflash *dataflash;
270 struct spi_flash *spi_flash;
271 struct spi_slave *spi;
273 unsigned int pageaddr, addr, to, writelen;
274 size_t remaining = len;
275 u_char *writebuf = (u_char *)buf;
276 int status = -EINVAL;
278 dataflash = dev_get_priv(dev);
279 spi_flash = dev_get_uclass_priv(dev);
280 spi = spi_flash->spi;
282 memset(dataflash->command, 0 , sizeof(dataflash->command));
283 command = dataflash->command;
285 debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len));
287 pageaddr = ((unsigned)offset / spi_flash->page_size);
288 to = ((unsigned)offset % spi_flash->page_size);
289 if (to + len > spi_flash->page_size)
290 writelen = spi_flash->page_size - to;
294 status = spi_claim_bus(spi);
296 debug("dataflash: unable to claim SPI bus\n");
300 while (remaining > 0) {
301 debug("write @ %d:%d len=%d\n", pageaddr, to, writelen);
305 * (a) each page in a sector must be rewritten at least
306 * once every 10K sibling erase/program operations.
307 * (b) for pages that are already erased, we could
308 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
309 * (c) WRITE to buffer could be done while waiting for
310 * a previous MWRITE/MWERASE to complete ...
311 * (d) error handling here seems to be mostly missing.
313 * Two persistent bits per page, plus a per-sector counter,
314 * could support (a) and (b) ... we might consider using
315 * the second half of sector zero, which is just one block,
316 * to track that state. (On AT91, that sector should also
317 * support boot-from-DataFlash.)
320 addr = pageaddr << dataflash->page_offset;
322 /* (1) Maybe transfer partial page to Buffer1 */
323 if (writelen != spi_flash->page_size) {
324 command[0] = OP_TRANSFER_BUF1;
325 command[1] = (addr & 0x00FF0000) >> 16;
326 command[2] = (addr & 0x0000FF00) >> 8;
329 debug("TRANSFER: (%x) %x %x %x\n",
330 command[0], command[1], command[2], command[3]);
332 status = spi_write_then_read(spi, command, 4,
335 debug("%s: write(<pagesize) command error!\n",
340 status = dataflash_waitready(spi);
342 debug("%s: write(<pagesize) waitready error!\n",
348 /* (2) Program full page via Buffer1 */
350 command[0] = OP_PROGRAM_VIA_BUF1;
351 command[1] = (addr & 0x00FF0000) >> 16;
352 command[2] = (addr & 0x0000FF00) >> 8;
353 command[3] = (addr & 0x000000FF);
355 debug("PROGRAM: (%x) %x %x %x\n",
356 command[0], command[1], command[2], command[3]);
358 status = spi_write_then_read(spi, command, 4,
359 writebuf, NULL, writelen);
361 debug("%s: write send command error!\n", dev->name);
365 status = dataflash_waitready(spi);
367 debug("%s: write waitready error!\n", dev->name);
371 #ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY
372 /* (3) Compare to Buffer1 */
373 addr = pageaddr << dataflash->page_offset;
374 command[0] = OP_COMPARE_BUF1;
375 command[1] = (addr & 0x00FF0000) >> 16;
376 command[2] = (addr & 0x0000FF00) >> 8;
379 debug("COMPARE: (%x) %x %x %x\n",
380 command[0], command[1], command[2], command[3]);
382 status = spi_write_then_read(spi, command, 4,
383 writebuf, NULL, writelen);
385 debug("%s: write(compare) send command error!\n",
390 status = dataflash_waitready(spi);
392 /* Check result of the compare operation */
393 if (status & (1 << 6)) {
394 printf("dataflash: write compare page %u, err %d\n",
403 #endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */
404 remaining = remaining - writelen;
407 writebuf += writelen;
409 if (remaining > spi_flash->page_size)
410 writelen = spi_flash->page_size;
412 writelen = remaining;
415 spi_release_bus(spi);
420 static int add_dataflash(struct udevice *dev, char *name, int nr_pages,
421 int pagesize, int pageoffset, char revision)
423 struct spi_flash *spi_flash;
424 struct dataflash *dataflash;
426 dataflash = dev_get_priv(dev);
427 spi_flash = dev_get_uclass_priv(dev);
429 dataflash->page_offset = pageoffset;
431 spi_flash->name = name;
432 spi_flash->page_size = pagesize;
433 spi_flash->size = nr_pages * pagesize;
434 spi_flash->erase_size = pagesize;
436 #ifndef CONFIG_SPL_BUILD
437 printf("SPI DataFlash: Detected %s with page size ", spi_flash->name);
438 print_size(spi_flash->page_size, ", erase size ");
439 print_size(spi_flash->erase_size, ", total ");
440 print_size(spi_flash->size, "");
441 printf(", revision %c", revision);
448 struct data_flash_info {
452 * JEDEC id has a high byte of zero plus three data bytes:
453 * the manufacturer id, then a two byte device id.
457 /* The size listed here is what works with OP_ERASE_PAGE. */
463 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
464 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
467 static struct data_flash_info dataflash_data[] = {
469 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
470 * one with IS_POW2PS and the other without. The entry with the
471 * non-2^N byte page size can't name exact chip revisions without
472 * losing backwards compatibility for cmdlinepart.
474 * Those two entries have different name spelling format in order to
475 * show their difference obviously.
476 * The upper case refer to the chip isn't in normal 2^N bytes page-size
478 * The lower case refer to the chip is in normal 2^N bytes page-size
481 * These newer chips also support 128-byte security registers (with
482 * 64 bytes one-time-programmable) and software write-protection.
484 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
485 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
487 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
488 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
490 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
491 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
493 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
494 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
496 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
497 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
499 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
501 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
502 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
504 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
505 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
508 static struct data_flash_info *jedec_probe(struct spi_slave *spi)
513 struct data_flash_info *info;
514 u8 opcode = CMD_READ_ID;
518 * JEDEC also defines an optional "extended device information"
519 * string for after vendor-specific data, after the three bytes
520 * we use here. Supporting some chips might require using it.
522 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
523 * That's not an error; only rev C and newer chips handle it, and
524 * only Atmel sells these chips.
526 tmp = spi_write_then_read(spi, &opcode, 1, NULL, id, sizeof(id));
528 printf("dataflash: error %d reading JEDEC ID\n", tmp);
540 for (tmp = 0, info = dataflash_data;
541 tmp < ARRAY_SIZE(dataflash_data);
543 if (info->jedec_id == jedec) {
544 if (info->flags & SUP_POW2PS) {
545 status = dataflash_status(spi);
547 debug("dataflash: status error %d\n",
552 if (info->flags & IS_POW2PS)
555 if (!(info->flags & IS_POW2PS))
565 * Treat other chips as errors ... we won't know the right page
566 * size (it might be binary) even when we can tell which density
567 * class is involved (legacy chip id scheme).
569 printf("dataflash: JEDEC id %06x not handled\n", jedec);
570 return ERR_PTR(-ENODEV);
574 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
575 * or else the ID code embedded in the status bits:
577 * Device Density ID code #Pages PageSize Offset
578 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
579 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
580 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
581 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
582 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
583 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
584 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
585 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
587 static int spi_dataflash_probe(struct udevice *dev)
589 struct spi_slave *spi = dev_get_parent_priv(dev);
590 struct spi_flash *spi_flash;
591 struct data_flash_info *info;
594 spi_flash = dev_get_uclass_priv(dev);
595 spi_flash->spi = spi;
596 spi_flash->dev = dev;
598 status = spi_claim_bus(spi);
603 * Try to detect dataflash by JEDEC ID.
604 * If it succeeds we know we have either a C or D part.
605 * D will support power of 2 pagesize option.
606 * Both support the security register, though with different
609 info = jedec_probe(spi);
611 goto err_jedec_probe;
613 status = add_dataflash(dev, info->name, info->nr_pages,
614 info->pagesize, info->pageoffset,
615 (info->flags & SUP_POW2PS) ? 'd' : 'c');
621 * Older chips support only legacy commands, identifing
622 * capacity using bits in the status byte.
624 status = dataflash_status(spi);
625 if (status <= 0 || status == 0xff) {
626 printf("dataflash: read status error %d\n", status);
627 if (status == 0 || status == 0xff)
629 goto err_jedec_probe;
633 * if there's a device there, assume it's dataflash.
634 * board setup should have set spi->max_speed_max to
635 * match f(car) for continuous reads, mode 0 or 3.
637 switch (status & 0x3c) {
638 case 0x0c: /* 0 0 1 1 x x */
639 status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0);
641 case 0x14: /* 0 1 0 1 x x */
642 status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0);
644 case 0x1c: /* 0 1 1 1 x x */
645 status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0);
647 case 0x24: /* 1 0 0 1 x x */
648 status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0);
650 case 0x2c: /* 1 0 1 1 x x */
651 status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0);
653 case 0x34: /* 1 1 0 1 x x */
654 status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0);
656 case 0x38: /* 1 1 1 x x x */
658 status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0);
660 /* obsolete AT45DB1282 not (yet?) supported */
662 printf("dataflash: unsupported device (%x)\n", status & 0x3c);
672 spi_release_bus(spi);
676 static const struct dm_spi_flash_ops spi_dataflash_ops = {
677 .read = spi_dataflash_read,
678 .write = spi_dataflash_write,
679 .erase = spi_dataflash_erase,
682 static const struct udevice_id spi_dataflash_ids[] = {
683 { .compatible = "atmel,at45", },
684 { .compatible = "atmel,dataflash", },
688 U_BOOT_DRIVER(spi_dataflash) = {
689 .name = "spi_dataflash",
690 .id = UCLASS_SPI_FLASH,
691 .of_match = spi_dataflash_ids,
692 .probe = spi_dataflash_probe,
693 .priv_auto_alloc_size = sizeof(struct dataflash),
694 .ops = &spi_dataflash_ops,