1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Stefan Roese <sr@denx.de>
5 * Derived from drivers/mtd/nand/spi/micron.c
6 * Copyright (c) 2016-2017 Micron Technology, Inc.
10 #include <linux/device.h>
11 #include <linux/kernel.h>
13 #include <linux/mtd/spinand.h>
15 #define SPINAND_MFR_GIGADEVICE 0xC8
16 #define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4)
17 #define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4)
19 #define GD5FXGQ4XEXXG_REG_STATUS2 0xf0
21 static SPINAND_OP_VARIANTS(read_cache_variants,
22 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
23 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
24 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
25 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
26 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
27 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
29 static SPINAND_OP_VARIANTS(write_cache_variants,
30 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
31 SPINAND_PROG_LOAD(true, 0, NULL, 0));
33 static SPINAND_OP_VARIANTS(update_cache_variants,
34 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
35 SPINAND_PROG_LOAD(false, 0, NULL, 0));
37 static int gd5fxgq4xexxg_ooblayout_ecc(struct mtd_info *mtd, int section,
38 struct mtd_oob_region *region)
49 static int gd5fxgq4xexxg_ooblayout_free(struct mtd_info *mtd, int section,
50 struct mtd_oob_region *region)
55 /* Reserve 1 bytes for the BBM. */
62 static int gd5fxgq4xexxg_ecc_get_status(struct spinand_device *spinand,
66 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQ4XEXXG_REG_STATUS2,
70 switch (status & STATUS_ECC_MASK) {
71 case STATUS_ECC_NO_BITFLIPS:
74 case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
76 * Read status2 register to determine a more fine grained
79 ret = spi_mem_exec_op(spinand->slave, &op);
84 * 4 ... 7 bits are flipped (1..4 can't be detected, so
85 * report the maximum of 4 in this case
87 /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
88 return ((status & STATUS_ECC_MASK) >> 2) |
89 ((status2 & STATUS_ECC_MASK) >> 4);
91 case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
94 case STATUS_ECC_UNCOR_ERROR:
104 static const struct mtd_ooblayout_ops gd5fxgq4xexxg_ooblayout = {
105 .ecc = gd5fxgq4xexxg_ooblayout_ecc,
106 .free = gd5fxgq4xexxg_ooblayout_free,
109 static const struct spinand_info gigadevice_spinand_table[] = {
110 SPINAND_INFO("GD5F1GQ4UExxG", 0xd1,
111 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
113 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
114 &write_cache_variants,
115 &update_cache_variants),
117 SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout,
118 gd5fxgq4xexxg_ecc_get_status)),
121 static int gigadevice_spinand_detect(struct spinand_device *spinand)
123 u8 *id = spinand->id.data;
127 * For GD NANDs, There is an address byte needed to shift in before IDs
128 * are read out, so the first byte in raw_id is dummy.
130 if (id[1] != SPINAND_MFR_GIGADEVICE)
133 ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
134 ARRAY_SIZE(gigadevice_spinand_table),
142 static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
143 .detect = gigadevice_spinand_detect,
146 const struct spinand_manufacturer gigadevice_spinand_manufacturer = {
147 .id = SPINAND_MFR_GIGADEVICE,
148 .name = "GigaDevice",
149 .ops = &gigadevice_spinand_manuf_ops,