1 // SPDX-License-Identifier: GPL-2.0+
7 #include <linux/bitops.h>
9 #include <linux/errno.h>
11 #include <linux/ioport.h>
16 struct bcm63158_nand_soc {
17 struct brcmnand_soc soc;
21 #define BCM63158_NAND_INT 0x00
22 #define BCM63158_NAND_STATUS_SHIFT 0
23 #define BCM63158_NAND_STATUS_MASK (0xfff << BCM63158_NAND_STATUS_SHIFT)
25 #define BCM63158_NAND_INT_EN 0x04
26 #define BCM63158_NAND_ENABLE_SHIFT 0
27 #define BCM63158_NAND_ENABLE_MASK (0xffff << BCM63158_NAND_ENABLE_SHIFT)
30 BCM63158_NP_READ = BIT(0),
31 BCM63158_BLOCK_ERASE = BIT(1),
32 BCM63158_COPY_BACK = BIT(2),
33 BCM63158_PAGE_PGM = BIT(3),
34 BCM63158_CTRL_READY = BIT(4),
35 BCM63158_DEV_RBPIN = BIT(5),
36 BCM63158_ECC_ERR_UNC = BIT(6),
37 BCM63158_ECC_ERR_CORR = BIT(7),
40 static bool bcm63158_nand_intc_ack(struct brcmnand_soc *soc)
42 struct bcm63158_nand_soc *priv =
43 container_of(soc, struct bcm63158_nand_soc, soc);
44 void __iomem *mmio = priv->base + BCM63158_NAND_INT;
45 u32 val = brcmnand_readl(mmio);
47 if (val & (BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT)) {
49 val &= ~BCM63158_NAND_STATUS_MASK;
50 val |= BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT;
51 brcmnand_writel(val, mmio);
58 static void bcm63158_nand_intc_set(struct brcmnand_soc *soc, bool en)
60 struct bcm63158_nand_soc *priv =
61 container_of(soc, struct bcm63158_nand_soc, soc);
62 void __iomem *mmio = priv->base + BCM63158_NAND_INT_EN;
63 u32 val = brcmnand_readl(mmio);
65 /* Don't ack any interrupts */
66 val &= ~BCM63158_NAND_STATUS_MASK;
69 val |= BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT;
71 val &= ~(BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT);
73 brcmnand_writel(val, mmio);
76 static int bcm63158_nand_probe(struct udevice *dev)
78 struct udevice *pdev = dev;
79 struct bcm63158_nand_soc *priv = dev_get_priv(dev);
80 struct brcmnand_soc *soc;
85 dev_read_resource_byname(pdev, "nand-int-base", &res);
86 priv->base = devm_ioremap(dev, res.start, resource_size(&res));
87 if (IS_ERR(priv->base))
88 return PTR_ERR(priv->base);
90 soc->ctlrdy_ack = bcm63158_nand_intc_ack;
91 soc->ctlrdy_set_enabled = bcm63158_nand_intc_set;
93 /* Disable and ack all interrupts */
94 brcmnand_writel(0, priv->base + BCM63158_NAND_INT_EN);
95 brcmnand_writel(0, priv->base + BCM63158_NAND_INT);
97 return brcmnand_probe(pdev, soc);
100 static const struct udevice_id bcm63158_nand_dt_ids[] = {
102 .compatible = "brcm,nand-bcm63158",
107 U_BOOT_DRIVER(bcm63158_nand) = {
108 .name = "bcm63158-nand",
110 .of_match = bcm63158_nand_dt_ids,
111 .probe = bcm63158_nand_probe,
112 .priv_auto_alloc_size = sizeof(struct bcm63158_nand_soc),
115 void board_nand_init(void)
120 ret = uclass_get_device_by_driver(UCLASS_MTD,
121 DM_GET_DRIVER(bcm63158_nand), &dev);
122 if (ret && ret != -ENODEV)
123 pr_err("Failed to initialize %s. (error %d)\n", dev->name,