4 * Copyright (C) 2007 MontaVista Software, Inc.
5 * Anton Vorontsov <avorontsov@ru.mvista.com>
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/errno.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/fsl_upm.h>
18 static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
20 clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset);
21 (void)in_be32(upm->mxmr);
24 static void fsl_upm_end_pattern(struct fsl_upm *upm)
26 clrbits_be32(upm->mxmr, MxMR_OP_RUNP);
28 while (in_be32(upm->mxmr) & MxMR_OP_RUNP)
32 static void fsl_upm_run_pattern(struct fsl_upm *upm, int width,
33 void __iomem *io_addr, u32 mar)
35 out_be32(upm->mar, mar);
36 (void)in_be32(upm->mar);
42 out_be16(io_addr, 0x0);
45 out_be32(io_addr, 0x0);
50 static void fun_wait(struct fsl_upm_nand *fun)
53 while (!fun->dev_ready(fun->chip_nr))
54 debug("unexpected busy state\n");
57 * If the R/B pin is not connected,
58 * a short delay is necessary.
64 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
65 static void fun_select_chip(struct mtd_info *mtd, int chip_nr)
67 struct nand_chip *chip = mtd->priv;
68 struct fsl_upm_nand *fun = chip->priv;
71 fun->chip_nr = chip_nr;
72 chip->IO_ADDR_R = chip->IO_ADDR_W =
73 fun->upm.io_addr + fun->chip_offset * chip_nr;
74 } else if (chip_nr == -1) {
75 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
80 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
82 struct nand_chip *chip = mtd->priv;
83 struct fsl_upm_nand *fun = chip->priv;
84 void __iomem *io_addr;
87 if (!(ctrl & fun->last_ctrl)) {
88 fsl_upm_end_pattern(&fun->upm);
90 if (cmd == NAND_CMD_NONE)
93 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
96 if (ctrl & NAND_CTRL_CHANGE) {
98 fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
99 else if (ctrl & NAND_CLE)
100 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
103 mar = cmd << (32 - fun->width);
104 io_addr = fun->upm.io_addr;
105 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
106 if (fun->chip_nr > 0) {
107 io_addr += fun->chip_offset * fun->chip_nr;
108 if (fun->upm_mar_chip_offset)
109 mar |= fun->upm_mar_chip_offset * fun->chip_nr;
112 fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar);
115 * Some boards/chips needs this. At least the MPC8360E-RDK
116 * needs it. Probably weird chip, because I don't see any
117 * need for this on MPC8555E + Samsung K9F1G08U0A. Usually
118 * here are 0-2 unexpected busy states per block read.
120 if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
124 static u8 upm_nand_read_byte(struct mtd_info *mtd)
126 struct nand_chip *chip = mtd->priv;
128 return in_8(chip->IO_ADDR_R);
131 static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
134 struct nand_chip *chip = mtd->priv;
135 struct fsl_upm_nand *fun = chip->priv;
137 for (i = 0; i < len; i++) {
138 out_8(chip->IO_ADDR_W, buf[i]);
139 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
143 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
147 static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
150 struct nand_chip *chip = mtd->priv;
152 for (i = 0; i < len; i++)
153 buf[i] = in_8(chip->IO_ADDR_R);
156 #if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
157 static int upm_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
160 struct nand_chip *chip = mtd->priv;
162 for (i = 0; i < len; i++) {
163 if (buf[i] != in_8(chip->IO_ADDR_R))
171 static int nand_dev_ready(struct mtd_info *mtd)
173 struct nand_chip *chip = mtd->priv;
174 struct fsl_upm_nand *fun = chip->priv;
176 return fun->dev_ready(fun->chip_nr);
179 int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun)
181 if (fun->width != 8 && fun->width != 16 && fun->width != 32)
184 fun->last_ctrl = NAND_CLE;
187 chip->chip_delay = fun->chip_delay;
188 chip->ecc.mode = NAND_ECC_SOFT;
189 chip->cmd_ctrl = fun_cmd_ctrl;
190 #if CONFIG_SYS_NAND_MAX_CHIPS > 1
191 chip->select_chip = fun_select_chip;
193 chip->read_byte = upm_nand_read_byte;
194 chip->read_buf = upm_nand_read_buf;
195 chip->write_buf = upm_nand_write_buf;
196 #if defined(CONFIG_MTD_NAND_VERIFY_WRITE)
197 chip->verify_buf = upm_nand_verify_buf;
200 chip->dev_ready = nand_dev_ready;