2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 #ifndef CFG_FLASH_BANKS_LIST
66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
69 #define FLASH_CMD_CFI 0x98
70 #define FLASH_CMD_READ_ID 0x90
71 #define FLASH_CMD_RESET 0xff
72 #define FLASH_CMD_BLOCK_ERASE 0x20
73 #define FLASH_CMD_ERASE_CONFIRM 0xD0
74 #define FLASH_CMD_WRITE 0x40
75 #define FLASH_CMD_PROTECT 0x60
76 #define FLASH_CMD_PROTECT_SET 0x01
77 #define FLASH_CMD_PROTECT_CLEAR 0xD0
78 #define FLASH_CMD_CLEAR_STATUS 0x50
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
82 #define FLASH_STATUS_DONE 0x80
83 #define FLASH_STATUS_ESS 0x40
84 #define FLASH_STATUS_ECLBS 0x20
85 #define FLASH_STATUS_PSLBS 0x10
86 #define FLASH_STATUS_VPENS 0x08
87 #define FLASH_STATUS_PSS 0x04
88 #define FLASH_STATUS_DPS 0x02
89 #define FLASH_STATUS_R 0x01
90 #define FLASH_STATUS_PROTECT 0x01
92 #define AMD_CMD_RESET 0xF0
93 #define AMD_CMD_WRITE 0xA0
94 #define AMD_CMD_ERASE_START 0x80
95 #define AMD_CMD_ERASE_SECTOR 0x30
96 #define AMD_CMD_UNLOCK_START 0xAA
97 #define AMD_CMD_UNLOCK_ACK 0x55
98 #define AMD_CMD_WRITE_TO_BUFFER 0x25
99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
101 #define AMD_STATUS_TOGGLE 0x40
102 #define AMD_STATUS_ERROR 0x20
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 /* extended query table primary address */
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141 # undef FLASH_CMD_RESET
142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
149 unsigned long long ll;
152 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
154 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
156 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
157 #ifdef CFG_MAX_FLASH_BANKS_DETECT
158 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
159 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
161 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
166 * Check if chip width is defined. If not, start detecting with 8bit.
168 #ifndef CFG_FLASH_CFI_WIDTH
169 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
172 typedef unsigned long flash_sect_t;
174 /* CFI standard query structure */
185 u8 word_write_timeout_typ;
186 u8 buf_write_timeout_typ;
187 u8 block_erase_timeout_typ;
188 u8 chip_erase_timeout_typ;
189 u8 word_write_timeout_max;
190 u8 buf_write_timeout_max;
191 u8 block_erase_timeout_max;
192 u8 chip_erase_timeout_max;
195 u16 max_buf_write_size;
196 u8 num_erase_regions;
197 u32 erase_region_info[NUM_ERASE_REGIONS];
198 } __attribute__((packed));
204 } __attribute__((packed));
206 static void flash_write8(u8 value, void *addr)
208 __raw_writeb(value, addr);
211 static void flash_write16(u16 value, void *addr)
213 __raw_writew(value, addr);
216 static void flash_write32(u32 value, void *addr)
218 __raw_writel(value, addr);
221 static void flash_write64(u64 value, void *addr)
223 /* No architectures currently implement __raw_writeq() */
224 *(volatile u64 *)addr = value;
227 static u8 flash_read8(void *addr)
229 return __raw_readb(addr);
232 static u16 flash_read16(void *addr)
234 return __raw_readw(addr);
237 static u32 flash_read32(void *addr)
239 return __raw_readl(addr);
242 static u64 __flash_read64(void *addr)
244 /* No architectures currently implement __raw_readq() */
245 return *(volatile u64 *)addr;
248 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
250 /*-----------------------------------------------------------------------
252 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
253 static flash_info_t *flash_get_info(ulong base)
256 flash_info_t * info = 0;
258 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
259 info = & flash_info[i];
260 if (info->size && info->start[0] <= base &&
261 base <= info->start[0] + info->size - 1)
265 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
269 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
271 if (sect != (info->sector_count - 1))
272 return info->start[sect + 1] - info->start[sect];
274 return info->start[0] + info->size - info->start[sect];
277 /*-----------------------------------------------------------------------
278 * create an address based on the offset and the port width
281 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
283 unsigned int byte_offset = offset * info->portwidth;
285 return map_physmem(info->start[sect] + byte_offset,
286 flash_sector_size(info, sect) - byte_offset,
290 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
291 unsigned int offset, void *addr)
293 unsigned int byte_offset = offset * info->portwidth;
295 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
298 /*-----------------------------------------------------------------------
299 * make a proper sized command based on the port and chip widths
301 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
304 uchar *cp = (uchar *) cmdbuf;
306 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
307 for (i = info->portwidth; i > 0; i--)
309 for (i = 1; i <= info->portwidth; i++)
311 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
315 /*-----------------------------------------------------------------------
318 static void print_longlong (char *str, unsigned long long data)
323 cp = (unsigned char *) &data;
324 for (i = 0; i < 8; i++)
325 sprintf (&str[i * 2], "%2.2x", *cp++);
328 static void flash_printqry (struct cfi_qry *qry)
333 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
335 for (y = 0; y < 16; y++)
336 debug("%2.2x ", p[x + y]);
338 for (y = 0; y < 16; y++) {
339 unsigned char c = p[x + y];
340 if (c >= 0x20 && c <= 0x7e)
351 /*-----------------------------------------------------------------------
352 * read a character at a port width address
354 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
359 cp = flash_map (info, 0, offset);
360 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
361 retval = flash_read8(cp);
363 retval = flash_read8(cp + info->portwidth - 1);
365 flash_unmap (info, 0, offset, cp);
369 /*-----------------------------------------------------------------------
370 * read a word at a port width address, assume 16bit bus
372 static inline ushort flash_read_word (flash_info_t * info, uint offset)
374 ushort *addr, retval;
376 addr = flash_map (info, 0, offset);
377 retval = flash_read16 (addr);
378 flash_unmap (info, 0, offset, addr);
383 /*-----------------------------------------------------------------------
384 * read a long word by picking the least significant byte of each maximum
385 * port size word. Swap for ppc format.
387 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
396 addr = flash_map (info, sect, offset);
399 debug ("long addr is at %p info->portwidth = %d\n", addr,
401 for (x = 0; x < 4 * info->portwidth; x++) {
402 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
405 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
406 retval = ((flash_read8(addr) << 16) |
407 (flash_read8(addr + info->portwidth) << 24) |
408 (flash_read8(addr + 2 * info->portwidth)) |
409 (flash_read8(addr + 3 * info->portwidth) << 8));
411 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
412 (flash_read8(addr + info->portwidth - 1) << 16) |
413 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
414 (flash_read8(addr + 3 * info->portwidth - 1)));
416 flash_unmap(info, sect, offset, addr);
422 * Write a proper sized command to the correct address
424 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
425 uint offset, uchar cmd)
431 addr = flash_map (info, sect, offset);
432 flash_make_cmd (info, cmd, &cword);
433 switch (info->portwidth) {
435 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
436 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
437 flash_write8(cword.c, addr);
439 case FLASH_CFI_16BIT:
440 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
442 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
443 flash_write16(cword.w, addr);
445 case FLASH_CFI_32BIT:
446 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
448 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
449 flash_write32(cword.l, addr);
451 case FLASH_CFI_64BIT:
456 print_longlong (str, cword.ll);
458 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
460 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
463 flash_write64(cword.ll, addr);
467 /* Ensure all the instructions are fully finished */
470 flash_unmap(info, sect, offset, addr);
473 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
475 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
476 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
479 /*-----------------------------------------------------------------------
481 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
482 uint offset, uchar cmd)
488 addr = flash_map (info, sect, offset);
489 flash_make_cmd (info, cmd, &cword);
491 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
492 switch (info->portwidth) {
494 debug ("is= %x %x\n", flash_read8(addr), cword.c);
495 retval = (flash_read8(addr) == cword.c);
497 case FLASH_CFI_16BIT:
498 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
499 retval = (flash_read16(addr) == cword.w);
501 case FLASH_CFI_32BIT:
502 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
503 retval = (flash_read32(addr) == cword.l);
505 case FLASH_CFI_64BIT:
511 print_longlong (str1, flash_read64(addr));
512 print_longlong (str2, cword.ll);
513 debug ("is= %s %s\n", str1, str2);
516 retval = (flash_read64(addr) == cword.ll);
522 flash_unmap(info, sect, offset, addr);
527 /*-----------------------------------------------------------------------
529 static int flash_isset (flash_info_t * info, flash_sect_t sect,
530 uint offset, uchar cmd)
536 addr = flash_map (info, sect, offset);
537 flash_make_cmd (info, cmd, &cword);
538 switch (info->portwidth) {
540 retval = ((flash_read8(addr) & cword.c) == cword.c);
542 case FLASH_CFI_16BIT:
543 retval = ((flash_read16(addr) & cword.w) == cword.w);
545 case FLASH_CFI_32BIT:
546 retval = ((flash_read32(addr) & cword.l) == cword.l);
548 case FLASH_CFI_64BIT:
549 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
555 flash_unmap(info, sect, offset, addr);
560 /*-----------------------------------------------------------------------
562 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
563 uint offset, uchar cmd)
569 addr = flash_map (info, sect, offset);
570 flash_make_cmd (info, cmd, &cword);
571 switch (info->portwidth) {
573 retval = ((flash_read8(addr) & cword.c) !=
574 (flash_read8(addr) & cword.c));
576 case FLASH_CFI_16BIT:
577 retval = ((flash_read16(addr) & cword.w) !=
578 (flash_read16(addr) & cword.w));
580 case FLASH_CFI_32BIT:
581 retval = ((flash_read32(addr) & cword.l) !=
582 (flash_read32(addr) & cword.l));
584 case FLASH_CFI_64BIT:
585 retval = ((flash_read64(addr) & cword.ll) !=
586 (flash_read64(addr) & cword.ll));
592 flash_unmap(info, sect, offset, addr);
598 * flash_is_busy - check to see if the flash is busy
600 * This routine checks the status of the chip and returns true if the
603 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
607 switch (info->vendor) {
608 case CFI_CMDSET_INTEL_STANDARD:
609 case CFI_CMDSET_INTEL_EXTENDED:
610 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
612 case CFI_CMDSET_AMD_STANDARD:
613 case CFI_CMDSET_AMD_EXTENDED:
614 #ifdef CONFIG_FLASH_CFI_LEGACY
615 case CFI_CMDSET_AMD_LEGACY:
617 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
622 debug ("flash_is_busy: %d\n", retval);
626 /*-----------------------------------------------------------------------
627 * wait for XSR.7 to be set. Time out with an error if it does not.
628 * This routine does not set the flash to read-array mode.
630 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
631 ulong tout, char *prompt)
639 /* Wait for command completion */
640 start = get_timer (0);
641 while (flash_is_busy (info, sector)) {
642 if (get_timer (start) > tout) {
643 printf ("Flash %s timeout at address %lx data %lx\n",
644 prompt, info->start[sector],
645 flash_read_long (info, sector, 0));
646 flash_write_cmd (info, sector, 0, info->cmd_reset);
649 udelay (1); /* also triggers watchdog */
654 /*-----------------------------------------------------------------------
655 * Wait for XSR.7 to be set, if it times out print an error, otherwise
656 * do a full status check.
658 * This routine sets the flash to read-array mode.
660 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
661 ulong tout, char *prompt)
665 retcode = flash_status_check (info, sector, tout, prompt);
666 switch (info->vendor) {
667 case CFI_CMDSET_INTEL_EXTENDED:
668 case CFI_CMDSET_INTEL_STANDARD:
669 if ((retcode == ERR_OK)
670 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
672 printf ("Flash %s error at address %lx\n", prompt,
673 info->start[sector]);
674 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
675 FLASH_STATUS_PSLBS)) {
676 puts ("Command Sequence Error.\n");
677 } else if (flash_isset (info, sector, 0,
678 FLASH_STATUS_ECLBS)) {
679 puts ("Block Erase Error.\n");
680 retcode = ERR_NOT_ERASED;
681 } else if (flash_isset (info, sector, 0,
682 FLASH_STATUS_PSLBS)) {
683 puts ("Locking Error\n");
685 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
686 puts ("Block locked.\n");
687 retcode = ERR_PROTECTED;
689 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
690 puts ("Vpp Low Error.\n");
692 flash_write_cmd (info, sector, 0, info->cmd_reset);
700 /*-----------------------------------------------------------------------
702 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
704 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
707 unsigned long long ll;
710 switch (info->portwidth) {
714 case FLASH_CFI_16BIT:
715 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
718 cword->w = (cword->w >> 8) | w;
720 cword->w = (cword->w << 8) | c;
723 case FLASH_CFI_32BIT:
724 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
727 cword->l = (cword->l >> 8) | l;
729 cword->l = (cword->l << 8) | c;
732 case FLASH_CFI_64BIT:
733 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
736 cword->ll = (cword->ll >> 8) | ll;
738 cword->ll = (cword->ll << 8) | c;
744 /* loop through the sectors from the highest address when the passed
745 * address is greater or equal to the sector address we have a match
747 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
751 for (sector = info->sector_count - 1; sector >= 0; sector--) {
752 if (addr >= info->start[sector])
758 /*-----------------------------------------------------------------------
760 static int flash_write_cfiword (flash_info_t * info, ulong dest,
766 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
768 /* Check if Flash is (sufficiently) erased */
769 switch (info->portwidth) {
771 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
773 case FLASH_CFI_16BIT:
774 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
776 case FLASH_CFI_32BIT:
777 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
779 case FLASH_CFI_64BIT:
780 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
787 unmap_physmem(dstaddr, info->portwidth);
788 return ERR_NOT_ERASED;
791 /* Disable interrupts which might cause a timeout here */
792 flag = disable_interrupts ();
794 switch (info->vendor) {
795 case CFI_CMDSET_INTEL_EXTENDED:
796 case CFI_CMDSET_INTEL_STANDARD:
797 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
798 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
800 case CFI_CMDSET_AMD_EXTENDED:
801 case CFI_CMDSET_AMD_STANDARD:
802 #ifdef CONFIG_FLASH_CFI_LEGACY
803 case CFI_CMDSET_AMD_LEGACY:
805 flash_unlock_seq (info, 0);
806 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
810 switch (info->portwidth) {
812 flash_write8(cword.c, dstaddr);
814 case FLASH_CFI_16BIT:
815 flash_write16(cword.w, dstaddr);
817 case FLASH_CFI_32BIT:
818 flash_write32(cword.l, dstaddr);
820 case FLASH_CFI_64BIT:
821 flash_write64(cword.ll, dstaddr);
825 /* re-enable interrupts if necessary */
827 enable_interrupts ();
829 unmap_physmem(dstaddr, info->portwidth);
831 return flash_full_status_check (info, find_sector (info, dest),
832 info->write_tout, "write");
835 #ifdef CFG_FLASH_USE_BUFFER_WRITE
837 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
844 void *dst = map_physmem(dest, len, MAP_NOCACHE);
848 switch (info->portwidth) {
852 case FLASH_CFI_16BIT:
855 case FLASH_CFI_32BIT:
858 case FLASH_CFI_64BIT:
866 while ((cnt-- > 0) && (flag == 0)) {
867 switch (info->portwidth) {
869 flag = ((flash_read8(dst2) & flash_read8(src)) ==
873 case FLASH_CFI_16BIT:
874 flag = ((flash_read16(dst2) & flash_read16(src)) ==
878 case FLASH_CFI_32BIT:
879 flag = ((flash_read32(dst2) & flash_read32(src)) ==
883 case FLASH_CFI_64BIT:
884 flag = ((flash_read64(dst2) & flash_read64(src)) ==
891 retcode = ERR_NOT_ERASED;
896 sector = find_sector (info, dest);
898 switch (info->vendor) {
899 case CFI_CMDSET_INTEL_STANDARD:
900 case CFI_CMDSET_INTEL_EXTENDED:
901 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
902 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
903 retcode = flash_status_check (info, sector,
904 info->buffer_write_tout,
906 if (retcode == ERR_OK) {
907 /* reduce the number of loops by the width of
909 switch (info->portwidth) {
913 case FLASH_CFI_16BIT:
916 case FLASH_CFI_32BIT:
919 case FLASH_CFI_64BIT:
926 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
928 switch (info->portwidth) {
930 flash_write8(flash_read8(src), dst);
933 case FLASH_CFI_16BIT:
934 flash_write16(flash_read16(src), dst);
937 case FLASH_CFI_32BIT:
938 flash_write32(flash_read32(src), dst);
941 case FLASH_CFI_64BIT:
942 flash_write64(flash_read64(src), dst);
950 flash_write_cmd (info, sector, 0,
951 FLASH_CMD_WRITE_BUFFER_CONFIRM);
952 retcode = flash_full_status_check (
953 info, sector, info->buffer_write_tout,
959 case CFI_CMDSET_AMD_STANDARD:
960 case CFI_CMDSET_AMD_EXTENDED:
961 flash_unlock_seq(info,0);
962 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
964 switch (info->portwidth) {
967 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
969 flash_write8(flash_read8(src), dst);
973 case FLASH_CFI_16BIT:
975 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
977 flash_write16(flash_read16(src), dst);
981 case FLASH_CFI_32BIT:
983 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
985 flash_write32(flash_read32(src), dst);
989 case FLASH_CFI_64BIT:
991 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
993 flash_write64(flash_read64(src), dst);
1002 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1003 retcode = flash_full_status_check (info, sector,
1004 info->buffer_write_tout,
1009 debug ("Unknown Command Set\n");
1010 retcode = ERR_INVAL;
1015 unmap_physmem(dst, len);
1018 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1021 /*-----------------------------------------------------------------------
1023 int flash_erase (flash_info_t * info, int s_first, int s_last)
1029 if (info->flash_id != FLASH_MAN_CFI) {
1030 puts ("Can't erase unknown flash type - aborted\n");
1033 if ((s_first < 0) || (s_first > s_last)) {
1034 puts ("- no sectors to erase\n");
1039 for (sect = s_first; sect <= s_last; ++sect) {
1040 if (info->protect[sect]) {
1045 printf ("- Warning: %d protected sectors will not be erased!\n",
1052 for (sect = s_first; sect <= s_last; sect++) {
1053 if (info->protect[sect] == 0) { /* not protected */
1054 switch (info->vendor) {
1055 case CFI_CMDSET_INTEL_STANDARD:
1056 case CFI_CMDSET_INTEL_EXTENDED:
1057 flash_write_cmd (info, sect, 0,
1058 FLASH_CMD_CLEAR_STATUS);
1059 flash_write_cmd (info, sect, 0,
1060 FLASH_CMD_BLOCK_ERASE);
1061 flash_write_cmd (info, sect, 0,
1062 FLASH_CMD_ERASE_CONFIRM);
1064 case CFI_CMDSET_AMD_STANDARD:
1065 case CFI_CMDSET_AMD_EXTENDED:
1066 flash_unlock_seq (info, sect);
1067 flash_write_cmd (info, sect,
1069 AMD_CMD_ERASE_START);
1070 flash_unlock_seq (info, sect);
1071 flash_write_cmd (info, sect, 0,
1072 AMD_CMD_ERASE_SECTOR);
1074 #ifdef CONFIG_FLASH_CFI_LEGACY
1075 case CFI_CMDSET_AMD_LEGACY:
1076 flash_unlock_seq (info, 0);
1077 flash_write_cmd (info, 0, info->addr_unlock1,
1078 AMD_CMD_ERASE_START);
1079 flash_unlock_seq (info, 0);
1080 flash_write_cmd (info, sect, 0,
1081 AMD_CMD_ERASE_SECTOR);
1085 debug ("Unkown flash vendor %d\n",
1090 if (flash_full_status_check
1091 (info, sect, info->erase_blk_tout, "erase")) {
1101 /*-----------------------------------------------------------------------
1103 void flash_print_info (flash_info_t * info)
1107 if (info->flash_id != FLASH_MAN_CFI) {
1108 puts ("missing or unknown FLASH type\n");
1112 printf ("%s FLASH (%d x %d)",
1114 (info->portwidth << 3), (info->chipwidth << 3));
1115 if (info->size < 1024*1024)
1116 printf (" Size: %ld kB in %d Sectors\n",
1117 info->size >> 10, info->sector_count);
1119 printf (" Size: %ld MB in %d Sectors\n",
1120 info->size >> 20, info->sector_count);
1122 switch (info->vendor) {
1123 case CFI_CMDSET_INTEL_STANDARD:
1124 printf ("Intel Standard");
1126 case CFI_CMDSET_INTEL_EXTENDED:
1127 printf ("Intel Extended");
1129 case CFI_CMDSET_AMD_STANDARD:
1130 printf ("AMD Standard");
1132 case CFI_CMDSET_AMD_EXTENDED:
1133 printf ("AMD Extended");
1135 #ifdef CONFIG_FLASH_CFI_LEGACY
1136 case CFI_CMDSET_AMD_LEGACY:
1137 printf ("AMD Legacy");
1141 printf ("Unknown (%d)", info->vendor);
1144 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1145 info->manufacturer_id, info->device_id);
1146 if (info->device_id == 0x7E) {
1147 printf("%04X", info->device_id2);
1149 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1150 info->erase_blk_tout,
1152 if (info->buffer_size > 1) {
1153 printf (" Buffer write timeout: %ld ms, "
1154 "buffer size: %d bytes\n",
1155 info->buffer_write_tout,
1159 puts ("\n Sector Start Addresses:");
1160 for (i = 0; i < info->sector_count; ++i) {
1163 #ifdef CFG_FLASH_EMPTY_INFO
1167 volatile unsigned long *flash;
1170 * Check if whole sector is erased
1172 size = flash_sector_size(info, i);
1174 flash = (volatile unsigned long *) info->start[i];
1175 size = size >> 2; /* divide by 4 for longword access */
1176 for (k = 0; k < size; k++) {
1177 if (*flash++ != 0xffffffff) {
1183 /* print empty and read-only info */
1184 printf (" %08lX %c %s ",
1187 info->protect[i] ? "RO" : " ");
1188 #else /* ! CFG_FLASH_EMPTY_INFO */
1189 printf (" %08lX %s ",
1191 info->protect[i] ? "RO" : " ");
1198 /*-----------------------------------------------------------------------
1199 * This is used in a few places in write_buf() to show programming
1200 * progress. Making it a function is nasty because it needs to do side
1201 * effect updates to digit and dots. Repeated code is nasty too, so
1202 * we define it once here.
1204 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1205 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1207 if ((scale > 0) && (dots <= 0)) { \
1208 if ((digit % 5) == 0) \
1209 printf ("%d", digit / 5); \
1216 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1219 /*-----------------------------------------------------------------------
1220 * Copy memory to flash, returns:
1223 * 2 - Flash not erased
1225 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1232 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1235 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1236 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1241 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1243 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1244 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1245 CONFIG_FLASH_SHOW_PROGRESS);
1249 /* get lower aligned address */
1250 wp = (addr & ~(info->portwidth - 1));
1252 /* handle unaligned start */
1253 if ((aln = addr - wp) != 0) {
1255 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1256 for (i = 0; i < aln; ++i)
1257 flash_add_byte (info, &cword, flash_read8(p + i));
1259 for (; (i < info->portwidth) && (cnt > 0); i++) {
1260 flash_add_byte (info, &cword, *src++);
1263 for (; (cnt == 0) && (i < info->portwidth); ++i)
1264 flash_add_byte (info, &cword, flash_read8(p + i));
1266 rc = flash_write_cfiword (info, wp, cword);
1267 unmap_physmem(p, info->portwidth);
1272 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1275 /* handle the aligned part */
1276 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1277 buffered_size = (info->portwidth / info->chipwidth);
1278 buffered_size *= info->buffer_size;
1279 while (cnt >= info->portwidth) {
1280 /* prohibit buffer write when buffer_size is 1 */
1281 if (info->buffer_size == 1) {
1283 for (i = 0; i < info->portwidth; i++)
1284 flash_add_byte (info, &cword, *src++);
1285 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1287 wp += info->portwidth;
1288 cnt -= info->portwidth;
1292 /* write buffer until next buffered_size aligned boundary */
1293 i = buffered_size - (wp % buffered_size);
1296 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1298 i -= i & (info->portwidth - 1);
1302 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1305 while (cnt >= info->portwidth) {
1307 for (i = 0; i < info->portwidth; i++) {
1308 flash_add_byte (info, &cword, *src++);
1310 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1312 wp += info->portwidth;
1313 cnt -= info->portwidth;
1314 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1316 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1323 * handle unaligned tail bytes
1326 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1327 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1328 flash_add_byte (info, &cword, *src++);
1331 for (; i < info->portwidth; ++i)
1332 flash_add_byte (info, &cword, flash_read8(p + i));
1333 unmap_physmem(p, info->portwidth);
1335 return flash_write_cfiword (info, wp, cword);
1338 /*-----------------------------------------------------------------------
1340 #ifdef CFG_FLASH_PROTECTION
1342 int flash_real_protect (flash_info_t * info, long sector, int prot)
1346 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1347 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1349 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1351 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1354 flash_full_status_check (info, sector, info->erase_blk_tout,
1355 prot ? "protect" : "unprotect")) == 0) {
1357 info->protect[sector] = prot;
1360 * On some of Intel's flash chips (marked via legacy_unlock)
1361 * unprotect unprotects all locking.
1363 if ((prot == 0) && (info->legacy_unlock)) {
1366 for (i = 0; i < info->sector_count; i++) {
1367 if (info->protect[i])
1368 flash_real_protect (info, i, 1);
1375 /*-----------------------------------------------------------------------
1376 * flash_read_user_serial - read the OneTimeProgramming cells
1378 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1385 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1386 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1387 memcpy (dst, src + offset, len);
1388 flash_write_cmd (info, 0, 0, info->cmd_reset);
1389 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1393 * flash_read_factory_serial - read the device Id from the protection area
1395 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1400 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1401 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1402 memcpy (buffer, src + offset, len);
1403 flash_write_cmd (info, 0, 0, info->cmd_reset);
1404 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1407 #endif /* CFG_FLASH_PROTECTION */
1409 /*-----------------------------------------------------------------------
1410 * Reverse the order of the erase regions in the CFI QRY structure.
1411 * This is needed for chips that are either a) correctly detected as
1412 * top-boot, or b) buggy.
1414 static void cfi_reverse_geometry(struct cfi_qry *qry)
1419 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1420 tmp = qry->erase_region_info[i];
1421 qry->erase_region_info[i] = qry->erase_region_info[j];
1422 qry->erase_region_info[j] = tmp;
1426 /*-----------------------------------------------------------------------
1427 * read jedec ids from device and set corresponding fields in info struct
1429 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1432 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1434 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1435 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1436 udelay(1000); /* some flash are slow to respond */
1437 info->manufacturer_id = flash_read_uchar (info,
1438 FLASH_OFFSET_MANUFACTURER_ID);
1439 info->device_id = flash_read_uchar (info,
1440 FLASH_OFFSET_DEVICE_ID);
1441 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1444 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1446 info->cmd_reset = FLASH_CMD_RESET;
1448 cmdset_intel_read_jedec_ids(info);
1449 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1451 #ifdef CFG_FLASH_PROTECTION
1452 /* read legacy lock/unlock bit from intel flash */
1453 if (info->ext_addr) {
1454 info->legacy_unlock = flash_read_uchar (info,
1455 info->ext_addr + 5) & 0x08;
1462 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1464 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1465 flash_unlock_seq(info, 0);
1466 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1467 udelay(1000); /* some flash are slow to respond */
1469 info->manufacturer_id = flash_read_uchar (info,
1470 FLASH_OFFSET_MANUFACTURER_ID);
1472 switch (info->chipwidth){
1473 case FLASH_CFI_8BIT:
1474 info->device_id = flash_read_uchar (info,
1475 FLASH_OFFSET_DEVICE_ID);
1476 if (info->device_id == 0x7E) {
1477 /* AMD 3-byte (expanded) device ids */
1478 info->device_id2 = flash_read_uchar (info,
1479 FLASH_OFFSET_DEVICE_ID2);
1480 info->device_id2 <<= 8;
1481 info->device_id2 |= flash_read_uchar (info,
1482 FLASH_OFFSET_DEVICE_ID3);
1485 case FLASH_CFI_16BIT:
1486 info->device_id = flash_read_word (info,
1487 FLASH_OFFSET_DEVICE_ID);
1492 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1495 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1497 info->cmd_reset = AMD_CMD_RESET;
1499 cmdset_amd_read_jedec_ids(info);
1500 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1505 #ifdef CONFIG_FLASH_CFI_LEGACY
1506 static void flash_read_jedec_ids (flash_info_t * info)
1508 info->manufacturer_id = 0;
1509 info->device_id = 0;
1510 info->device_id2 = 0;
1512 switch (info->vendor) {
1513 case CFI_CMDSET_INTEL_STANDARD:
1514 case CFI_CMDSET_INTEL_EXTENDED:
1515 cmdset_intel_read_jedec_ids(info);
1517 case CFI_CMDSET_AMD_STANDARD:
1518 case CFI_CMDSET_AMD_EXTENDED:
1519 cmdset_amd_read_jedec_ids(info);
1526 /*-----------------------------------------------------------------------
1527 * Call board code to request info about non-CFI flash.
1528 * board_flash_get_legacy needs to fill in at least:
1529 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1531 static int flash_detect_legacy(ulong base, int banknum)
1533 flash_info_t *info = &flash_info[banknum];
1535 if (board_flash_get_legacy(base, banknum, info)) {
1536 /* board code may have filled info completely. If not, we
1537 use JEDEC ID probing. */
1538 if (!info->vendor) {
1540 CFI_CMDSET_AMD_STANDARD,
1541 CFI_CMDSET_INTEL_STANDARD
1545 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1546 info->vendor = modes[i];
1547 info->start[0] = base;
1548 if (info->portwidth == FLASH_CFI_8BIT
1549 && info->interface == FLASH_CFI_X8X16) {
1550 info->addr_unlock1 = 0x2AAA;
1551 info->addr_unlock2 = 0x5555;
1553 info->addr_unlock1 = 0x5555;
1554 info->addr_unlock2 = 0x2AAA;
1556 flash_read_jedec_ids(info);
1557 debug("JEDEC PROBE: ID %x %x %x\n",
1558 info->manufacturer_id,
1561 if (jedec_flash_match(info, base))
1566 switch(info->vendor) {
1567 case CFI_CMDSET_INTEL_STANDARD:
1568 case CFI_CMDSET_INTEL_EXTENDED:
1569 info->cmd_reset = FLASH_CMD_RESET;
1571 case CFI_CMDSET_AMD_STANDARD:
1572 case CFI_CMDSET_AMD_EXTENDED:
1573 case CFI_CMDSET_AMD_LEGACY:
1574 info->cmd_reset = AMD_CMD_RESET;
1577 info->flash_id = FLASH_MAN_CFI;
1580 return 0; /* use CFI */
1583 static inline int flash_detect_legacy(ulong base, int banknum)
1585 return 0; /* use CFI */
1589 /*-----------------------------------------------------------------------
1590 * detect if flash is compatible with the Common Flash Interface (CFI)
1591 * http://www.jedec.org/download/search/jesd68.pdf
1593 static void flash_read_cfi (flash_info_t *info, void *buf,
1594 unsigned int start, size_t len)
1599 for (i = 0; i < len; i++)
1600 p[i] = flash_read_uchar(info, start + i);
1603 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1607 /* We do not yet know what kind of commandset to use, so we issue
1608 the reset command in both Intel and AMD variants, in the hope
1609 that AMD flash roms ignore the Intel command. */
1610 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1611 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1614 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1616 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1618 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1619 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1620 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1621 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1622 sizeof(struct cfi_qry));
1623 info->interface = le16_to_cpu(qry->interface_desc);
1625 info->cfi_offset = flash_offset_cfi[cfi_offset];
1626 debug ("device interface is %d\n",
1628 debug ("found port %d chip %d ",
1629 info->portwidth, info->chipwidth);
1630 debug ("port %d bits chip %d bits\n",
1631 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1632 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1634 /* calculate command offsets as in the Linux driver */
1635 info->addr_unlock1 = 0x555;
1636 info->addr_unlock2 = 0x2aa;
1639 * modify the unlock address if we are
1640 * in compatibility mode
1642 if ( /* x8/x16 in x8 mode */
1643 ((info->chipwidth == FLASH_CFI_BY8) &&
1644 (info->interface == FLASH_CFI_X8X16)) ||
1645 /* x16/x32 in x16 mode */
1646 ((info->chipwidth == FLASH_CFI_BY16) &&
1647 (info->interface == FLASH_CFI_X16X32)))
1649 info->addr_unlock1 = 0xaaa;
1650 info->addr_unlock2 = 0x555;
1653 info->name = "CFI conformant";
1661 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1663 debug ("flash detect cfi\n");
1665 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1666 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1667 for (info->chipwidth = FLASH_CFI_BY8;
1668 info->chipwidth <= info->portwidth;
1669 info->chipwidth <<= 1)
1670 if (__flash_detect_cfi(info, qry))
1673 debug ("not found\n");
1678 * Manufacturer-specific quirks. Add workarounds for geometry
1679 * reversal, etc. here.
1681 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1683 /* check if flash geometry needs reversal */
1684 if (qry->num_erase_regions > 1) {
1685 /* reverse geometry if top boot part */
1686 if (info->cfi_version < 0x3131) {
1687 /* CFI < 1.1, try to guess from device id */
1688 if ((info->device_id & 0x80) != 0)
1689 cfi_reverse_geometry(qry);
1690 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1691 /* CFI >= 1.1, deduct from top/bottom flag */
1692 /* note: ext_addr is valid since cfi_version > 0 */
1693 cfi_reverse_geometry(qry);
1698 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1700 int reverse_geometry = 0;
1702 /* Check the "top boot" bit in the PRI */
1703 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1704 reverse_geometry = 1;
1706 /* AT49BV6416(T) list the erase regions in the wrong order.
1707 * However, the device ID is identical with the non-broken
1708 * AT49BV642D since u-boot only reads the low byte (they
1709 * differ in the high byte.) So leave out this fixup for now.
1712 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1713 reverse_geometry = !reverse_geometry;
1716 if (reverse_geometry)
1717 cfi_reverse_geometry(qry);
1721 * The following code cannot be run from FLASH!
1724 ulong flash_get_size (ulong base, int banknum)
1726 flash_info_t *info = &flash_info[banknum];
1728 flash_sect_t sect_cnt;
1729 unsigned long sector;
1732 uchar num_erase_regions;
1733 int erase_region_size;
1734 int erase_region_count;
1738 info->cfi_version = 0;
1739 #ifdef CFG_FLASH_PROTECTION
1740 info->legacy_unlock = 0;
1743 info->start[0] = base;
1745 if (flash_detect_cfi (info, &qry)) {
1746 info->vendor = le16_to_cpu(qry.p_id);
1747 info->ext_addr = le16_to_cpu(qry.p_adr);
1748 num_erase_regions = qry.num_erase_regions;
1750 if (info->ext_addr) {
1751 info->cfi_version = (ushort) flash_read_uchar (info,
1752 info->ext_addr + 3) << 8;
1753 info->cfi_version |= (ushort) flash_read_uchar (info,
1754 info->ext_addr + 4);
1758 flash_printqry (&qry);
1761 switch (info->vendor) {
1762 case CFI_CMDSET_INTEL_STANDARD:
1763 case CFI_CMDSET_INTEL_EXTENDED:
1764 cmdset_intel_init(info, &qry);
1766 case CFI_CMDSET_AMD_STANDARD:
1767 case CFI_CMDSET_AMD_EXTENDED:
1768 cmdset_amd_init(info, &qry);
1771 printf("CFI: Unknown command set 0x%x\n",
1774 * Unfortunately, this means we don't know how
1775 * to get the chip back to Read mode. Might
1776 * as well try an Intel-style reset...
1778 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1782 /* Do manufacturer-specific fixups */
1783 switch (info->manufacturer_id) {
1785 flash_fixup_amd(info, &qry);
1788 flash_fixup_atmel(info, &qry);
1792 debug ("manufacturer is %d\n", info->vendor);
1793 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1794 debug ("device id is 0x%x\n", info->device_id);
1795 debug ("device id2 is 0x%x\n", info->device_id2);
1796 debug ("cfi version is 0x%04x\n", info->cfi_version);
1798 size_ratio = info->portwidth / info->chipwidth;
1799 /* if the chip is x8/x16 reduce the ratio by half */
1800 if ((info->interface == FLASH_CFI_X8X16)
1801 && (info->chipwidth == FLASH_CFI_BY8)) {
1804 debug ("size_ratio %d port %d bits chip %d bits\n",
1805 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1806 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1807 debug ("found %d erase regions\n", num_erase_regions);
1810 for (i = 0; i < num_erase_regions; i++) {
1811 if (i > NUM_ERASE_REGIONS) {
1812 printf ("%d erase regions found, only %d used\n",
1813 num_erase_regions, NUM_ERASE_REGIONS);
1817 tmp = le32_to_cpu(qry.erase_region_info[i]);
1818 debug("erase region %u: 0x%08lx\n", i, tmp);
1820 erase_region_count = (tmp & 0xffff) + 1;
1823 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1824 debug ("erase_region_count = %d erase_region_size = %d\n",
1825 erase_region_count, erase_region_size);
1826 for (j = 0; j < erase_region_count; j++) {
1827 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1828 printf("ERROR: too many flash sectors\n");
1831 info->start[sect_cnt] = sector;
1832 sector += (erase_region_size * size_ratio);
1835 * Only read protection status from
1836 * supported devices (intel...)
1838 switch (info->vendor) {
1839 case CFI_CMDSET_INTEL_EXTENDED:
1840 case CFI_CMDSET_INTEL_STANDARD:
1841 info->protect[sect_cnt] =
1842 flash_isset (info, sect_cnt,
1843 FLASH_OFFSET_PROTECT,
1844 FLASH_STATUS_PROTECT);
1847 /* default: not protected */
1848 info->protect[sect_cnt] = 0;
1855 info->sector_count = sect_cnt;
1856 info->size = 1 << qry.dev_size;
1857 /* multiply the size by the number of chips */
1858 info->size *= size_ratio;
1859 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1860 tmp = 1 << qry.block_erase_timeout_typ;
1861 info->erase_blk_tout = tmp *
1862 (1 << qry.block_erase_timeout_max);
1863 tmp = (1 << qry.buf_write_timeout_typ) *
1864 (1 << qry.buf_write_timeout_max);
1866 /* round up when converting to ms */
1867 info->buffer_write_tout = (tmp + 999) / 1000;
1868 tmp = (1 << qry.word_write_timeout_typ) *
1869 (1 << qry.word_write_timeout_max);
1870 /* round up when converting to ms */
1871 info->write_tout = (tmp + 999) / 1000;
1872 info->flash_id = FLASH_MAN_CFI;
1873 if ((info->interface == FLASH_CFI_X8X16) &&
1874 (info->chipwidth == FLASH_CFI_BY8)) {
1875 /* XXX - Need to test on x8/x16 in parallel. */
1876 info->portwidth >>= 1;
1880 flash_write_cmd (info, 0, 0, info->cmd_reset);
1881 return (info->size);
1884 /*-----------------------------------------------------------------------
1886 unsigned long flash_init (void)
1888 unsigned long size = 0;
1891 #ifdef CFG_FLASH_PROTECTION
1892 char *s = getenv("unlock");
1895 /* Init: no FLASHes known */
1896 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1897 flash_info[i].flash_id = FLASH_UNKNOWN;
1899 if (!flash_detect_legacy (bank_base[i], i))
1900 flash_get_size (bank_base[i], i);
1901 size += flash_info[i].size;
1902 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1903 #ifndef CFG_FLASH_QUIET_TEST
1904 printf ("## Unknown FLASH on Bank %d "
1905 "- Size = 0x%08lx = %ld MB\n",
1906 i+1, flash_info[i].size,
1907 flash_info[i].size << 20);
1908 #endif /* CFG_FLASH_QUIET_TEST */
1910 #ifdef CFG_FLASH_PROTECTION
1911 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1913 * Only the U-Boot image and it's environment
1914 * is protected, all other sectors are
1915 * unprotected (unlocked) if flash hardware
1916 * protection is used (CFG_FLASH_PROTECTION)
1917 * and the environment variable "unlock" is
1920 if (flash_info[i].legacy_unlock) {
1924 * Disable legacy_unlock temporarily,
1925 * since flash_real_protect would
1926 * relock all other sectors again
1929 flash_info[i].legacy_unlock = 0;
1932 * Legacy unlocking (e.g. Intel J3) ->
1933 * unlock only one sector. This will
1934 * unlock all sectors.
1936 flash_real_protect (&flash_info[i], 0, 0);
1938 flash_info[i].legacy_unlock = 1;
1941 * Manually mark other sectors as
1942 * unlocked (unprotected)
1944 for (k = 1; k < flash_info[i].sector_count; k++)
1945 flash_info[i].protect[k] = 0;
1948 * No legancy unlocking -> unlock all sectors
1950 flash_protect (FLAG_PROTECT_CLEAR,
1951 flash_info[i].start[0],
1952 flash_info[i].start[0]
1953 + flash_info[i].size - 1,
1957 #endif /* CFG_FLASH_PROTECTION */
1960 /* Monitor protection ON by default */
1961 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
1962 flash_protect (FLAG_PROTECT_SET,
1964 CFG_MONITOR_BASE + monitor_flash_len - 1,
1965 flash_get_info(CFG_MONITOR_BASE));
1968 /* Environment protection ON by default */
1969 #ifdef CFG_ENV_IS_IN_FLASH
1970 flash_protect (FLAG_PROTECT_SET,
1972 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
1973 flash_get_info(CFG_ENV_ADDR));
1976 /* Redundant environment protection ON by default */
1977 #ifdef CFG_ENV_ADDR_REDUND
1978 flash_protect (FLAG_PROTECT_SET,
1979 CFG_ENV_ADDR_REDUND,
1980 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
1981 flash_get_info(CFG_ENV_ADDR_REDUND));
1986 #endif /* CFG_FLASH_CFI */