2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 #ifndef CFG_FLASH_BANKS_LIST
66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
69 #define FLASH_CMD_CFI 0x98
70 #define FLASH_CMD_READ_ID 0x90
71 #define FLASH_CMD_RESET 0xff
72 #define FLASH_CMD_BLOCK_ERASE 0x20
73 #define FLASH_CMD_ERASE_CONFIRM 0xD0
74 #define FLASH_CMD_WRITE 0x40
75 #define FLASH_CMD_PROTECT 0x60
76 #define FLASH_CMD_PROTECT_SET 0x01
77 #define FLASH_CMD_PROTECT_CLEAR 0xD0
78 #define FLASH_CMD_CLEAR_STATUS 0x50
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
82 #define FLASH_STATUS_DONE 0x80
83 #define FLASH_STATUS_ESS 0x40
84 #define FLASH_STATUS_ECLBS 0x20
85 #define FLASH_STATUS_PSLBS 0x10
86 #define FLASH_STATUS_VPENS 0x08
87 #define FLASH_STATUS_PSS 0x04
88 #define FLASH_STATUS_DPS 0x02
89 #define FLASH_STATUS_R 0x01
90 #define FLASH_STATUS_PROTECT 0x01
92 #define AMD_CMD_RESET 0xF0
93 #define AMD_CMD_WRITE 0xA0
94 #define AMD_CMD_ERASE_START 0x80
95 #define AMD_CMD_ERASE_SECTOR 0x30
96 #define AMD_CMD_UNLOCK_START 0xAA
97 #define AMD_CMD_UNLOCK_ACK 0x55
98 #define AMD_CMD_WRITE_TO_BUFFER 0x25
99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
101 #define AMD_STATUS_TOGGLE 0x40
102 #define AMD_STATUS_ERROR 0x20
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 /* extended query table primary address */
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141 # undef FLASH_CMD_RESET
142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
149 unsigned long long ll;
152 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
154 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
156 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
157 #ifdef CFG_MAX_FLASH_BANKS_DETECT
158 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
159 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
161 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
166 * Check if chip width is defined. If not, start detecting with 8bit.
168 #ifndef CFG_FLASH_CFI_WIDTH
169 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
172 typedef unsigned long flash_sect_t;
174 /* CFI standard query structure */
185 u8 word_write_timeout_typ;
186 u8 buf_write_timeout_typ;
187 u8 block_erase_timeout_typ;
188 u8 chip_erase_timeout_typ;
189 u8 word_write_timeout_max;
190 u8 buf_write_timeout_max;
191 u8 block_erase_timeout_max;
192 u8 chip_erase_timeout_max;
195 u16 max_buf_write_size;
196 u8 num_erase_regions;
197 u32 erase_region_info[NUM_ERASE_REGIONS];
198 } __attribute__((packed));
204 } __attribute__((packed));
206 static void flash_write8(u8 value, void *addr)
208 __raw_writeb(value, addr);
211 static void flash_write16(u16 value, void *addr)
213 __raw_writew(value, addr);
216 static void flash_write32(u32 value, void *addr)
218 __raw_writel(value, addr);
221 static void flash_write64(u64 value, void *addr)
223 /* No architectures currently implement __raw_writeq() */
224 *(volatile u64 *)addr = value;
227 static u8 flash_read8(void *addr)
229 return __raw_readb(addr);
232 static u16 flash_read16(void *addr)
234 return __raw_readw(addr);
237 static u32 flash_read32(void *addr)
239 return __raw_readl(addr);
242 static u64 flash_read64(void *addr)
244 /* No architectures currently implement __raw_readq() */
245 return *(volatile u64 *)addr;
248 /*-----------------------------------------------------------------------
250 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
251 static flash_info_t *flash_get_info(ulong base)
254 flash_info_t * info = 0;
256 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
257 info = & flash_info[i];
258 if (info->size && info->start[0] <= base &&
259 base <= info->start[0] + info->size - 1)
263 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
267 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
269 if (sect != (info->sector_count - 1))
270 return info->start[sect + 1] - info->start[sect];
272 return info->start[0] + info->size - info->start[sect];
275 /*-----------------------------------------------------------------------
276 * create an address based on the offset and the port width
279 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
281 unsigned int byte_offset = offset * info->portwidth;
283 return map_physmem(info->start[sect] + byte_offset,
284 flash_sector_size(info, sect) - byte_offset,
288 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
289 unsigned int offset, void *addr)
291 unsigned int byte_offset = offset * info->portwidth;
293 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
296 /*-----------------------------------------------------------------------
297 * make a proper sized command based on the port and chip widths
299 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
302 uchar *cp = (uchar *) cmdbuf;
304 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
305 for (i = info->portwidth; i > 0; i--)
307 for (i = 1; i <= info->portwidth; i++)
309 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
313 /*-----------------------------------------------------------------------
316 static void print_longlong (char *str, unsigned long long data)
321 cp = (unsigned char *) &data;
322 for (i = 0; i < 8; i++)
323 sprintf (&str[i * 2], "%2.2x", *cp++);
326 static void flash_printqry (struct cfi_qry *qry)
331 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
333 for (y = 0; y < 16; y++)
334 debug("%2.2x ", p[x + y]);
336 for (y = 0; y < 16; y++) {
337 unsigned char c = p[x + y];
338 if (c >= 0x20 && c <= 0x7e)
349 /*-----------------------------------------------------------------------
350 * read a character at a port width address
352 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
357 cp = flash_map (info, 0, offset);
358 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
359 retval = flash_read8(cp);
361 retval = flash_read8(cp + info->portwidth - 1);
363 flash_unmap (info, 0, offset, cp);
367 /*-----------------------------------------------------------------------
368 * read a long word by picking the least significant byte of each maximum
369 * port size word. Swap for ppc format.
371 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
380 addr = flash_map (info, sect, offset);
383 debug ("long addr is at %p info->portwidth = %d\n", addr,
385 for (x = 0; x < 4 * info->portwidth; x++) {
386 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
389 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
390 retval = ((flash_read8(addr) << 16) |
391 (flash_read8(addr + info->portwidth) << 24) |
392 (flash_read8(addr + 2 * info->portwidth)) |
393 (flash_read8(addr + 3 * info->portwidth) << 8));
395 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
396 (flash_read8(addr + info->portwidth - 1) << 16) |
397 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
398 (flash_read8(addr + 3 * info->portwidth - 1)));
400 flash_unmap(info, sect, offset, addr);
406 * Write a proper sized command to the correct address
408 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
409 uint offset, uchar cmd)
415 addr = flash_map (info, sect, offset);
416 flash_make_cmd (info, cmd, &cword);
417 switch (info->portwidth) {
419 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
420 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
421 flash_write8(cword.c, addr);
423 case FLASH_CFI_16BIT:
424 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
426 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
427 flash_write16(cword.w, addr);
429 case FLASH_CFI_32BIT:
430 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
432 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
433 flash_write32(cword.l, addr);
435 case FLASH_CFI_64BIT:
440 print_longlong (str, cword.ll);
442 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
444 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
447 flash_write64(cword.ll, addr);
451 /* Ensure all the instructions are fully finished */
454 flash_unmap(info, sect, offset, addr);
457 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
459 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
460 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
463 /*-----------------------------------------------------------------------
465 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
466 uint offset, uchar cmd)
472 addr = flash_map (info, sect, offset);
473 flash_make_cmd (info, cmd, &cword);
475 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
476 switch (info->portwidth) {
478 debug ("is= %x %x\n", flash_read8(addr), cword.c);
479 retval = (flash_read8(addr) == cword.c);
481 case FLASH_CFI_16BIT:
482 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
483 retval = (flash_read16(addr) == cword.w);
485 case FLASH_CFI_32BIT:
486 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
487 retval = (flash_read32(addr) == cword.l);
489 case FLASH_CFI_64BIT:
495 print_longlong (str1, flash_read64(addr));
496 print_longlong (str2, cword.ll);
497 debug ("is= %s %s\n", str1, str2);
500 retval = (flash_read64(addr) == cword.ll);
506 flash_unmap(info, sect, offset, addr);
511 /*-----------------------------------------------------------------------
513 static int flash_isset (flash_info_t * info, flash_sect_t sect,
514 uint offset, uchar cmd)
520 addr = flash_map (info, sect, offset);
521 flash_make_cmd (info, cmd, &cword);
522 switch (info->portwidth) {
524 retval = ((flash_read8(addr) & cword.c) == cword.c);
526 case FLASH_CFI_16BIT:
527 retval = ((flash_read16(addr) & cword.w) == cword.w);
529 case FLASH_CFI_32BIT:
530 retval = ((flash_read16(addr) & cword.l) == cword.l);
532 case FLASH_CFI_64BIT:
533 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
539 flash_unmap(info, sect, offset, addr);
544 /*-----------------------------------------------------------------------
546 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
547 uint offset, uchar cmd)
553 addr = flash_map (info, sect, offset);
554 flash_make_cmd (info, cmd, &cword);
555 switch (info->portwidth) {
557 retval = ((flash_read8(addr) & cword.c) !=
558 (flash_read8(addr) & cword.c));
560 case FLASH_CFI_16BIT:
561 retval = ((flash_read16(addr) & cword.w) !=
562 (flash_read16(addr) & cword.w));
564 case FLASH_CFI_32BIT:
565 retval = ((flash_read32(addr) & cword.l) !=
566 (flash_read32(addr) & cword.l));
568 case FLASH_CFI_64BIT:
569 retval = ((flash_read64(addr) & cword.ll) !=
570 (flash_read64(addr) & cword.ll));
576 flash_unmap(info, sect, offset, addr);
582 * flash_is_busy - check to see if the flash is busy
584 * This routine checks the status of the chip and returns true if the
587 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
591 switch (info->vendor) {
592 case CFI_CMDSET_INTEL_STANDARD:
593 case CFI_CMDSET_INTEL_EXTENDED:
594 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
596 case CFI_CMDSET_AMD_STANDARD:
597 case CFI_CMDSET_AMD_EXTENDED:
598 #ifdef CONFIG_FLASH_CFI_LEGACY
599 case CFI_CMDSET_AMD_LEGACY:
601 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
606 debug ("flash_is_busy: %d\n", retval);
610 /*-----------------------------------------------------------------------
611 * wait for XSR.7 to be set. Time out with an error if it does not.
612 * This routine does not set the flash to read-array mode.
614 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
615 ulong tout, char *prompt)
623 /* Wait for command completion */
624 start = get_timer (0);
625 while (flash_is_busy (info, sector)) {
626 if (get_timer (start) > tout) {
627 printf ("Flash %s timeout at address %lx data %lx\n",
628 prompt, info->start[sector],
629 flash_read_long (info, sector, 0));
630 flash_write_cmd (info, sector, 0, info->cmd_reset);
633 udelay (1); /* also triggers watchdog */
638 /*-----------------------------------------------------------------------
639 * Wait for XSR.7 to be set, if it times out print an error, otherwise
640 * do a full status check.
642 * This routine sets the flash to read-array mode.
644 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
645 ulong tout, char *prompt)
649 retcode = flash_status_check (info, sector, tout, prompt);
650 switch (info->vendor) {
651 case CFI_CMDSET_INTEL_EXTENDED:
652 case CFI_CMDSET_INTEL_STANDARD:
653 if ((retcode == ERR_OK)
654 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
656 printf ("Flash %s error at address %lx\n", prompt,
657 info->start[sector]);
658 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
659 FLASH_STATUS_PSLBS)) {
660 puts ("Command Sequence Error.\n");
661 } else if (flash_isset (info, sector, 0,
662 FLASH_STATUS_ECLBS)) {
663 puts ("Block Erase Error.\n");
664 retcode = ERR_NOT_ERASED;
665 } else if (flash_isset (info, sector, 0,
666 FLASH_STATUS_PSLBS)) {
667 puts ("Locking Error\n");
669 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
670 puts ("Block locked.\n");
671 retcode = ERR_PROTECTED;
673 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
674 puts ("Vpp Low Error.\n");
676 flash_write_cmd (info, sector, 0, info->cmd_reset);
684 /*-----------------------------------------------------------------------
686 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
688 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
691 unsigned long long ll;
694 switch (info->portwidth) {
698 case FLASH_CFI_16BIT:
699 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
702 cword->w = (cword->w >> 8) | w;
704 cword->w = (cword->w << 8) | c;
707 case FLASH_CFI_32BIT:
708 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
711 cword->l = (cword->l >> 8) | l;
713 cword->l = (cword->l << 8) | c;
716 case FLASH_CFI_64BIT:
717 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
720 cword->ll = (cword->ll >> 8) | ll;
722 cword->ll = (cword->ll << 8) | c;
728 /* loop through the sectors from the highest address when the passed
729 * address is greater or equal to the sector address we have a match
731 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
735 for (sector = info->sector_count - 1; sector >= 0; sector--) {
736 if (addr >= info->start[sector])
742 /*-----------------------------------------------------------------------
744 static int flash_write_cfiword (flash_info_t * info, ulong dest,
750 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
752 /* Check if Flash is (sufficiently) erased */
753 switch (info->portwidth) {
755 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
757 case FLASH_CFI_16BIT:
758 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
760 case FLASH_CFI_32BIT:
761 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
763 case FLASH_CFI_64BIT:
764 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
771 unmap_physmem(dstaddr, info->portwidth);
775 /* Disable interrupts which might cause a timeout here */
776 flag = disable_interrupts ();
778 switch (info->vendor) {
779 case CFI_CMDSET_INTEL_EXTENDED:
780 case CFI_CMDSET_INTEL_STANDARD:
781 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
782 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
784 case CFI_CMDSET_AMD_EXTENDED:
785 case CFI_CMDSET_AMD_STANDARD:
786 #ifdef CONFIG_FLASH_CFI_LEGACY
787 case CFI_CMDSET_AMD_LEGACY:
789 flash_unlock_seq (info, 0);
790 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
794 switch (info->portwidth) {
796 flash_write8(cword.c, dstaddr);
798 case FLASH_CFI_16BIT:
799 flash_write16(cword.w, dstaddr);
801 case FLASH_CFI_32BIT:
802 flash_write32(cword.l, dstaddr);
804 case FLASH_CFI_64BIT:
805 flash_write64(cword.ll, dstaddr);
809 /* re-enable interrupts if necessary */
811 enable_interrupts ();
813 unmap_physmem(dstaddr, info->portwidth);
815 return flash_full_status_check (info, find_sector (info, dest),
816 info->write_tout, "write");
819 #ifdef CFG_FLASH_USE_BUFFER_WRITE
821 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
828 void *dst = map_physmem(dest, len, MAP_NOCACHE);
830 sector = find_sector (info, dest);
832 switch (info->vendor) {
833 case CFI_CMDSET_INTEL_STANDARD:
834 case CFI_CMDSET_INTEL_EXTENDED:
835 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
836 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
837 retcode = flash_status_check (info, sector,
838 info->buffer_write_tout,
840 if (retcode == ERR_OK) {
841 /* reduce the number of loops by the width of
843 switch (info->portwidth) {
847 case FLASH_CFI_16BIT:
850 case FLASH_CFI_32BIT:
853 case FLASH_CFI_64BIT:
860 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
862 switch (info->portwidth) {
864 flash_write8(flash_read8(src), dst);
867 case FLASH_CFI_16BIT:
868 flash_write16(flash_read16(src), dst);
871 case FLASH_CFI_32BIT:
872 flash_write32(flash_read32(src), dst);
875 case FLASH_CFI_64BIT:
876 flash_write64(flash_read64(src), dst);
884 flash_write_cmd (info, sector, 0,
885 FLASH_CMD_WRITE_BUFFER_CONFIRM);
886 retcode = flash_full_status_check (
887 info, sector, info->buffer_write_tout,
893 case CFI_CMDSET_AMD_STANDARD:
894 case CFI_CMDSET_AMD_EXTENDED:
895 flash_unlock_seq(info,0);
896 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
898 switch (info->portwidth) {
901 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
903 flash_write8(flash_read8(src), dst);
907 case FLASH_CFI_16BIT:
909 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
911 flash_write16(flash_read16(src), dst);
915 case FLASH_CFI_32BIT:
917 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
919 flash_write32(flash_read32(src), dst);
923 case FLASH_CFI_64BIT:
925 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
927 flash_write64(flash_read64(src), dst);
936 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
937 retcode = flash_full_status_check (info, sector,
938 info->buffer_write_tout,
943 debug ("Unknown Command Set\n");
949 unmap_physmem(dst, len);
952 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
955 /*-----------------------------------------------------------------------
957 int flash_erase (flash_info_t * info, int s_first, int s_last)
963 if (info->flash_id != FLASH_MAN_CFI) {
964 puts ("Can't erase unknown flash type - aborted\n");
967 if ((s_first < 0) || (s_first > s_last)) {
968 puts ("- no sectors to erase\n");
973 for (sect = s_first; sect <= s_last; ++sect) {
974 if (info->protect[sect]) {
979 printf ("- Warning: %d protected sectors will not be erased!\n",
986 for (sect = s_first; sect <= s_last; sect++) {
987 if (info->protect[sect] == 0) { /* not protected */
988 switch (info->vendor) {
989 case CFI_CMDSET_INTEL_STANDARD:
990 case CFI_CMDSET_INTEL_EXTENDED:
991 flash_write_cmd (info, sect, 0,
992 FLASH_CMD_CLEAR_STATUS);
993 flash_write_cmd (info, sect, 0,
994 FLASH_CMD_BLOCK_ERASE);
995 flash_write_cmd (info, sect, 0,
996 FLASH_CMD_ERASE_CONFIRM);
998 case CFI_CMDSET_AMD_STANDARD:
999 case CFI_CMDSET_AMD_EXTENDED:
1000 flash_unlock_seq (info, sect);
1001 flash_write_cmd (info, sect,
1003 AMD_CMD_ERASE_START);
1004 flash_unlock_seq (info, sect);
1005 flash_write_cmd (info, sect, 0,
1006 AMD_CMD_ERASE_SECTOR);
1008 #ifdef CONFIG_FLASH_CFI_LEGACY
1009 case CFI_CMDSET_AMD_LEGACY:
1010 flash_unlock_seq (info, 0);
1011 flash_write_cmd (info, 0, info->addr_unlock1,
1012 AMD_CMD_ERASE_START);
1013 flash_unlock_seq (info, 0);
1014 flash_write_cmd (info, sect, 0,
1015 AMD_CMD_ERASE_SECTOR);
1019 debug ("Unkown flash vendor %d\n",
1024 if (flash_full_status_check
1025 (info, sect, info->erase_blk_tout, "erase")) {
1035 /*-----------------------------------------------------------------------
1037 void flash_print_info (flash_info_t * info)
1041 if (info->flash_id != FLASH_MAN_CFI) {
1042 puts ("missing or unknown FLASH type\n");
1046 printf ("%s FLASH (%d x %d)",
1048 (info->portwidth << 3), (info->chipwidth << 3));
1049 if (info->size < 1024*1024)
1050 printf (" Size: %ld kB in %d Sectors\n",
1051 info->size >> 10, info->sector_count);
1053 printf (" Size: %ld MB in %d Sectors\n",
1054 info->size >> 20, info->sector_count);
1056 switch (info->vendor) {
1057 case CFI_CMDSET_INTEL_STANDARD:
1058 printf ("Intel Standard");
1060 case CFI_CMDSET_INTEL_EXTENDED:
1061 printf ("Intel Extended");
1063 case CFI_CMDSET_AMD_STANDARD:
1064 printf ("AMD Standard");
1066 case CFI_CMDSET_AMD_EXTENDED:
1067 printf ("AMD Extended");
1069 #ifdef CONFIG_FLASH_CFI_LEGACY
1070 case CFI_CMDSET_AMD_LEGACY:
1071 printf ("AMD Legacy");
1075 printf ("Unknown (%d)", info->vendor);
1078 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1079 info->manufacturer_id, info->device_id);
1080 if (info->device_id == 0x7E) {
1081 printf("%04X", info->device_id2);
1083 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1084 info->erase_blk_tout,
1086 if (info->buffer_size > 1) {
1087 printf (" Buffer write timeout: %ld ms, "
1088 "buffer size: %d bytes\n",
1089 info->buffer_write_tout,
1093 puts ("\n Sector Start Addresses:");
1094 for (i = 0; i < info->sector_count; ++i) {
1097 #ifdef CFG_FLASH_EMPTY_INFO
1101 volatile unsigned long *flash;
1104 * Check if whole sector is erased
1106 size = flash_sector_size(info, i);
1108 flash = (volatile unsigned long *) info->start[i];
1109 size = size >> 2; /* divide by 4 for longword access */
1110 for (k = 0; k < size; k++) {
1111 if (*flash++ != 0xffffffff) {
1117 /* print empty and read-only info */
1118 printf (" %08lX %c %s ",
1121 info->protect[i] ? "RO" : " ");
1122 #else /* ! CFG_FLASH_EMPTY_INFO */
1123 printf (" %08lX %s ",
1125 info->protect[i] ? "RO" : " ");
1132 /*-----------------------------------------------------------------------
1133 * Copy memory to flash, returns:
1136 * 2 - Flash not erased
1138 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1146 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1149 /* get lower aligned address */
1150 wp = (addr & ~(info->portwidth - 1));
1152 /* handle unaligned start */
1153 if ((aln = addr - wp) != 0) {
1155 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1156 for (i = 0; i < aln; ++i)
1157 flash_add_byte (info, &cword, flash_read8(p + i));
1159 for (; (i < info->portwidth) && (cnt > 0); i++) {
1160 flash_add_byte (info, &cword, *src++);
1163 for (; (cnt == 0) && (i < info->portwidth); ++i)
1164 flash_add_byte (info, &cword, flash_read8(p + i));
1166 rc = flash_write_cfiword (info, wp, cword);
1167 unmap_physmem(p, info->portwidth);
1174 /* handle the aligned part */
1175 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1176 buffered_size = (info->portwidth / info->chipwidth);
1177 buffered_size *= info->buffer_size;
1178 while (cnt >= info->portwidth) {
1179 /* prohibit buffer write when buffer_size is 1 */
1180 if (info->buffer_size == 1) {
1182 for (i = 0; i < info->portwidth; i++)
1183 flash_add_byte (info, &cword, *src++);
1184 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1186 wp += info->portwidth;
1187 cnt -= info->portwidth;
1191 /* write buffer until next buffered_size aligned boundary */
1192 i = buffered_size - (wp % buffered_size);
1195 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1197 i -= i & (info->portwidth - 1);
1203 while (cnt >= info->portwidth) {
1205 for (i = 0; i < info->portwidth; i++) {
1206 flash_add_byte (info, &cword, *src++);
1208 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1210 wp += info->portwidth;
1211 cnt -= info->portwidth;
1213 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1219 * handle unaligned tail bytes
1222 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1223 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1224 flash_add_byte (info, &cword, *src++);
1227 for (; i < info->portwidth; ++i)
1228 flash_add_byte (info, &cword, flash_read8(p + i));
1229 unmap_physmem(p, info->portwidth);
1231 return flash_write_cfiword (info, wp, cword);
1234 /*-----------------------------------------------------------------------
1236 #ifdef CFG_FLASH_PROTECTION
1238 int flash_real_protect (flash_info_t * info, long sector, int prot)
1242 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1243 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1245 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1247 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1250 flash_full_status_check (info, sector, info->erase_blk_tout,
1251 prot ? "protect" : "unprotect")) == 0) {
1253 info->protect[sector] = prot;
1256 * On some of Intel's flash chips (marked via legacy_unlock)
1257 * unprotect unprotects all locking.
1259 if ((prot == 0) && (info->legacy_unlock)) {
1262 for (i = 0; i < info->sector_count; i++) {
1263 if (info->protect[i])
1264 flash_real_protect (info, i, 1);
1271 /*-----------------------------------------------------------------------
1272 * flash_read_user_serial - read the OneTimeProgramming cells
1274 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1281 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1282 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1283 memcpy (dst, src + offset, len);
1284 flash_write_cmd (info, 0, 0, info->cmd_reset);
1285 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1289 * flash_read_factory_serial - read the device Id from the protection area
1291 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1296 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1297 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1298 memcpy (buffer, src + offset, len);
1299 flash_write_cmd (info, 0, 0, info->cmd_reset);
1300 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1303 #endif /* CFG_FLASH_PROTECTION */
1306 /*-----------------------------------------------------------------------
1307 * read jedec ids from device and set corresponding fields in info struct
1309 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1312 static void flash_read_jedec_ids (flash_info_t * info)
1314 info->manufacturer_id = 0;
1315 info->device_id = 0;
1316 info->device_id2 = 0;
1318 switch (info->vendor) {
1319 case CFI_CMDSET_INTEL_STANDARD:
1320 case CFI_CMDSET_INTEL_EXTENDED:
1321 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1322 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1323 udelay(1000); /* some flash are slow to respond */
1324 info->manufacturer_id = flash_read_uchar (info,
1325 FLASH_OFFSET_MANUFACTURER_ID);
1326 info->device_id = flash_read_uchar (info,
1327 FLASH_OFFSET_DEVICE_ID);
1328 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1330 case CFI_CMDSET_AMD_STANDARD:
1331 case CFI_CMDSET_AMD_EXTENDED:
1332 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1333 flash_unlock_seq(info, 0);
1334 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1335 udelay(1000); /* some flash are slow to respond */
1336 info->manufacturer_id = flash_read_uchar (info,
1337 FLASH_OFFSET_MANUFACTURER_ID);
1338 info->device_id = flash_read_uchar (info,
1339 FLASH_OFFSET_DEVICE_ID);
1340 if (info->device_id == 0x7E) {
1341 /* AMD 3-byte (expanded) device ids */
1342 info->device_id2 = flash_read_uchar (info,
1343 FLASH_OFFSET_DEVICE_ID2);
1344 info->device_id2 <<= 8;
1345 info->device_id2 |= flash_read_uchar (info,
1346 FLASH_OFFSET_DEVICE_ID3);
1348 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1355 #ifdef CONFIG_FLASH_CFI_LEGACY
1356 /*-----------------------------------------------------------------------
1357 * Call board code to request info about non-CFI flash.
1358 * board_flash_get_legacy needs to fill in at least:
1359 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1361 static int flash_detect_legacy(ulong base, int banknum)
1363 flash_info_t *info = &flash_info[banknum];
1365 if (board_flash_get_legacy(base, banknum, info)) {
1366 /* board code may have filled info completely. If not, we
1367 use JEDEC ID probing. */
1368 if (!info->vendor) {
1370 CFI_CMDSET_AMD_STANDARD,
1371 CFI_CMDSET_INTEL_STANDARD
1375 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1376 info->vendor = modes[i];
1377 info->start[0] = base;
1378 if (info->portwidth == FLASH_CFI_8BIT
1379 && info->interface == FLASH_CFI_X8X16) {
1380 info->addr_unlock1 = 0x2AAA;
1381 info->addr_unlock2 = 0x5555;
1383 info->addr_unlock1 = 0x5555;
1384 info->addr_unlock2 = 0x2AAA;
1386 flash_read_jedec_ids(info);
1387 debug("JEDEC PROBE: ID %x %x %x\n",
1388 info->manufacturer_id,
1391 if (jedec_flash_match(info, base))
1396 switch(info->vendor) {
1397 case CFI_CMDSET_INTEL_STANDARD:
1398 case CFI_CMDSET_INTEL_EXTENDED:
1399 info->cmd_reset = FLASH_CMD_RESET;
1401 case CFI_CMDSET_AMD_STANDARD:
1402 case CFI_CMDSET_AMD_EXTENDED:
1403 case CFI_CMDSET_AMD_LEGACY:
1404 info->cmd_reset = AMD_CMD_RESET;
1407 info->flash_id = FLASH_MAN_CFI;
1410 return 0; /* use CFI */
1413 static inline int flash_detect_legacy(ulong base, int banknum)
1415 return 0; /* use CFI */
1419 /*-----------------------------------------------------------------------
1420 * detect if flash is compatible with the Common Flash Interface (CFI)
1421 * http://www.jedec.org/download/search/jesd68.pdf
1423 static void flash_read_cfi (flash_info_t *info, void *buf,
1424 unsigned int start, size_t len)
1429 for (i = 0; i < len; i++)
1430 p[i] = flash_read_uchar(info, start + i);
1433 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1437 flash_write_cmd (info, 0, 0, info->cmd_reset);
1439 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1441 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1443 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1444 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1445 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1446 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1447 sizeof(struct cfi_qry));
1448 info->interface = le16_to_cpu(qry->interface_desc);
1450 info->cfi_offset = flash_offset_cfi[cfi_offset];
1451 debug ("device interface is %d\n",
1453 debug ("found port %d chip %d ",
1454 info->portwidth, info->chipwidth);
1455 debug ("port %d bits chip %d bits\n",
1456 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1457 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1459 /* calculate command offsets as in the Linux driver */
1460 info->addr_unlock1 = 0x555;
1461 info->addr_unlock2 = 0x2aa;
1464 * modify the unlock address if we are
1465 * in compatibility mode
1467 if ( /* x8/x16 in x8 mode */
1468 ((info->chipwidth == FLASH_CFI_BY8) &&
1469 (info->interface == FLASH_CFI_X8X16)) ||
1470 /* x16/x32 in x16 mode */
1471 ((info->chipwidth == FLASH_CFI_BY16) &&
1472 (info->interface == FLASH_CFI_X16X32)))
1474 info->addr_unlock1 = 0xaaa;
1475 info->addr_unlock2 = 0x555;
1478 info->name = "CFI conformant";
1486 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1488 debug ("flash detect cfi\n");
1490 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1491 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1492 for (info->chipwidth = FLASH_CFI_BY8;
1493 info->chipwidth <= info->portwidth;
1494 info->chipwidth <<= 1)
1495 if (__flash_detect_cfi(info, qry))
1498 debug ("not found\n");
1503 * The following code cannot be run from FLASH!
1506 ulong flash_get_size (ulong base, int banknum)
1508 flash_info_t *info = &flash_info[banknum];
1510 flash_sect_t sect_cnt;
1511 unsigned long sector;
1514 uchar num_erase_regions;
1515 int erase_region_size;
1516 int erase_region_count;
1517 int geometry_reversed = 0;
1521 info->cfi_version = 0;
1522 #ifdef CFG_FLASH_PROTECTION
1523 info->legacy_unlock = 0;
1526 info->start[0] = base;
1528 if (flash_detect_cfi (info, &qry)) {
1529 info->vendor = le16_to_cpu(qry.p_id);
1530 info->ext_addr = le16_to_cpu(qry.p_adr);
1531 num_erase_regions = qry.num_erase_regions;
1533 flash_read_jedec_ids (info);
1534 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1536 if (info->ext_addr) {
1537 info->cfi_version = (ushort) flash_read_uchar (info,
1538 info->ext_addr + 3) << 8;
1539 info->cfi_version |= (ushort) flash_read_uchar (info,
1540 info->ext_addr + 4);
1543 flash_printqry (&qry);
1545 switch (info->vendor) {
1546 case CFI_CMDSET_INTEL_STANDARD:
1547 case CFI_CMDSET_INTEL_EXTENDED:
1549 info->cmd_reset = FLASH_CMD_RESET;
1550 #ifdef CFG_FLASH_PROTECTION
1551 /* read legacy lock/unlock bit from intel flash */
1552 if (info->ext_addr) {
1553 info->legacy_unlock = flash_read_uchar (info,
1554 info->ext_addr + 5) & 0x08;
1558 case CFI_CMDSET_AMD_STANDARD:
1559 case CFI_CMDSET_AMD_EXTENDED:
1560 info->cmd_reset = AMD_CMD_RESET;
1561 /* check if flash geometry needs reversal */
1562 if (num_erase_regions <= 1)
1564 /* reverse geometry if top boot part */
1565 if (info->cfi_version < 0x3131) {
1566 /* CFI < 1.1, try to guess from device id */
1567 if ((info->device_id & 0x80) != 0) {
1568 geometry_reversed = 1;
1572 /* CFI >= 1.1, deduct from top/bottom flag */
1573 /* note: ext_addr is valid since cfi_version > 0 */
1574 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1575 geometry_reversed = 1;
1580 debug ("manufacturer is %d\n", info->vendor);
1581 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1582 debug ("device id is 0x%x\n", info->device_id);
1583 debug ("device id2 is 0x%x\n", info->device_id2);
1584 debug ("cfi version is 0x%04x\n", info->cfi_version);
1586 size_ratio = info->portwidth / info->chipwidth;
1587 /* if the chip is x8/x16 reduce the ratio by half */
1588 if ((info->interface == FLASH_CFI_X8X16)
1589 && (info->chipwidth == FLASH_CFI_BY8)) {
1592 debug ("size_ratio %d port %d bits chip %d bits\n",
1593 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1594 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1595 debug ("found %d erase regions\n", num_erase_regions);
1598 for (i = 0; i < num_erase_regions; i++) {
1599 unsigned int region = i;
1601 if (i > NUM_ERASE_REGIONS) {
1602 printf ("%d erase regions found, only %d used\n",
1603 num_erase_regions, NUM_ERASE_REGIONS);
1606 if (geometry_reversed)
1607 region = num_erase_regions - 1 - i;
1609 tmp = le32_to_cpu(qry.erase_region_info[region]);
1610 debug("erase region %u: 0x%08lx\n", region, tmp);
1612 erase_region_count = (tmp & 0xffff) + 1;
1615 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1616 debug ("erase_region_count = %d erase_region_size = %d\n",
1617 erase_region_count, erase_region_size);
1618 for (j = 0; j < erase_region_count; j++) {
1619 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1620 printf("ERROR: too many flash sectors\n");
1623 info->start[sect_cnt] = sector;
1624 sector += (erase_region_size * size_ratio);
1627 * Only read protection status from
1628 * supported devices (intel...)
1630 switch (info->vendor) {
1631 case CFI_CMDSET_INTEL_EXTENDED:
1632 case CFI_CMDSET_INTEL_STANDARD:
1633 info->protect[sect_cnt] =
1634 flash_isset (info, sect_cnt,
1635 FLASH_OFFSET_PROTECT,
1636 FLASH_STATUS_PROTECT);
1639 /* default: not protected */
1640 info->protect[sect_cnt] = 0;
1647 info->sector_count = sect_cnt;
1648 info->size = 1 << qry.dev_size;
1649 /* multiply the size by the number of chips */
1650 info->size *= size_ratio;
1651 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1652 tmp = 1 << qry.block_erase_timeout_typ;
1653 info->erase_blk_tout = tmp *
1654 (1 << qry.block_erase_timeout_max);
1655 tmp = (1 << qry.buf_write_timeout_typ) *
1656 (1 << qry.buf_write_timeout_max);
1658 /* round up when converting to ms */
1659 info->buffer_write_tout = (tmp + 999) / 1000;
1660 tmp = (1 << qry.word_write_timeout_typ) *
1661 (1 << qry.word_write_timeout_max);
1662 /* round up when converting to ms */
1663 info->write_tout = (tmp + 999) / 1000;
1664 info->flash_id = FLASH_MAN_CFI;
1665 if ((info->interface == FLASH_CFI_X8X16) &&
1666 (info->chipwidth == FLASH_CFI_BY8)) {
1667 /* XXX - Need to test on x8/x16 in parallel. */
1668 info->portwidth >>= 1;
1672 flash_write_cmd (info, 0, 0, info->cmd_reset);
1673 return (info->size);
1676 /*-----------------------------------------------------------------------
1678 unsigned long flash_init (void)
1680 unsigned long size = 0;
1683 #ifdef CFG_FLASH_PROTECTION
1684 char *s = getenv("unlock");
1687 /* Init: no FLASHes known */
1688 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1689 flash_info[i].flash_id = FLASH_UNKNOWN;
1691 if (!flash_detect_legacy (bank_base[i], i))
1692 flash_get_size (bank_base[i], i);
1693 size += flash_info[i].size;
1694 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1695 #ifndef CFG_FLASH_QUIET_TEST
1696 printf ("## Unknown FLASH on Bank %d "
1697 "- Size = 0x%08lx = %ld MB\n",
1698 i+1, flash_info[i].size,
1699 flash_info[i].size << 20);
1700 #endif /* CFG_FLASH_QUIET_TEST */
1702 #ifdef CFG_FLASH_PROTECTION
1703 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1705 * Only the U-Boot image and it's environment
1706 * is protected, all other sectors are
1707 * unprotected (unlocked) if flash hardware
1708 * protection is used (CFG_FLASH_PROTECTION)
1709 * and the environment variable "unlock" is
1712 if (flash_info[i].legacy_unlock) {
1716 * Disable legacy_unlock temporarily,
1717 * since flash_real_protect would
1718 * relock all other sectors again
1721 flash_info[i].legacy_unlock = 0;
1724 * Legacy unlocking (e.g. Intel J3) ->
1725 * unlock only one sector. This will
1726 * unlock all sectors.
1728 flash_real_protect (&flash_info[i], 0, 0);
1730 flash_info[i].legacy_unlock = 1;
1733 * Manually mark other sectors as
1734 * unlocked (unprotected)
1736 for (k = 1; k < flash_info[i].sector_count; k++)
1737 flash_info[i].protect[k] = 0;
1740 * No legancy unlocking -> unlock all sectors
1742 flash_protect (FLAG_PROTECT_CLEAR,
1743 flash_info[i].start[0],
1744 flash_info[i].start[0]
1745 + flash_info[i].size - 1,
1749 #endif /* CFG_FLASH_PROTECTION */
1752 /* Monitor protection ON by default */
1753 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
1754 flash_protect (FLAG_PROTECT_SET,
1756 CFG_MONITOR_BASE + monitor_flash_len - 1,
1757 flash_get_info(CFG_MONITOR_BASE));
1760 /* Environment protection ON by default */
1761 #ifdef CFG_ENV_IS_IN_FLASH
1762 flash_protect (FLAG_PROTECT_SET,
1764 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
1765 flash_get_info(CFG_ENV_ADDR));
1768 /* Redundant environment protection ON by default */
1769 #ifdef CFG_ENV_ADDR_REDUND
1770 flash_protect (FLAG_PROTECT_SET,
1771 CFG_ENV_ADDR_REDUND,
1772 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
1773 flash_get_info(CFG_ENV_ADDR_REDUND));
1778 #endif /* CFG_FLASH_CFI */