drivers/mtd/cfi_flash.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2002-2004
   4  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5  *
   6  * Copyright (C) 2003 Arabella Software Ltd.
   7  * Yuli Barcohen <yuli@arabellasw.com>
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  *
  12  * Copyright (C) 2006
  13  * Tolunay Orkun <listmember@orkun.us>
  14  */
  15
  16 /* The DEBUG define must be before common to enable debugging */
  17 /* #define DEBUG        */
  18
  19 #include <common.h>
  20 #include <console.h>
  21 #include <dm.h>
  22 #include <env.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <asm/byteorder.h>
  28 #include <asm/unaligned.h>
  29 #include <env_internal.h>
  30 #include <mtd/cfi_flash.h>
  31 #include <watchdog.h>
  32
  33 /*
  34  * This file implements a Common Flash Interface (CFI) driver for
  35  * U-Boot.
  36  *
  37  * The width of the port and the width of the chips are determined at
  38  * initialization.  These widths are used to calculate the address for
  39  * access CFI data structures.
  40  *
  41  * References
  42  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  43  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  44  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  45  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  46  * AMD CFI Specification, Release 2.0 December 1, 2001
  47  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  48  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  49  *
  50  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  51  * reading and writing ... (yes there is such a Hardware).
  52  */
  53
  54 DECLARE_GLOBAL_DATA_PTR;
  55
  56 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  57 #ifdef CONFIG_FLASH_CFI_MTD
  58 static uint flash_verbose = 1;
  59 #else
  60 #define flash_verbose 1
  61 #endif
  62
  63 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  64
  65 /*
  66  * Check if chip width is defined. If not, start detecting with 8bit.
  67  */
  68 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  69 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  70 #endif
  71
  72 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  73 #define __maybe_weak __weak
  74 #else
  75 #define __maybe_weak static
  76 #endif
  77
  78 /*
  79  * 0xffff is an undefined value for the configuration register. When
  80  * this value is returned, the configuration register shall not be
  81  * written at all (default mode).
  82  */
  83 static u16 cfi_flash_config_reg(int i)
  84 {
  85 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  86         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  87 #else
  88         return 0xffff;
  89 #endif
  90 }
  91
  92 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  93 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  94 #else
  95 int cfi_flash_num_flash_banks;
  96 #endif
  97
  98 #ifdef CONFIG_CFI_FLASH /* for driver model */
  99 static void cfi_flash_init_dm(void)
 100 {
 101         struct udevice *dev;
 102
 103         cfi_flash_num_flash_banks = 0;
 104         /*
 105          * The uclass_first_device() will probe the first device and
 106          * uclass_next_device() will probe the rest if they exist. So
 107          * that cfi_flash_probe() will get called assigning the base
 108          * addresses that are available.
 109          */
 110         for (uclass_first_device(UCLASS_MTD, &dev);
 111              dev;
 112              uclass_next_device(&dev)) {
 113         }
 114 }
 115
 116 phys_addr_t cfi_flash_bank_addr(int i)
 117 {
 118         return flash_info[i].base;
 119 }
 120 #else
 121 __weak phys_addr_t cfi_flash_bank_addr(int i)
 122 {
 123         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 124 }
 125 #endif
 126
 127 __weak unsigned long cfi_flash_bank_size(int i)
 128 {
 129 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 130         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 131 #else
 132         return 0;
 133 #endif
 134 }
 135
 136 __maybe_weak void flash_write8(u8 value, void *addr)
 137 {
 138         __raw_writeb(value, addr);
 139 }
 140
 141 __maybe_weak void flash_write16(u16 value, void *addr)
 142 {
 143         __raw_writew(value, addr);
 144 }
 145
 146 __maybe_weak void flash_write32(u32 value, void *addr)
 147 {
 148         __raw_writel(value, addr);
 149 }
 150
 151 __maybe_weak void flash_write64(u64 value, void *addr)
 152 {
 153         /* No architectures currently implement __raw_writeq() */
 154         *(volatile u64 *)addr = value;
 155 }
 156
 157 __maybe_weak u8 flash_read8(void *addr)
 158 {
 159         return __raw_readb(addr);
 160 }
 161
 162 __maybe_weak u16 flash_read16(void *addr)
 163 {
 164         return __raw_readw(addr);
 165 }
 166
 167 __maybe_weak u32 flash_read32(void *addr)
 168 {
 169         return __raw_readl(addr);
 170 }
 171
 172 __maybe_weak u64 flash_read64(void *addr)
 173 {
 174         /* No architectures currently implement __raw_readq() */
 175         return *(volatile u64 *)addr;
 176 }
 177
 178 /*-----------------------------------------------------------------------
 179  */
 180 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 181         (defined(CONFIG_SYS_MONITOR_BASE) && \
 182         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 183 static flash_info_t *flash_get_info(ulong base)
 184 {
 185         int i;
 186         flash_info_t *info;
 187
 188         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 189                 info = &flash_info[i];
 190                 if (info->size && info->start[0] <= base &&
 191                     base <= info->start[0] + info->size - 1)
 192                         return info;
 193         }
 194
 195         return NULL;
 196 }
 197 #endif
 198
 199 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 200 {
 201         if (sect != (info->sector_count - 1))
 202                 return info->start[sect + 1] - info->start[sect];
 203         else
 204                 return info->start[0] + info->size - info->start[sect];
 205 }
 206
 207 /*-----------------------------------------------------------------------
 208  * create an address based on the offset and the port width
 209  */
 210 static inline void *
 211 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 212 {
 213         unsigned int byte_offset = offset * info->portwidth;
 214
 215         return (void *)(info->start[sect] + byte_offset);
 216 }
 217
 218 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 219                                unsigned int offset, void *addr)
 220 {
 221 }
 222
 223 /*-----------------------------------------------------------------------
 224  * make a proper sized command based on the port and chip widths
 225  */
 226 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 227 {
 228         int i;
 229         int cword_offset;
 230         int cp_offset;
 231 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 232         u32 cmd_le = cpu_to_le32(cmd);
 233 #endif
 234         uchar val;
 235         uchar *cp = (uchar *) cmdbuf;
 236
 237         for (i = info->portwidth; i > 0; i--) {
 238                 cword_offset = (info->portwidth - i) % info->chipwidth;
 239 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 240                 cp_offset = info->portwidth - i;
 241                 val = *((uchar *)&cmd_le + cword_offset);
 242 #else
 243                 cp_offset = i - 1;
 244                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 245 #endif
 246                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 247         }
 248 }
 249
 250 #ifdef DEBUG
 251 /*-----------------------------------------------------------------------
 252  * Debug support
 253  */
 254 static void print_longlong(char *str, unsigned long long data)
 255 {
 256         int i;
 257         char *cp;
 258
 259         cp = (char *)&data;
 260         for (i = 0; i < 8; i++)
 261                 sprintf(&str[i * 2], "%2.2x", *cp++);
 262 }
 263
 264 static void flash_printqry(struct cfi_qry *qry)
 265 {
 266         u8 *p = (u8 *)qry;
 267         int x, y;
 268
 269         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 270                 debug("%02x : ", x);
 271                 for (y = 0; y < 16; y++)
 272                         debug("%2.2x ", p[x + y]);
 273                 debug(" ");
 274                 for (y = 0; y < 16; y++) {
 275                         unsigned char c = p[x + y];
 276
 277                         if (c >= 0x20 && c <= 0x7e)
 278                                 debug("%c", c);
 279                         else
 280                                 debug(".");
 281                 }
 282                 debug("\n");
 283         }
 284 }
 285 #endif
 286
 287 /*-----------------------------------------------------------------------
 288  * read a character at a port width address
 289  */
 290 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 291 {
 292         uchar *cp;
 293         uchar retval;
 294
 295         cp = flash_map(info, 0, offset);
 296 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 297         retval = flash_read8(cp);
 298 #else
 299         retval = flash_read8(cp + info->portwidth - 1);
 300 #endif
 301         flash_unmap(info, 0, offset, cp);
 302         return retval;
 303 }
 304
 305 /*-----------------------------------------------------------------------
 306  * read a word at a port width address, assume 16bit bus
 307  */
 308 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 309 {
 310         ushort *addr, retval;
 311
 312         addr = flash_map(info, 0, offset);
 313         retval = flash_read16(addr);
 314         flash_unmap(info, 0, offset, addr);
 315         return retval;
 316 }
 317
 318 /*-----------------------------------------------------------------------
 319  * read a long word by picking the least significant byte of each maximum
 320  * port size word. Swap for ppc format.
 321  */
 322 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 323                               uint offset)
 324 {
 325         uchar *addr;
 326         ulong retval;
 327
 328 #ifdef DEBUG
 329         int x;
 330 #endif
 331         addr = flash_map(info, sect, offset);
 332
 333 #ifdef DEBUG
 334         debug("long addr is at %p info->portwidth = %d\n", addr,
 335               info->portwidth);
 336         for (x = 0; x < 4 * info->portwidth; x++)
 337                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 338 #endif
 339 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 340         retval = ((flash_read8(addr) << 16) |
 341                   (flash_read8(addr + info->portwidth) << 24) |
 342                   (flash_read8(addr + 2 * info->portwidth)) |
 343                   (flash_read8(addr + 3 * info->portwidth) << 8));
 344 #else
 345         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 346                   (flash_read8(addr + info->portwidth - 1) << 16) |
 347                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 348                   (flash_read8(addr + 3 * info->portwidth - 1)));
 349 #endif
 350         flash_unmap(info, sect, offset, addr);
 351
 352         return retval;
 353 }
 354
 355 /*
 356  * Write a proper sized command to the correct address
 357  */
 358 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 359                             uint offset, u32 cmd)
 360 {
 361         void *addr;
 362         cfiword_t cword;
 363
 364         addr = flash_map(info, sect, offset);
 365         flash_make_cmd(info, cmd, &cword);
 366         switch (info->portwidth) {
 367         case FLASH_CFI_8BIT:
 368                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 369                       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 370                 flash_write8(cword.w8, addr);
 371                 break;
 372         case FLASH_CFI_16BIT:
 373                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 374                       cmd, cword.w16,
 375                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 376                 flash_write16(cword.w16, addr);
 377                 break;
 378         case FLASH_CFI_32BIT:
 379                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 380                       cmd, cword.w32,
 381                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 382                 flash_write32(cword.w32, addr);
 383                 break;
 384         case FLASH_CFI_64BIT:
 385 #ifdef DEBUG
 386                 {
 387                         char str[20];
 388
 389                         print_longlong(str, cword.w64);
 390
 391                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 392                               addr, cmd, str,
 393                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 394                 }
 395 #endif
 396                 flash_write64(cword.w64, addr);
 397                 break;
 398         }
 399
 400         /* Ensure all the instructions are fully finished */
 401         sync();
 402
 403         flash_unmap(info, sect, offset, addr);
 404 }
 405
 406 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 407 {
 408         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 409         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 410 }
 411
 412 /*-----------------------------------------------------------------------
 413  */
 414 static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 415                          uchar cmd)
 416 {
 417         void *addr;
 418         cfiword_t cword;
 419         int retval;
 420
 421         addr = flash_map(info, sect, offset);
 422         flash_make_cmd(info, cmd, &cword);
 423
 424         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 425         switch (info->portwidth) {
 426         case FLASH_CFI_8BIT:
 427                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 428                 retval = (flash_read8(addr) == cword.w8);
 429                 break;
 430         case FLASH_CFI_16BIT:
 431                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 432                 retval = (flash_read16(addr) == cword.w16);
 433                 break;
 434         case FLASH_CFI_32BIT:
 435                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 436                 retval = (flash_read32(addr) == cword.w32);
 437                 break;
 438         case FLASH_CFI_64BIT:
 439 #ifdef DEBUG
 440                 {
 441                         char str1[20];
 442                         char str2[20];
 443
 444                         print_longlong(str1, flash_read64(addr));
 445                         print_longlong(str2, cword.w64);
 446                         debug("is= %s %s\n", str1, str2);
 447                 }
 448 #endif
 449                 retval = (flash_read64(addr) == cword.w64);
 450                 break;
 451         default:
 452                 retval = 0;
 453                 break;
 454         }
 455         flash_unmap(info, sect, offset, addr);
 456
 457         return retval;
 458 }
 459
 460 /*-----------------------------------------------------------------------
 461  */
 462 static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 463                        uchar cmd)
 464 {
 465         void *addr;
 466         cfiword_t cword;
 467         int retval;
 468
 469         addr = flash_map(info, sect, offset);
 470         flash_make_cmd(info, cmd, &cword);
 471         switch (info->portwidth) {
 472         case FLASH_CFI_8BIT:
 473                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 474                 break;
 475         case FLASH_CFI_16BIT:
 476                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 477                 break;
 478         case FLASH_CFI_32BIT:
 479                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 480                 break;
 481         case FLASH_CFI_64BIT:
 482                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 483                 break;
 484         default:
 485                 retval = 0;
 486                 break;
 487         }
 488         flash_unmap(info, sect, offset, addr);
 489
 490         return retval;
 491 }
 492
 493 /*-----------------------------------------------------------------------
 494  */
 495 static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 496                         uchar cmd)
 497 {
 498         u8 *addr;
 499         cfiword_t cword;
 500         int retval;
 501
 502         addr = flash_map(info, sect, offset);
 503         flash_make_cmd(info, cmd, &cword);
 504         switch (info->portwidth) {
 505         case FLASH_CFI_8BIT:
 506                 retval = flash_read8(addr) != flash_read8(addr);
 507                 break;
 508         case FLASH_CFI_16BIT:
 509                 retval = flash_read16(addr) != flash_read16(addr);
 510                 break;
 511         case FLASH_CFI_32BIT:
 512                 retval = flash_read32(addr) != flash_read32(addr);
 513                 break;
 514         case FLASH_CFI_64BIT:
 515                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 516                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 517                 break;
 518         default:
 519                 retval = 0;
 520                 break;
 521         }
 522         flash_unmap(info, sect, offset, addr);
 523
 524         return retval;
 525 }
 526
 527 /*
 528  * flash_is_busy - check to see if the flash is busy
 529  *
 530  * This routine checks the status of the chip and returns true if the
 531  * chip is busy.
 532  */
 533 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 534 {
 535         int retval;
 536
 537         switch (info->vendor) {
 538         case CFI_CMDSET_INTEL_PROG_REGIONS:
 539         case CFI_CMDSET_INTEL_STANDARD:
 540         case CFI_CMDSET_INTEL_EXTENDED:
 541                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 542                 break;
 543         case CFI_CMDSET_AMD_STANDARD:
 544         case CFI_CMDSET_AMD_EXTENDED:
 545 #ifdef CONFIG_FLASH_CFI_LEGACY
 546         case CFI_CMDSET_AMD_LEGACY:
 547 #endif
 548                 if (info->sr_supported) {
 549                         flash_write_cmd(info, sect, info->addr_unlock1,
 550                                         FLASH_CMD_READ_STATUS);
 551                         retval = !flash_isset(info, sect, 0,
 552                                               FLASH_STATUS_DONE);
 553                 } else {
 554                         retval = flash_toggle(info, sect, 0,
 555                                               AMD_STATUS_TOGGLE);
 556                 }
 557
 558                 break;
 559         default:
 560                 retval = 0;
 561         }
 562         debug("%s: %d\n", __func__, retval);
 563         return retval;
 564 }
 565
 566 /*-----------------------------------------------------------------------
 567  *  wait for XSR.7 to be set. Time out with an error if it does not.
 568  *  This routine does not set the flash to read-array mode.
 569  */
 570 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 571                               ulong tout, char *prompt)
 572 {
 573         ulong start;
 574
 575 #if CONFIG_SYS_HZ != 1000
 576         /* Avoid overflow for large HZ */
 577         if ((ulong)CONFIG_SYS_HZ > 100000)
 578                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 579         else
 580                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 581 #endif
 582
 583         /* Wait for command completion */
 584 #ifdef CONFIG_SYS_LOW_RES_TIMER
 585         reset_timer();
 586 #endif
 587         start = get_timer(0);
 588         WATCHDOG_RESET();
 589         while (flash_is_busy(info, sector)) {
 590                 if (get_timer(start) > tout) {
 591                         printf("Flash %s timeout at address %lx data %lx\n",
 592                                prompt, info->start[sector],
 593                                flash_read_long(info, sector, 0));
 594                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 595                         udelay(1);
 596                         return ERR_TIMEOUT;
 597                 }
 598                 udelay(1);              /* also triggers watchdog */
 599         }
 600         return ERR_OK;
 601 }
 602
 603 /*-----------------------------------------------------------------------
 604  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 605  * do a full status check.
 606  *
 607  * This routine sets the flash to read-array mode.
 608  */
 609 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 610                                    ulong tout, char *prompt)
 611 {
 612         int retcode;
 613
 614         retcode = flash_status_check(info, sector, tout, prompt);
 615         switch (info->vendor) {
 616         case CFI_CMDSET_INTEL_PROG_REGIONS:
 617         case CFI_CMDSET_INTEL_EXTENDED:
 618         case CFI_CMDSET_INTEL_STANDARD:
 619                 if (retcode == ERR_OK &&
 620                     !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 621                         retcode = ERR_INVAL;
 622                         printf("Flash %s error at address %lx\n", prompt,
 623                                info->start[sector]);
 624                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 625                                          FLASH_STATUS_PSLBS)) {
 626                                 puts("Command Sequence Error.\n");
 627                         } else if (flash_isset(info, sector, 0,
 628                                                 FLASH_STATUS_ECLBS)) {
 629                                 puts("Block Erase Error.\n");
 630                                 retcode = ERR_NOT_ERASED;
 631                         } else if (flash_isset(info, sector, 0,
 632                                                 FLASH_STATUS_PSLBS)) {
 633                                 puts("Locking Error\n");
 634                         }
 635                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 636                                 puts("Block locked.\n");
 637                                 retcode = ERR_PROTECTED;
 638                         }
 639                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 640                                 puts("Vpp Low Error.\n");
 641                 }
 642                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 643                 udelay(1);
 644                 break;
 645         default:
 646                 break;
 647         }
 648         return retcode;
 649 }
 650
 651 static int use_flash_status_poll(flash_info_t *info)
 652 {
 653 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 654         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 655             info->vendor == CFI_CMDSET_AMD_STANDARD)
 656                 return 1;
 657 #endif
 658         return 0;
 659 }
 660
 661 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 662                              ulong tout, char *prompt)
 663 {
 664 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 665         ulong start;
 666         int ready;
 667
 668 #if CONFIG_SYS_HZ != 1000
 669         /* Avoid overflow for large HZ */
 670         if ((ulong)CONFIG_SYS_HZ > 100000)
 671                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 672         else
 673                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 674 #endif
 675
 676         /* Wait for command completion */
 677 #ifdef CONFIG_SYS_LOW_RES_TIMER
 678         reset_timer();
 679 #endif
 680         start = get_timer(0);
 681         WATCHDOG_RESET();
 682         while (1) {
 683                 switch (info->portwidth) {
 684                 case FLASH_CFI_8BIT:
 685                         ready = flash_read8(dst) == flash_read8(src);
 686                         break;
 687                 case FLASH_CFI_16BIT:
 688                         ready = flash_read16(dst) == flash_read16(src);
 689                         break;
 690                 case FLASH_CFI_32BIT:
 691                         ready = flash_read32(dst) == flash_read32(src);
 692                         break;
 693                 case FLASH_CFI_64BIT:
 694                         ready = flash_read64(dst) == flash_read64(src);
 695                         break;
 696                 default:
 697                         ready = 0;
 698                         break;
 699                 }
 700                 if (ready)
 701                         break;
 702                 if (get_timer(start) > tout) {
 703                         printf("Flash %s timeout at address %lx data %lx\n",
 704                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 705                         return ERR_TIMEOUT;
 706                 }
 707                 udelay(1);              /* also triggers watchdog */
 708         }
 709 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 710         return ERR_OK;
 711 }
 712
 713 /*-----------------------------------------------------------------------
 714  */
 715 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 716 {
 717 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 718         unsigned short  w;
 719         unsigned int    l;
 720         unsigned long long ll;
 721 #endif
 722
 723         switch (info->portwidth) {
 724         case FLASH_CFI_8BIT:
 725                 cword->w8 = c;
 726                 break;
 727         case FLASH_CFI_16BIT:
 728 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 729                 w = c;
 730                 w <<= 8;
 731                 cword->w16 = (cword->w16 >> 8) | w;
 732 #else
 733                 cword->w16 = (cword->w16 << 8) | c;
 734 #endif
 735                 break;
 736         case FLASH_CFI_32BIT:
 737 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 738                 l = c;
 739                 l <<= 24;
 740                 cword->w32 = (cword->w32 >> 8) | l;
 741 #else
 742                 cword->w32 = (cword->w32 << 8) | c;
 743 #endif
 744                 break;
 745         case FLASH_CFI_64BIT:
 746 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 747                 ll = c;
 748                 ll <<= 56;
 749                 cword->w64 = (cword->w64 >> 8) | ll;
 750 #else
 751                 cword->w64 = (cword->w64 << 8) | c;
 752 #endif
 753                 break;
 754         }
 755 }
 756
 757 /*
 758  * Loop through the sector table starting from the previously found sector.
 759  * Searches forwards or backwards, dependent on the passed address.
 760  */
 761 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 762 {
 763         static flash_sect_t saved_sector; /* previously found sector */
 764         static flash_info_t *saved_info; /* previously used flash bank */
 765         flash_sect_t sector = saved_sector;
 766
 767         if (info != saved_info || sector >= info->sector_count)
 768                 sector = 0;
 769
 770         while ((sector < info->sector_count - 1) &&
 771                (info->start[sector] < addr))
 772                 sector++;
 773         while ((info->start[sector] > addr) && (sector > 0))
 774                 /*
 775                  * also decrements the sector in case of an overshot
 776                  * in the first loop
 777                  */
 778                 sector--;
 779
 780         saved_sector = sector;
 781         saved_info = info;
 782         return sector;
 783 }
 784
 785 /*-----------------------------------------------------------------------
 786  */
 787 static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 788 {
 789         void *dstaddr = (void *)dest;
 790         int flag;
 791         flash_sect_t sect = 0;
 792         char sect_found = 0;
 793
 794         /* Check if Flash is (sufficiently) erased */
 795         switch (info->portwidth) {
 796         case FLASH_CFI_8BIT:
 797                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 798                 break;
 799         case FLASH_CFI_16BIT:
 800                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 801                 break;
 802         case FLASH_CFI_32BIT:
 803                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 804                 break;
 805         case FLASH_CFI_64BIT:
 806                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 807                 break;
 808         default:
 809                 flag = 0;
 810                 break;
 811         }
 812         if (!flag)
 813                 return ERR_NOT_ERASED;
 814
 815         /* Disable interrupts which might cause a timeout here */
 816         flag = disable_interrupts();
 817
 818         switch (info->vendor) {
 819         case CFI_CMDSET_INTEL_PROG_REGIONS:
 820         case CFI_CMDSET_INTEL_EXTENDED:
 821         case CFI_CMDSET_INTEL_STANDARD:
 822                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 823                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 824                 break;
 825         case CFI_CMDSET_AMD_EXTENDED:
 826         case CFI_CMDSET_AMD_STANDARD:
 827                 sect = find_sector(info, dest);
 828                 flash_unlock_seq(info, sect);
 829                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 830                 sect_found = 1;
 831                 break;
 832 #ifdef CONFIG_FLASH_CFI_LEGACY
 833         case CFI_CMDSET_AMD_LEGACY:
 834                 sect = find_sector(info, dest);
 835                 flash_unlock_seq(info, 0);
 836                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 837                 sect_found = 1;
 838                 break;
 839 #endif
 840         }
 841
 842         switch (info->portwidth) {
 843         case FLASH_CFI_8BIT:
 844                 flash_write8(cword.w8, dstaddr);
 845                 break;
 846         case FLASH_CFI_16BIT:
 847                 flash_write16(cword.w16, dstaddr);
 848                 break;
 849         case FLASH_CFI_32BIT:
 850                 flash_write32(cword.w32, dstaddr);
 851                 break;
 852         case FLASH_CFI_64BIT:
 853                 flash_write64(cword.w64, dstaddr);
 854                 break;
 855         }
 856
 857         /* re-enable interrupts if necessary */
 858         if (flag)
 859                 enable_interrupts();
 860
 861         if (!sect_found)
 862                 sect = find_sector(info, dest);
 863
 864         if (use_flash_status_poll(info))
 865                 return flash_status_poll(info, &cword, dstaddr,
 866                                          info->write_tout, "write");
 867         else
 868                 return flash_full_status_check(info, sect,
 869                                                info->write_tout, "write");
 870 }
 871
 872 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 873
 874 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 875                                  int len)
 876 {
 877         flash_sect_t sector;
 878         int cnt;
 879         int retcode;
 880         u8 *src = cp;
 881         u8 *dst = (u8 *)dest;
 882         u8 *dst2 = dst;
 883         int flag = 1;
 884         uint offset = 0;
 885         unsigned int shift;
 886         uchar write_cmd;
 887
 888         switch (info->portwidth) {
 889         case FLASH_CFI_8BIT:
 890                 shift = 0;
 891                 break;
 892         case FLASH_CFI_16BIT:
 893                 shift = 1;
 894                 break;
 895         case FLASH_CFI_32BIT:
 896                 shift = 2;
 897                 break;
 898         case FLASH_CFI_64BIT:
 899                 shift = 3;
 900                 break;
 901         default:
 902                 retcode = ERR_INVAL;
 903                 goto out_unmap;
 904         }
 905
 906         cnt = len >> shift;
 907
 908         while ((cnt-- > 0) && (flag == 1)) {
 909                 switch (info->portwidth) {
 910                 case FLASH_CFI_8BIT:
 911                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 912                                 flash_read8(src));
 913                         src += 1, dst2 += 1;
 914                         break;
 915                 case FLASH_CFI_16BIT:
 916                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 917                                 flash_read16(src));
 918                         src += 2, dst2 += 2;
 919                         break;
 920                 case FLASH_CFI_32BIT:
 921                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 922                                 flash_read32(src));
 923                         src += 4, dst2 += 4;
 924                         break;
 925                 case FLASH_CFI_64BIT:
 926                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 927                                 flash_read64(src));
 928                         src += 8, dst2 += 8;
 929                         break;
 930                 }
 931         }
 932         if (!flag) {
 933                 retcode = ERR_NOT_ERASED;
 934                 goto out_unmap;
 935         }
 936
 937         src = cp;
 938         sector = find_sector(info, dest);
 939
 940         switch (info->vendor) {
 941         case CFI_CMDSET_INTEL_PROG_REGIONS:
 942         case CFI_CMDSET_INTEL_STANDARD:
 943         case CFI_CMDSET_INTEL_EXTENDED:
 944                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 945                             FLASH_CMD_WRITE_BUFFER_PROG :
 946                             FLASH_CMD_WRITE_TO_BUFFER;
 947                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 948                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 949                 flash_write_cmd(info, sector, 0, write_cmd);
 950                 retcode = flash_status_check(info, sector,
 951                                              info->buffer_write_tout,
 952                                              "write to buffer");
 953                 if (retcode == ERR_OK) {
 954                         /* reduce the number of loops by the width of
 955                          * the port
 956                          */
 957                         cnt = len >> shift;
 958                         flash_write_cmd(info, sector, 0, cnt - 1);
 959                         while (cnt-- > 0) {
 960                                 switch (info->portwidth) {
 961                                 case FLASH_CFI_8BIT:
 962                                         flash_write8(flash_read8(src), dst);
 963                                         src += 1, dst += 1;
 964                                         break;
 965                                 case FLASH_CFI_16BIT:
 966                                         flash_write16(flash_read16(src), dst);
 967                                         src += 2, dst += 2;
 968                                         break;
 969                                 case FLASH_CFI_32BIT:
 970                                         flash_write32(flash_read32(src), dst);
 971                                         src += 4, dst += 4;
 972                                         break;
 973                                 case FLASH_CFI_64BIT:
 974                                         flash_write64(flash_read64(src), dst);
 975                                         src += 8, dst += 8;
 976                                         break;
 977                                 default:
 978                                         retcode = ERR_INVAL;
 979                                         goto out_unmap;
 980                                 }
 981                         }
 982                         flash_write_cmd(info, sector, 0,
 983                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 984                         retcode = flash_full_status_check(
 985                                 info, sector, info->buffer_write_tout,
 986                                 "buffer write");
 987                 }
 988
 989                 break;
 990
 991         case CFI_CMDSET_AMD_STANDARD:
 992         case CFI_CMDSET_AMD_EXTENDED:
 993                 flash_unlock_seq(info, sector);
 994
 995 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 996                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
 997 #endif
 998                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
 999                 cnt = len >> shift;
1000                 flash_write_cmd(info, sector, offset, cnt - 1);
1001
1002                 switch (info->portwidth) {
1003                 case FLASH_CFI_8BIT:
1004                         while (cnt-- > 0) {
1005                                 flash_write8(flash_read8(src), dst);
1006                                 src += 1, dst += 1;
1007                         }
1008                         break;
1009                 case FLASH_CFI_16BIT:
1010                         while (cnt-- > 0) {
1011                                 flash_write16(flash_read16(src), dst);
1012                                 src += 2, dst += 2;
1013                         }
1014                         break;
1015                 case FLASH_CFI_32BIT:
1016                         while (cnt-- > 0) {
1017                                 flash_write32(flash_read32(src), dst);
1018                                 src += 4, dst += 4;
1019                         }
1020                         break;
1021                 case FLASH_CFI_64BIT:
1022                         while (cnt-- > 0) {
1023                                 flash_write64(flash_read64(src), dst);
1024                                 src += 8, dst += 8;
1025                         }
1026                         break;
1027                 default:
1028                         retcode = ERR_INVAL;
1029                         goto out_unmap;
1030                 }
1031
1032                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1033                 if (use_flash_status_poll(info))
1034                         retcode = flash_status_poll(info, src - (1 << shift),
1035                                                     dst - (1 << shift),
1036                                                     info->buffer_write_tout,
1037                                                     "buffer write");
1038                 else
1039                         retcode = flash_full_status_check(info, sector,
1040                                                           info->buffer_write_tout,
1041                                                           "buffer write");
1042                 break;
1043
1044         default:
1045                 debug("Unknown Command Set\n");
1046                 retcode = ERR_INVAL;
1047                 break;
1048         }
1049
1050 out_unmap:
1051         return retcode;
1052 }
1053 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1054
1055 /*-----------------------------------------------------------------------
1056  */
1057 int flash_erase(flash_info_t *info, int s_first, int s_last)
1058 {
1059         int rcode = 0;
1060         int prot;
1061         flash_sect_t sect;
1062         int st;
1063
1064         if (info->flash_id != FLASH_MAN_CFI) {
1065                 puts("Can't erase unknown flash type - aborted\n");
1066                 return 1;
1067         }
1068         if (s_first < 0 || s_first > s_last) {
1069                 puts("- no sectors to erase\n");
1070                 return 1;
1071         }
1072
1073         prot = 0;
1074         for (sect = s_first; sect <= s_last; ++sect)
1075                 if (info->protect[sect])
1076                         prot++;
1077         if (prot) {
1078                 printf("- Warning: %d protected sectors will not be erased!\n",
1079                        prot);
1080         } else if (flash_verbose) {
1081                 putc('\n');
1082         }
1083
1084         for (sect = s_first; sect <= s_last; sect++) {
1085                 if (ctrlc()) {
1086                         printf("\n");
1087                         return 1;
1088                 }
1089
1090                 if (info->protect[sect] == 0) { /* not protected */
1091 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1092                         int k;
1093                         int size;
1094                         int erased;
1095                         u32 *flash;
1096
1097                         /*
1098                          * Check if whole sector is erased
1099                          */
1100                         size = flash_sector_size(info, sect);
1101                         erased = 1;
1102                         flash = (u32 *)info->start[sect];
1103                         /* divide by 4 for longword access */
1104                         size = size >> 2;
1105                         for (k = 0; k < size; k++) {
1106                                 if (flash_read32(flash++) != 0xffffffff) {
1107                                         erased = 0;
1108                                         break;
1109                                 }
1110                         }
1111                         if (erased) {
1112                                 if (flash_verbose)
1113                                         putc(',');
1114                                 continue;
1115                         }
1116 #endif
1117                         switch (info->vendor) {
1118                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1119                         case CFI_CMDSET_INTEL_STANDARD:
1120                         case CFI_CMDSET_INTEL_EXTENDED:
1121                                 flash_write_cmd(info, sect, 0,
1122                                                 FLASH_CMD_CLEAR_STATUS);
1123                                 flash_write_cmd(info, sect, 0,
1124                                                 FLASH_CMD_BLOCK_ERASE);
1125                                 flash_write_cmd(info, sect, 0,
1126                                                 FLASH_CMD_ERASE_CONFIRM);
1127                                 break;
1128                         case CFI_CMDSET_AMD_STANDARD:
1129                         case CFI_CMDSET_AMD_EXTENDED:
1130                                 flash_unlock_seq(info, sect);
1131                                 flash_write_cmd(info, sect,
1132                                                 info->addr_unlock1,
1133                                                 AMD_CMD_ERASE_START);
1134                                 flash_unlock_seq(info, sect);
1135                                 flash_write_cmd(info, sect, 0,
1136                                                 info->cmd_erase_sector);
1137                                 break;
1138 #ifdef CONFIG_FLASH_CFI_LEGACY
1139                         case CFI_CMDSET_AMD_LEGACY:
1140                                 flash_unlock_seq(info, 0);
1141                                 flash_write_cmd(info, 0, info->addr_unlock1,
1142                                                 AMD_CMD_ERASE_START);
1143                                 flash_unlock_seq(info, 0);
1144                                 flash_write_cmd(info, sect, 0,
1145                                                 AMD_CMD_ERASE_SECTOR);
1146                                 break;
1147 #endif
1148                         default:
1149                                 debug("Unknown flash vendor %d\n",
1150                                       info->vendor);
1151                                 break;
1152                         }
1153
1154                         if (use_flash_status_poll(info)) {
1155                                 cfiword_t cword;
1156                                 void *dest;
1157
1158                                 cword.w64 = 0xffffffffffffffffULL;
1159                                 dest = flash_map(info, sect, 0);
1160                                 st = flash_status_poll(info, &cword, dest,
1161                                                        info->erase_blk_tout,
1162                                                        "erase");
1163                                 flash_unmap(info, sect, 0, dest);
1164                         } else {
1165                                 st = flash_full_status_check(info, sect,
1166                                                              info->erase_blk_tout,
1167                                                              "erase");
1168                         }
1169
1170                         if (st)
1171                                 rcode = 1;
1172                         else if (flash_verbose)
1173                                 putc('.');
1174                 }
1175         }
1176
1177         if (flash_verbose)
1178                 puts(" done\n");
1179
1180         return rcode;
1181 }
1182
1183 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1184 static int sector_erased(flash_info_t *info, int i)
1185 {
1186         int k;
1187         int size;
1188         u32 *flash;
1189
1190         /*
1191          * Check if whole sector is erased
1192          */
1193         size = flash_sector_size(info, i);
1194         flash = (u32 *)info->start[i];
1195         /* divide by 4 for longword access */
1196         size = size >> 2;
1197
1198         for (k = 0; k < size; k++) {
1199                 if (flash_read32(flash++) != 0xffffffff)
1200                         return 0;       /* not erased */
1201         }
1202
1203         return 1;                       /* erased */
1204 }
1205 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1206
1207 void flash_print_info(flash_info_t *info)
1208 {
1209         int i;
1210
1211         if (info->flash_id != FLASH_MAN_CFI) {
1212                 puts("missing or unknown FLASH type\n");
1213                 return;
1214         }
1215
1216         printf("%s flash (%d x %d)",
1217                info->name,
1218                (info->portwidth << 3), (info->chipwidth << 3));
1219         if (info->size < 1024 * 1024)
1220                 printf("  Size: %ld kB in %d Sectors\n",
1221                        info->size >> 10, info->sector_count);
1222         else
1223                 printf("  Size: %ld MB in %d Sectors\n",
1224                        info->size >> 20, info->sector_count);
1225         printf("  ");
1226         switch (info->vendor) {
1227         case CFI_CMDSET_INTEL_PROG_REGIONS:
1228                 printf("Intel Prog Regions");
1229                 break;
1230         case CFI_CMDSET_INTEL_STANDARD:
1231                 printf("Intel Standard");
1232                 break;
1233         case CFI_CMDSET_INTEL_EXTENDED:
1234                 printf("Intel Extended");
1235                 break;
1236         case CFI_CMDSET_AMD_STANDARD:
1237                 printf("AMD Standard");
1238                 break;
1239         case CFI_CMDSET_AMD_EXTENDED:
1240                 printf("AMD Extended");
1241                 break;
1242 #ifdef CONFIG_FLASH_CFI_LEGACY
1243         case CFI_CMDSET_AMD_LEGACY:
1244                 printf("AMD Legacy");
1245                 break;
1246 #endif
1247         default:
1248                 printf("Unknown (%d)", info->vendor);
1249                 break;
1250         }
1251         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1252                info->manufacturer_id);
1253         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1254                info->device_id);
1255         if ((info->device_id & 0xff) == 0x7E) {
1256                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1257                        info->device_id2);
1258         }
1259         if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1260                 printf("\n  Advanced Sector Protection (PPB) enabled");
1261         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1262                info->erase_blk_tout, info->write_tout);
1263         if (info->buffer_size > 1) {
1264                 printf("  Buffer write timeout: %ld ms, ",
1265                        info->buffer_write_tout);
1266                 printf("buffer size: %d bytes\n", info->buffer_size);
1267         }
1268
1269         puts("\n  Sector Start Addresses:");
1270         for (i = 0; i < info->sector_count; ++i) {
1271                 if (ctrlc())
1272                         break;
1273                 if ((i % 5) == 0)
1274                         putc('\n');
1275 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1276                 /* print empty and read-only info */
1277                 printf("  %08lX %c %s ",
1278                        info->start[i],
1279                        sector_erased(info, i) ? 'E' : ' ',
1280                        info->protect[i] ? "RO" : "  ");
1281 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1282                 printf("  %08lX   %s ",
1283                        info->start[i],
1284                        info->protect[i] ? "RO" : "  ");
1285 #endif
1286         }
1287         putc('\n');
1288 }
1289
1290 /*-----------------------------------------------------------------------
1291  * This is used in a few places in write_buf() to show programming
1292  * progress.  Making it a function is nasty because it needs to do side
1293  * effect updates to digit and dots.  Repeated code is nasty too, so
1294  * we define it once here.
1295  */
1296 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1297 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1298         if (flash_verbose) { \
1299                 dots -= dots_sub; \
1300                 if (scale > 0 && dots <= 0) { \
1301                         if ((digit % 5) == 0) \
1302                                 printf("%d", digit / 5); \
1303                         else \
1304                                 putc('.'); \
1305                         digit--; \
1306                         dots += scale; \
1307                 } \
1308         }
1309 #else
1310 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1311 #endif
1312
1313 /*-----------------------------------------------------------------------
1314  * Copy memory to flash, returns:
1315  * 0 - OK
1316  * 1 - write timeout
1317  * 2 - Flash not erased
1318  */
1319 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1320 {
1321         ulong wp;
1322         uchar *p;
1323         int aln;
1324         cfiword_t cword;
1325         int i, rc;
1326 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1327         int buffered_size;
1328 #endif
1329 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1330         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1331         int scale = 0;
1332         int dots  = 0;
1333
1334         /*
1335          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1336          */
1337         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1338                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1339                         CONFIG_FLASH_SHOW_PROGRESS);
1340         }
1341 #endif
1342
1343         /* get lower aligned address */
1344         wp = (addr & ~(info->portwidth - 1));
1345
1346         /* handle unaligned start */
1347         aln = addr - wp;
1348         if (aln != 0) {
1349                 cword.w32 = 0;
1350                 p = (uchar *)wp;
1351                 for (i = 0; i < aln; ++i)
1352                         flash_add_byte(info, &cword, flash_read8(p + i));
1353
1354                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1355                         flash_add_byte(info, &cword, *src++);
1356                         cnt--;
1357                 }
1358                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1359                         flash_add_byte(info, &cword, flash_read8(p + i));
1360
1361                 rc = flash_write_cfiword(info, wp, cword);
1362                 if (rc != 0)
1363                         return rc;
1364
1365                 wp += i;
1366                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1367         }
1368
1369         /* handle the aligned part */
1370 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1371         buffered_size = (info->portwidth / info->chipwidth);
1372         buffered_size *= info->buffer_size;
1373         while (cnt >= info->portwidth) {
1374                 /* prohibit buffer write when buffer_size is 1 */
1375                 if (info->buffer_size == 1) {
1376                         cword.w32 = 0;
1377                         for (i = 0; i < info->portwidth; i++)
1378                                 flash_add_byte(info, &cword, *src++);
1379                         rc = flash_write_cfiword(info, wp, cword);
1380                         if (rc != 0)
1381                                 return rc;
1382                         wp += info->portwidth;
1383                         cnt -= info->portwidth;
1384                         continue;
1385                 }
1386
1387                 /* write buffer until next buffered_size aligned boundary */
1388                 i = buffered_size - (wp % buffered_size);
1389                 if (i > cnt)
1390                         i = cnt;
1391                 rc = flash_write_cfibuffer(info, wp, src, i);
1392                 if (rc != ERR_OK)
1393                         return rc;
1394                 i -= i & (info->portwidth - 1);
1395                 wp += i;
1396                 src += i;
1397                 cnt -= i;
1398                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1399                 /* Only check every once in a while */
1400                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1401                         return ERR_ABORTED;
1402         }
1403 #else
1404         while (cnt >= info->portwidth) {
1405                 cword.w32 = 0;
1406                 for (i = 0; i < info->portwidth; i++)
1407                         flash_add_byte(info, &cword, *src++);
1408                 rc = flash_write_cfiword(info, wp, cword);
1409                 if (rc != 0)
1410                         return rc;
1411                 wp += info->portwidth;
1412                 cnt -= info->portwidth;
1413                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1414                 /* Only check every once in a while */
1415                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1416                         return ERR_ABORTED;
1417         }
1418 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1419
1420         if (cnt == 0)
1421                 return (0);
1422
1423         /*
1424          * handle unaligned tail bytes
1425          */
1426         cword.w32 = 0;
1427         p = (uchar *)wp;
1428         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1429                 flash_add_byte(info, &cword, *src++);
1430                 --cnt;
1431         }
1432         for (; i < info->portwidth; ++i)
1433                 flash_add_byte(info, &cword, flash_read8(p + i));
1434
1435         return flash_write_cfiword(info, wp, cword);
1436 }
1437
1438 static inline int manufact_match(flash_info_t *info, u32 manu)
1439 {
1440         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1441 }
1442
1443 /*-----------------------------------------------------------------------
1444  */
1445 #ifdef CONFIG_SYS_FLASH_PROTECTION
1446
1447 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1448 {
1449         if (manufact_match(info, INTEL_MANUFACT) &&
1450             info->device_id == NUMONYX_256MBIT) {
1451                 /*
1452                  * see errata called
1453                  * "Numonyx Axcell P33/P30 Specification Update" :)
1454                  */
1455                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1456                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1457                                    prot)) {
1458                         /*
1459                          * cmd must come before FLASH_CMD_PROTECT + 20us
1460                          * Disable interrupts which might cause a timeout here.
1461                          */
1462                         int flag = disable_interrupts();
1463                         unsigned short cmd;
1464
1465                         if (prot)
1466                                 cmd = FLASH_CMD_PROTECT_SET;
1467                         else
1468                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1469
1470                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1471                         flash_write_cmd(info, sector, 0, cmd);
1472                         /* re-enable interrupts if necessary */
1473                         if (flag)
1474                                 enable_interrupts();
1475                 }
1476                 return 1;
1477         }
1478         return 0;
1479 }
1480
1481 int flash_real_protect(flash_info_t *info, long sector, int prot)
1482 {
1483         int retcode = 0;
1484
1485         switch (info->vendor) {
1486         case CFI_CMDSET_INTEL_PROG_REGIONS:
1487         case CFI_CMDSET_INTEL_STANDARD:
1488         case CFI_CMDSET_INTEL_EXTENDED:
1489                 if (!cfi_protect_bugfix(info, sector, prot)) {
1490                         flash_write_cmd(info, sector, 0,
1491                                         FLASH_CMD_CLEAR_STATUS);
1492                         flash_write_cmd(info, sector, 0,
1493                                         FLASH_CMD_PROTECT);
1494                         if (prot)
1495                                 flash_write_cmd(info, sector, 0,
1496                                                 FLASH_CMD_PROTECT_SET);
1497                         else
1498                                 flash_write_cmd(info, sector, 0,
1499                                                 FLASH_CMD_PROTECT_CLEAR);
1500                 }
1501                 break;
1502         case CFI_CMDSET_AMD_EXTENDED:
1503         case CFI_CMDSET_AMD_STANDARD:
1504                 /* U-Boot only checks the first byte */
1505                 if (manufact_match(info, ATM_MANUFACT)) {
1506                         if (prot) {
1507                                 flash_unlock_seq(info, 0);
1508                                 flash_write_cmd(info, 0,
1509                                                 info->addr_unlock1,
1510                                                 ATM_CMD_SOFTLOCK_START);
1511                                 flash_unlock_seq(info, 0);
1512                                 flash_write_cmd(info, sector, 0,
1513                                                 ATM_CMD_LOCK_SECT);
1514                         } else {
1515                                 flash_write_cmd(info, 0,
1516                                                 info->addr_unlock1,
1517                                                 AMD_CMD_UNLOCK_START);
1518                                 if (info->device_id == ATM_ID_BV6416)
1519                                         flash_write_cmd(info, sector,
1520                                                         0, ATM_CMD_UNLOCK_SECT);
1521                         }
1522                 }
1523                 if (info->legacy_unlock) {
1524                         int flag = disable_interrupts();
1525                         int lock_flag;
1526
1527                         flash_unlock_seq(info, 0);
1528                         flash_write_cmd(info, 0, info->addr_unlock1,
1529                                         AMD_CMD_SET_PPB_ENTRY);
1530                         lock_flag = flash_isset(info, sector, 0, 0x01);
1531                         if (prot) {
1532                                 if (lock_flag) {
1533                                         flash_write_cmd(info, sector, 0,
1534                                                         AMD_CMD_PPB_LOCK_BC1);
1535                                         flash_write_cmd(info, sector, 0,
1536                                                         AMD_CMD_PPB_LOCK_BC2);
1537                                 }
1538                                 debug("sector %ld %slocked\n", sector,
1539                                       lock_flag ? "" : "already ");
1540                         } else {
1541                                 if (!lock_flag) {
1542                                         debug("unlock %ld\n", sector);
1543                                         flash_write_cmd(info, 0, 0,
1544                                                         AMD_CMD_PPB_UNLOCK_BC1);
1545                                         flash_write_cmd(info, 0, 0,
1546                                                         AMD_CMD_PPB_UNLOCK_BC2);
1547                                 }
1548                                 debug("sector %ld %sunlocked\n", sector,
1549                                       !lock_flag ? "" : "already ");
1550                         }
1551                         if (flag)
1552                                 enable_interrupts();
1553
1554                         if (flash_status_check(info, sector,
1555                                                info->erase_blk_tout,
1556                                                prot ? "protect" : "unprotect"))
1557                                 printf("status check error\n");
1558
1559                         flash_write_cmd(info, 0, 0,
1560                                         AMD_CMD_SET_PPB_EXIT_BC1);
1561                         flash_write_cmd(info, 0, 0,
1562                                         AMD_CMD_SET_PPB_EXIT_BC2);
1563                 }
1564                 break;
1565 #ifdef CONFIG_FLASH_CFI_LEGACY
1566         case CFI_CMDSET_AMD_LEGACY:
1567                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1568                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1569                 if (prot)
1570                         flash_write_cmd(info, sector, 0,
1571                                         FLASH_CMD_PROTECT_SET);
1572                 else
1573                         flash_write_cmd(info, sector, 0,
1574                                         FLASH_CMD_PROTECT_CLEAR);
1575 #endif
1576         };
1577
1578         /*
1579          * Flash needs to be in status register read mode for
1580          * flash_full_status_check() to work correctly
1581          */
1582         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1583         retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1584                                           prot ? "protect" : "unprotect");
1585         if (retcode == 0) {
1586                 info->protect[sector] = prot;
1587
1588                 /*
1589                  * On some of Intel's flash chips (marked via legacy_unlock)
1590                  * unprotect unprotects all locking.
1591                  */
1592                 if (prot == 0 && info->legacy_unlock) {
1593                         flash_sect_t i;
1594
1595                         for (i = 0; i < info->sector_count; i++) {
1596                                 if (info->protect[i])
1597                                         flash_real_protect(info, i, 1);
1598                         }
1599                 }
1600         }
1601         return retcode;
1602 }
1603
1604 /*-----------------------------------------------------------------------
1605  * flash_read_user_serial - read the OneTimeProgramming cells
1606  */
1607 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1608                             int len)
1609 {
1610         uchar *src;
1611         uchar *dst;
1612
1613         dst = buffer;
1614         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1615         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1616         memcpy(dst, src + offset, len);
1617         flash_write_cmd(info, 0, 0, info->cmd_reset);
1618         udelay(1);
1619         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1620 }
1621
1622 /*
1623  * flash_read_factory_serial - read the device Id from the protection area
1624  */
1625 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1626                                int len)
1627 {
1628         uchar *src;
1629
1630         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1631         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1632         memcpy(buffer, src + offset, len);
1633         flash_write_cmd(info, 0, 0, info->cmd_reset);
1634         udelay(1);
1635         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1636 }
1637
1638 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1639
1640 /*-----------------------------------------------------------------------
1641  * Reverse the order of the erase regions in the CFI QRY structure.
1642  * This is needed for chips that are either a) correctly detected as
1643  * top-boot, or b) buggy.
1644  */
1645 static void cfi_reverse_geometry(struct cfi_qry *qry)
1646 {
1647         unsigned int i, j;
1648         u32 tmp;
1649
1650         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1651                 tmp = get_unaligned(&qry->erase_region_info[i]);
1652                 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1653                               &qry->erase_region_info[i]);
1654                 put_unaligned(tmp, &qry->erase_region_info[j]);
1655         }
1656 }
1657
1658 /*-----------------------------------------------------------------------
1659  * read jedec ids from device and set corresponding fields in info struct
1660  *
1661  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1662  *
1663  */
1664 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1665 {
1666         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1667         udelay(1);
1668         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1669         udelay(1000); /* some flash are slow to respond */
1670         info->manufacturer_id = flash_read_uchar(info,
1671                                                  FLASH_OFFSET_MANUFACTURER_ID);
1672         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1673                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1674                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1675         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1676 }
1677
1678 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1679 {
1680         info->cmd_reset = FLASH_CMD_RESET;
1681
1682         cmdset_intel_read_jedec_ids(info);
1683         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1684
1685 #ifdef CONFIG_SYS_FLASH_PROTECTION
1686         /* read legacy lock/unlock bit from intel flash */
1687         if (info->ext_addr) {
1688                 info->legacy_unlock =
1689                         flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1690         }
1691 #endif
1692
1693         return 0;
1694 }
1695
1696 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1697 {
1698         ushort bank_id = 0;
1699         uchar  manu_id;
1700         uchar  feature;
1701
1702         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1703         flash_unlock_seq(info, 0);
1704         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1705         udelay(1000); /* some flash are slow to respond */
1706
1707         manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1708         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1709         while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1710                 bank_id += 0x100;
1711                 manu_id = flash_read_uchar(info,
1712                                            bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1713         }
1714         info->manufacturer_id = manu_id;
1715
1716         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1717               info->ext_addr, info->cfi_version);
1718         if (info->ext_addr && info->cfi_version >= 0x3134) {
1719                 /* read software feature (at 0x53) */
1720                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1721                 debug("feature = 0x%x\n", feature);
1722                 info->sr_supported = feature & 0x1;
1723         }
1724
1725         switch (info->chipwidth) {
1726         case FLASH_CFI_8BIT:
1727                 info->device_id = flash_read_uchar(info,
1728                                                    FLASH_OFFSET_DEVICE_ID);
1729                 if (info->device_id == 0x7E) {
1730                         /* AMD 3-byte (expanded) device ids */
1731                         info->device_id2 = flash_read_uchar(info,
1732                                                             FLASH_OFFSET_DEVICE_ID2);
1733                         info->device_id2 <<= 8;
1734                         info->device_id2 |= flash_read_uchar(info,
1735                                                 FLASH_OFFSET_DEVICE_ID3);
1736                 }
1737                 break;
1738         case FLASH_CFI_16BIT:
1739                 info->device_id = flash_read_word(info,
1740                                                   FLASH_OFFSET_DEVICE_ID);
1741                 if ((info->device_id & 0xff) == 0x7E) {
1742                         /* AMD 3-byte (expanded) device ids */
1743                         info->device_id2 = flash_read_uchar(info,
1744                                                             FLASH_OFFSET_DEVICE_ID2);
1745                         info->device_id2 <<= 8;
1746                         info->device_id2 |= flash_read_uchar(info,
1747                                                 FLASH_OFFSET_DEVICE_ID3);
1748                 }
1749                 break;
1750         default:
1751                 break;
1752         }
1753         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1754         udelay(1);
1755 }
1756
1757 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1758 {
1759         info->cmd_reset = AMD_CMD_RESET;
1760         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1761
1762         cmdset_amd_read_jedec_ids(info);
1763         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1764
1765 #ifdef CONFIG_SYS_FLASH_PROTECTION
1766         if (info->ext_addr) {
1767                 /* read sector protect/unprotect scheme (at 0x49) */
1768                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1769                         info->legacy_unlock = 1;
1770         }
1771 #endif
1772
1773         return 0;
1774 }
1775
1776 #ifdef CONFIG_FLASH_CFI_LEGACY
1777 static void flash_read_jedec_ids(flash_info_t *info)
1778 {
1779         info->manufacturer_id = 0;
1780         info->device_id       = 0;
1781         info->device_id2      = 0;
1782
1783         switch (info->vendor) {
1784         case CFI_CMDSET_INTEL_PROG_REGIONS:
1785         case CFI_CMDSET_INTEL_STANDARD:
1786         case CFI_CMDSET_INTEL_EXTENDED:
1787                 cmdset_intel_read_jedec_ids(info);
1788                 break;
1789         case CFI_CMDSET_AMD_STANDARD:
1790         case CFI_CMDSET_AMD_EXTENDED:
1791                 cmdset_amd_read_jedec_ids(info);
1792                 break;
1793         default:
1794                 break;
1795         }
1796 }
1797
1798 /*-----------------------------------------------------------------------
1799  * Call board code to request info about non-CFI flash.
1800  * board_flash_get_legacy needs to fill in at least:
1801  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1802  */
1803 static int flash_detect_legacy(phys_addr_t base, int banknum)
1804 {
1805         flash_info_t *info = &flash_info[banknum];
1806
1807         if (board_flash_get_legacy(base, banknum, info)) {
1808                 /* board code may have filled info completely. If not, we
1809                  * use JEDEC ID probing.
1810                  */
1811                 if (!info->vendor) {
1812                         int modes[] = {
1813                                 CFI_CMDSET_AMD_STANDARD,
1814                                 CFI_CMDSET_INTEL_STANDARD
1815                         };
1816                         int i;
1817
1818                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1819                                 info->vendor = modes[i];
1820                                 info->start[0] =
1821                                         (ulong)map_physmem(base,
1822                                                            info->portwidth,
1823                                                            MAP_NOCACHE);
1824                                 if (info->portwidth == FLASH_CFI_8BIT &&
1825                                     info->interface == FLASH_CFI_X8X16) {
1826                                         info->addr_unlock1 = 0x2AAA;
1827                                         info->addr_unlock2 = 0x5555;
1828                                 } else {
1829                                         info->addr_unlock1 = 0x5555;
1830                                         info->addr_unlock2 = 0x2AAA;
1831                                 }
1832                                 flash_read_jedec_ids(info);
1833                                 debug("JEDEC PROBE: ID %x %x %x\n",
1834                                       info->manufacturer_id,
1835                                       info->device_id,
1836                                       info->device_id2);
1837                                 if (jedec_flash_match(info, info->start[0]))
1838                                         break;
1839
1840                                 unmap_physmem((void *)info->start[0],
1841                                               info->portwidth);
1842                         }
1843                 }
1844
1845                 switch (info->vendor) {
1846                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1847                 case CFI_CMDSET_INTEL_STANDARD:
1848                 case CFI_CMDSET_INTEL_EXTENDED:
1849                         info->cmd_reset = FLASH_CMD_RESET;
1850                         break;
1851                 case CFI_CMDSET_AMD_STANDARD:
1852                 case CFI_CMDSET_AMD_EXTENDED:
1853                 case CFI_CMDSET_AMD_LEGACY:
1854                         info->cmd_reset = AMD_CMD_RESET;
1855                         break;
1856                 }
1857                 info->flash_id = FLASH_MAN_CFI;
1858                 return 1;
1859         }
1860         return 0; /* use CFI */
1861 }
1862 #else
1863 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1864 {
1865         return 0; /* use CFI */
1866 }
1867 #endif
1868
1869 /*-----------------------------------------------------------------------
1870  * detect if flash is compatible with the Common Flash Interface (CFI)
1871  * http://www.jedec.org/download/search/jesd68.pdf
1872  */
1873 static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1874                            size_t len)
1875 {
1876         u8 *p = buf;
1877         unsigned int i;
1878
1879         for (i = 0; i < len; i++)
1880                 p[i] = flash_read_uchar(info, start + i);
1881 }
1882
1883 static void __flash_cmd_reset(flash_info_t *info)
1884 {
1885         /*
1886          * We do not yet know what kind of commandset to use, so we issue
1887          * the reset command in both Intel and AMD variants, in the hope
1888          * that AMD flash roms ignore the Intel command.
1889          */
1890         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1891         udelay(1);
1892         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1893 }
1894
1895 void flash_cmd_reset(flash_info_t *info)
1896         __attribute__((weak, alias("__flash_cmd_reset")));
1897
1898 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1899 {
1900         int cfi_offset;
1901
1902         /* Issue FLASH reset command */
1903         flash_cmd_reset(info);
1904
1905         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1906              cfi_offset++) {
1907                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1908                                 FLASH_CMD_CFI);
1909                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1910                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1911                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1912                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1913                                        sizeof(struct cfi_qry));
1914                         info->interface = le16_to_cpu(qry->interface_desc);
1915
1916                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1917                         debug("device interface is %d\n",
1918                               info->interface);
1919                         debug("found port %d chip %d ",
1920                               info->portwidth, info->chipwidth);
1921                         debug("port %d bits chip %d bits\n",
1922                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1923                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1924
1925                         /* calculate command offsets as in the Linux driver */
1926                         info->addr_unlock1 = 0x555;
1927                         info->addr_unlock2 = 0x2aa;
1928
1929                         /*
1930                          * modify the unlock address if we are
1931                          * in compatibility mode
1932                          */
1933                         if (/* x8/x16 in x8 mode */
1934                             (info->chipwidth == FLASH_CFI_BY8 &&
1935                                 info->interface == FLASH_CFI_X8X16) ||
1936                             /* x16/x32 in x16 mode */
1937                             (info->chipwidth == FLASH_CFI_BY16 &&
1938                                 info->interface == FLASH_CFI_X16X32)) {
1939                                 info->addr_unlock1 = 0xaaa;
1940                                 info->addr_unlock2 = 0x555;
1941                         }
1942
1943                         info->name = "CFI conformant";
1944                         return 1;
1945                 }
1946         }
1947
1948         return 0;
1949 }
1950
1951 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1952 {
1953         debug("flash detect cfi\n");
1954
1955         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1956              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1957                 for (info->chipwidth = FLASH_CFI_BY8;
1958                      info->chipwidth <= info->portwidth;
1959                      info->chipwidth <<= 1)
1960                         if (__flash_detect_cfi(info, qry))
1961                                 return 1;
1962         }
1963         debug("not found\n");
1964         return 0;
1965 }
1966
1967 /*
1968  * Manufacturer-specific quirks. Add workarounds for geometry
1969  * reversal, etc. here.
1970  */
1971 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1972 {
1973         /* check if flash geometry needs reversal */
1974         if (qry->num_erase_regions > 1) {
1975                 /* reverse geometry if top boot part */
1976                 if (info->cfi_version < 0x3131) {
1977                         /* CFI < 1.1, try to guess from device id */
1978                         if ((info->device_id & 0x80) != 0)
1979                                 cfi_reverse_geometry(qry);
1980                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1981                         /* CFI >= 1.1, deduct from top/bottom flag */
1982                         /* note: ext_addr is valid since cfi_version > 0 */
1983                         cfi_reverse_geometry(qry);
1984                 }
1985         }
1986 }
1987
1988 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1989 {
1990         int reverse_geometry = 0;
1991
1992         /* Check the "top boot" bit in the PRI */
1993         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1994                 reverse_geometry = 1;
1995
1996         /* AT49BV6416(T) list the erase regions in the wrong order.
1997          * However, the device ID is identical with the non-broken
1998          * AT49BV642D they differ in the high byte.
1999          */
2000         if (info->device_id == 0xd6 || info->device_id == 0xd2)
2001                 reverse_geometry = !reverse_geometry;
2002
2003         if (reverse_geometry)
2004                 cfi_reverse_geometry(qry);
2005 }
2006
2007 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2008 {
2009         /* check if flash geometry needs reversal */
2010         if (qry->num_erase_regions > 1) {
2011                 /* reverse geometry if top boot part */
2012                 if (info->cfi_version < 0x3131) {
2013                         /* CFI < 1.1, guess by device id */
2014                         if (info->device_id == 0x22CA || /* M29W320DT */
2015                             info->device_id == 0x2256 || /* M29W320ET */
2016                             info->device_id == 0x22D7) { /* M29W800DT */
2017                                 cfi_reverse_geometry(qry);
2018                         }
2019                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2020                         /* CFI >= 1.1, deduct from top/bottom flag */
2021                         /* note: ext_addr is valid since cfi_version > 0 */
2022                         cfi_reverse_geometry(qry);
2023                 }
2024         }
2025 }
2026
2027 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2028 {
2029         /*
2030          * SST, for many recent nor parallel flashes, says they are
2031          * CFI-conformant. This is not true, since qry struct.
2032          * reports a std. AMD command set (0x0002), while SST allows to
2033          * erase two different sector sizes for the same memory.
2034          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2035          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2036          * Since CFI query detect the 4KB number of sectors, users expects
2037          * a sector granularity of 4KB, and it is here set.
2038          */
2039         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2040             info->device_id == 0x5C23) { /* SST39VF3202B */
2041                 /* set sector granularity to 4KB */
2042                 info->cmd_erase_sector = 0x50;
2043         }
2044 }
2045
2046 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2047 {
2048         /*
2049          * The M29EW devices seem to report the CFI information wrong
2050          * when it's in 8 bit mode.
2051          * There's an app note from Numonyx on this issue.
2052          * So adjust the buffer size for M29EW while operating in 8-bit mode
2053          */
2054         if (qry->max_buf_write_size > 0x8 &&
2055             info->device_id == 0x7E &&
2056             (info->device_id2 == 0x2201 ||
2057              info->device_id2 == 0x2301 ||
2058              info->device_id2 == 0x2801 ||
2059              info->device_id2 == 0x4801)) {
2060                 debug("Adjusted buffer size on Numonyx flash");
2061                 debug(" M29EW family in 8 bit mode\n");
2062                 qry->max_buf_write_size = 0x8;
2063         }
2064 }
2065
2066 /*
2067  * The following code cannot be run from FLASH!
2068  *
2069  */
2070 ulong flash_get_size(phys_addr_t base, int banknum)
2071 {
2072         flash_info_t *info = &flash_info[banknum];
2073         int i, j;
2074         flash_sect_t sect_cnt;
2075         phys_addr_t sector;
2076         unsigned long tmp;
2077         int size_ratio;
2078         uchar num_erase_regions;
2079         int erase_region_size;
2080         int erase_region_count;
2081         struct cfi_qry qry;
2082         unsigned long max_size;
2083
2084         memset(&qry, 0, sizeof(qry));
2085
2086         info->ext_addr = 0;
2087         info->cfi_version = 0;
2088 #ifdef CONFIG_SYS_FLASH_PROTECTION
2089         info->legacy_unlock = 0;
2090 #endif
2091
2092         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2093
2094         if (flash_detect_cfi(info, &qry)) {
2095                 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2096                 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2097                 num_erase_regions = qry.num_erase_regions;
2098
2099                 if (info->ext_addr) {
2100                         info->cfi_version = (ushort)flash_read_uchar(info,
2101                                                 info->ext_addr + 3) << 8;
2102                         info->cfi_version |= (ushort)flash_read_uchar(info,
2103                                                 info->ext_addr + 4);
2104                 }
2105
2106 #ifdef DEBUG
2107                 flash_printqry(&qry);
2108 #endif
2109
2110                 switch (info->vendor) {
2111                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2112                 case CFI_CMDSET_INTEL_STANDARD:
2113                 case CFI_CMDSET_INTEL_EXTENDED:
2114                         cmdset_intel_init(info, &qry);
2115                         break;
2116                 case CFI_CMDSET_AMD_STANDARD:
2117                 case CFI_CMDSET_AMD_EXTENDED:
2118                         cmdset_amd_init(info, &qry);
2119                         break;
2120                 default:
2121                         printf("CFI: Unknown command set 0x%x\n",
2122                                info->vendor);
2123                         /*
2124                          * Unfortunately, this means we don't know how
2125                          * to get the chip back to Read mode. Might
2126                          * as well try an Intel-style reset...
2127                          */
2128                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2129                         return 0;
2130                 }
2131
2132                 /* Do manufacturer-specific fixups */
2133                 switch (info->manufacturer_id) {
2134                 case 0x0001: /* AMD */
2135                 case 0x0037: /* AMIC */
2136                         flash_fixup_amd(info, &qry);
2137                         break;
2138                 case 0x001f:
2139                         flash_fixup_atmel(info, &qry);
2140                         break;
2141                 case 0x0020:
2142                         flash_fixup_stm(info, &qry);
2143                         break;
2144                 case 0x00bf: /* SST */
2145                         flash_fixup_sst(info, &qry);
2146                         break;
2147                 case 0x0089: /* Numonyx */
2148                         flash_fixup_num(info, &qry);
2149                         break;
2150                 }
2151
2152                 debug("manufacturer is %d\n", info->vendor);
2153                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2154                 debug("device id is 0x%x\n", info->device_id);
2155                 debug("device id2 is 0x%x\n", info->device_id2);
2156                 debug("cfi version is 0x%04x\n", info->cfi_version);
2157
2158                 size_ratio = info->portwidth / info->chipwidth;
2159                 /* if the chip is x8/x16 reduce the ratio by half */
2160                 if (info->interface == FLASH_CFI_X8X16 &&
2161                     info->chipwidth == FLASH_CFI_BY8) {
2162                         size_ratio >>= 1;
2163                 }
2164                 debug("size_ratio %d port %d bits chip %d bits\n",
2165                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2166                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2167                 info->size = 1 << qry.dev_size;
2168                 /* multiply the size by the number of chips */
2169                 info->size *= size_ratio;
2170                 max_size = cfi_flash_bank_size(banknum);
2171                 if (max_size && info->size > max_size) {
2172                         debug("[truncated from %ldMiB]", info->size >> 20);
2173                         info->size = max_size;
2174                 }
2175                 debug("found %d erase regions\n", num_erase_regions);
2176                 sect_cnt = 0;
2177                 sector = base;
2178                 for (i = 0; i < num_erase_regions; i++) {
2179                         if (i > NUM_ERASE_REGIONS) {
2180                                 printf("%d erase regions found, only %d used\n",
2181                                        num_erase_regions, NUM_ERASE_REGIONS);
2182                                 break;
2183                         }
2184
2185                         tmp = le32_to_cpu(get_unaligned(
2186                                                 &qry.erase_region_info[i]));
2187                         debug("erase region %u: 0x%08lx\n", i, tmp);
2188
2189                         erase_region_count = (tmp & 0xffff) + 1;
2190                         tmp >>= 16;
2191                         erase_region_size =
2192                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2193                         debug("erase_region_count = %d ", erase_region_count);
2194                         debug("erase_region_size = %d\n", erase_region_size);
2195                         for (j = 0; j < erase_region_count; j++) {
2196                                 if (sector - base >= info->size)
2197                                         break;
2198                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2199                                         printf("ERROR: too many flash sectors\n");
2200                                         break;
2201                                 }
2202                                 info->start[sect_cnt] =
2203                                         (ulong)map_physmem(sector,
2204                                                            info->portwidth,
2205                                                            MAP_NOCACHE);
2206                                 sector += (erase_region_size * size_ratio);
2207
2208                                 /*
2209                                  * Only read protection status from
2210                                  * supported devices (intel...)
2211                                  */
2212                                 switch (info->vendor) {
2213                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2214                                 case CFI_CMDSET_INTEL_EXTENDED:
2215                                 case CFI_CMDSET_INTEL_STANDARD:
2216                                         /*
2217                                          * Set flash to read-id mode. Otherwise
2218                                          * reading protected status is not
2219                                          * guaranteed.
2220                                          */
2221                                         flash_write_cmd(info, sect_cnt, 0,
2222                                                         FLASH_CMD_READ_ID);
2223                                         info->protect[sect_cnt] =
2224                                                 flash_isset(info, sect_cnt,
2225                                                             FLASH_OFFSET_PROTECT,
2226                                                             FLASH_STATUS_PROTECT);
2227                                         flash_write_cmd(info, sect_cnt, 0,
2228                                                         FLASH_CMD_RESET);
2229                                         break;
2230                                 case CFI_CMDSET_AMD_EXTENDED:
2231                                 case CFI_CMDSET_AMD_STANDARD:
2232                                         if (!info->legacy_unlock) {
2233                                                 /* default: not protected */
2234                                                 info->protect[sect_cnt] = 0;
2235                                                 break;
2236                                         }
2237
2238                                         /* Read protection (PPB) from sector */
2239                                         flash_write_cmd(info, 0, 0,
2240                                                         info->cmd_reset);
2241                                         flash_unlock_seq(info, 0);
2242                                         flash_write_cmd(info, 0,
2243                                                         info->addr_unlock1,
2244                                                         FLASH_CMD_READ_ID);
2245                                         info->protect[sect_cnt] =
2246                                                 flash_isset(
2247                                                         info, sect_cnt,
2248                                                         FLASH_OFFSET_PROTECT,
2249                                                         FLASH_STATUS_PROTECT);
2250                                         break;
2251                                 default:
2252                                         /* default: not protected */
2253                                         info->protect[sect_cnt] = 0;
2254                                 }
2255
2256                                 sect_cnt++;
2257                         }
2258                 }
2259
2260                 info->sector_count = sect_cnt;
2261                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2262                 tmp = 1 << qry.block_erase_timeout_typ;
2263                 info->erase_blk_tout = tmp *
2264                         (1 << qry.block_erase_timeout_max);
2265                 tmp = (1 << qry.buf_write_timeout_typ) *
2266                         (1 << qry.buf_write_timeout_max);
2267
2268                 /* round up when converting to ms */
2269                 info->buffer_write_tout = (tmp + 999) / 1000;
2270                 tmp = (1 << qry.word_write_timeout_typ) *
2271                         (1 << qry.word_write_timeout_max);
2272                 /* round up when converting to ms */
2273                 info->write_tout = (tmp + 999) / 1000;
2274                 info->flash_id = FLASH_MAN_CFI;
2275                 if (info->interface == FLASH_CFI_X8X16 &&
2276                     info->chipwidth == FLASH_CFI_BY8) {
2277                         /* XXX - Need to test on x8/x16 in parallel. */
2278                         info->portwidth >>= 1;
2279                 }
2280
2281                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2282         }
2283
2284         return (info->size);
2285 }
2286
2287 #ifdef CONFIG_FLASH_CFI_MTD
2288 void flash_set_verbose(uint v)
2289 {
2290         flash_verbose = v;
2291 }
2292 #endif
2293
2294 static void cfi_flash_set_config_reg(u32 base, u16 val)
2295 {
2296 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2297         /*
2298          * Only set this config register if really defined
2299          * to a valid value (0xffff is invalid)
2300          */
2301         if (val == 0xffff)
2302                 return;
2303
2304         /*
2305          * Set configuration register. Data is "encrypted" in the 16 lower
2306          * address bits.
2307          */
2308         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2309         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2310
2311         /*
2312          * Finally issue reset-command to bring device back to
2313          * read-array mode
2314          */
2315         flash_write16(FLASH_CMD_RESET, (void *)base);
2316 #endif
2317 }
2318
2319 /*-----------------------------------------------------------------------
2320  */
2321
2322 static void flash_protect_default(void)
2323 {
2324 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2325         int i;
2326         struct apl_s {
2327                 ulong start;
2328                 ulong size;
2329         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2330 #endif
2331
2332         /* Monitor protection ON by default */
2333 #if defined(CONFIG_SYS_MONITOR_BASE) && \
2334         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2335         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2336         flash_protect(FLAG_PROTECT_SET,
2337                       CONFIG_SYS_MONITOR_BASE,
2338                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2339                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2340 #endif
2341
2342         /* Environment protection ON by default */
2343 #ifdef CONFIG_ENV_IS_IN_FLASH
2344         flash_protect(FLAG_PROTECT_SET,
2345                       CONFIG_ENV_ADDR,
2346                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2347                       flash_get_info(CONFIG_ENV_ADDR));
2348 #endif
2349
2350         /* Redundant environment protection ON by default */
2351 #ifdef CONFIG_ENV_ADDR_REDUND
2352         flash_protect(FLAG_PROTECT_SET,
2353                       CONFIG_ENV_ADDR_REDUND,
2354                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2355                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2356 #endif
2357
2358 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2359         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2360                 debug("autoprotecting from %08lx to %08lx\n",
2361                       apl[i].start, apl[i].start + apl[i].size - 1);
2362                 flash_protect(FLAG_PROTECT_SET,
2363                               apl[i].start,
2364                               apl[i].start + apl[i].size - 1,
2365                               flash_get_info(apl[i].start));
2366         }
2367 #endif
2368 }
2369
2370 unsigned long flash_init(void)
2371 {
2372         unsigned long size = 0;
2373         int i;
2374
2375 #ifdef CONFIG_SYS_FLASH_PROTECTION
2376         /* read environment from EEPROM */
2377         char s[64];
2378
2379         env_get_f("unlock", s, sizeof(s));
2380 #endif
2381
2382 #ifdef CONFIG_CFI_FLASH /* for driver model */
2383         cfi_flash_init_dm();
2384 #endif
2385
2386         /* Init: no FLASHes known */
2387         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2388                 flash_info[i].flash_id = FLASH_UNKNOWN;
2389
2390                 /* Optionally write flash configuration register */
2391                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2392                                          cfi_flash_config_reg(i));
2393
2394                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2395                         flash_get_size(cfi_flash_bank_addr(i), i);
2396                 size += flash_info[i].size;
2397                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2398 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2399                         printf("## Unknown flash on Bank %d ", i + 1);
2400                         printf("- Size = 0x%08lx = %ld MB\n",
2401                                flash_info[i].size,
2402                                flash_info[i].size >> 20);
2403 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2404                 }
2405 #ifdef CONFIG_SYS_FLASH_PROTECTION
2406                 else if (strcmp(s, "yes") == 0) {
2407                         /*
2408                          * Only the U-Boot image and it's environment
2409                          * is protected, all other sectors are
2410                          * unprotected (unlocked) if flash hardware
2411                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2412                          * and the environment variable "unlock" is
2413                          * set to "yes".
2414                          */
2415                         if (flash_info[i].legacy_unlock) {
2416                                 int k;
2417
2418                                 /*
2419                                  * Disable legacy_unlock temporarily,
2420                                  * since flash_real_protect would
2421                                  * relock all other sectors again
2422                                  * otherwise.
2423                                  */
2424                                 flash_info[i].legacy_unlock = 0;
2425
2426                                 /*
2427                                  * Legacy unlocking (e.g. Intel J3) ->
2428                                  * unlock only one sector. This will
2429                                  * unlock all sectors.
2430                                  */
2431                                 flash_real_protect(&flash_info[i], 0, 0);
2432
2433                                 flash_info[i].legacy_unlock = 1;
2434
2435                                 /*
2436                                  * Manually mark other sectors as
2437                                  * unlocked (unprotected)
2438                                  */
2439                                 for (k = 1; k < flash_info[i].sector_count; k++)
2440                                         flash_info[i].protect[k] = 0;
2441                         } else {
2442                                 /*
2443                                  * No legancy unlocking -> unlock all sectors
2444                                  */
2445                                 flash_protect(FLAG_PROTECT_CLEAR,
2446                                               flash_info[i].start[0],
2447                                               flash_info[i].start[0]
2448                                               + flash_info[i].size - 1,
2449                                               &flash_info[i]);
2450                         }
2451                 }
2452 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2453         }
2454
2455         flash_protect_default();
2456 #ifdef CONFIG_FLASH_CFI_MTD
2457         cfi_mtd_init();
2458 #endif
2459
2460         return (size);
2461 }
2462
2463 #ifdef CONFIG_CFI_FLASH /* for driver model */
2464 static int cfi_flash_probe(struct udevice *dev)
2465 {
2466         const fdt32_t *cell;
2467         int addrc, sizec;
2468         int len, idx;
2469
2470         addrc = dev_read_addr_cells(dev);
2471         sizec = dev_read_size_cells(dev);
2472
2473         /* decode regs; there may be multiple reg tuples. */
2474         cell = dev_read_prop(dev, "reg", &len);
2475         if (!cell)
2476                 return -ENOENT;
2477         idx = 0;
2478         len /= sizeof(fdt32_t);
2479         while (idx < len) {
2480                 phys_addr_t addr;
2481
2482                 addr = dev_translate_address(dev, cell + idx);
2483
2484                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2485                 flash_info[cfi_flash_num_flash_banks].base = addr;
2486                 cfi_flash_num_flash_banks++;
2487
2488                 idx += addrc + sizec;
2489         }
2490         gd->bd->bi_flashstart = flash_info[0].base;
2491
2492         return 0;
2493 }
2494
2495 static const struct udevice_id cfi_flash_ids[] = {
2496         { .compatible = "cfi-flash" },
2497         { .compatible = "jedec-flash" },
2498         {}
2499 };
2500
2501 U_BOOT_DRIVER(cfi_flash) = {
2502         .name   = "cfi_flash",
2503         .id     = UCLASS_MTD,
2504         .of_match = cfi_flash_ids,
2505         .probe = cfi_flash_probe,
2506 };
2507 #endif /* CONFIG_CFI_FLASH */