2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
44 * This file implements a Common Flash Interface (CFI) driver for
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
56 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
61 * reading and writing ... (yes there is such a Hardware).
64 #ifndef CFG_FLASH_BANKS_LIST
65 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
68 #define FLASH_CMD_CFI 0x98
69 #define FLASH_CMD_READ_ID 0x90
70 #define FLASH_CMD_RESET 0xff
71 #define FLASH_CMD_BLOCK_ERASE 0x20
72 #define FLASH_CMD_ERASE_CONFIRM 0xD0
73 #define FLASH_CMD_WRITE 0x40
74 #define FLASH_CMD_PROTECT 0x60
75 #define FLASH_CMD_PROTECT_SET 0x01
76 #define FLASH_CMD_PROTECT_CLEAR 0xD0
77 #define FLASH_CMD_CLEAR_STATUS 0x50
78 #define FLASH_CMD_READ_STATUS 0x70
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
83 #define FLASH_STATUS_DONE 0x80
84 #define FLASH_STATUS_ESS 0x40
85 #define FLASH_STATUS_ECLBS 0x20
86 #define FLASH_STATUS_PSLBS 0x10
87 #define FLASH_STATUS_VPENS 0x08
88 #define FLASH_STATUS_PSS 0x04
89 #define FLASH_STATUS_DPS 0x02
90 #define FLASH_STATUS_R 0x01
91 #define FLASH_STATUS_PROTECT 0x01
93 #define AMD_CMD_RESET 0xF0
94 #define AMD_CMD_WRITE 0xA0
95 #define AMD_CMD_ERASE_START 0x80
96 #define AMD_CMD_ERASE_SECTOR 0x30
97 #define AMD_CMD_UNLOCK_START 0xAA
98 #define AMD_CMD_UNLOCK_ACK 0x55
99 #define AMD_CMD_WRITE_TO_BUFFER 0x25
100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
102 #define AMD_STATUS_TOGGLE 0x40
103 #define AMD_STATUS_ERROR 0x20
105 #define ATM_CMD_UNLOCK_SECT 0x70
106 #define ATM_CMD_SOFTLOCK_START 0x80
107 #define ATM_CMD_LOCK_SECT 0x40
109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
110 #define FLASH_OFFSET_DEVICE_ID 0x01
111 #define FLASH_OFFSET_DEVICE_ID2 0x0E
112 #define FLASH_OFFSET_DEVICE_ID3 0x0F
113 #define FLASH_OFFSET_CFI 0x55
114 #define FLASH_OFFSET_CFI_ALT 0x555
115 #define FLASH_OFFSET_CFI_RESP 0x10
116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
117 /* extended query table primary address */
118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
119 #define FLASH_OFFSET_WTOUT 0x1F
120 #define FLASH_OFFSET_WBTOUT 0x20
121 #define FLASH_OFFSET_ETOUT 0x21
122 #define FLASH_OFFSET_CETOUT 0x22
123 #define FLASH_OFFSET_WMAX_TOUT 0x23
124 #define FLASH_OFFSET_WBMAX_TOUT 0x24
125 #define FLASH_OFFSET_EMAX_TOUT 0x25
126 #define FLASH_OFFSET_CEMAX_TOUT 0x26
127 #define FLASH_OFFSET_SIZE 0x27
128 #define FLASH_OFFSET_INTERFACE 0x28
129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
132 #define FLASH_OFFSET_PROTECT 0x02
133 #define FLASH_OFFSET_USER_PROTECTION 0x85
134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
136 #define CFI_CMDSET_NONE 0
137 #define CFI_CMDSET_INTEL_EXTENDED 1
138 #define CFI_CMDSET_AMD_STANDARD 2
139 #define CFI_CMDSET_INTEL_STANDARD 3
140 #define CFI_CMDSET_AMD_EXTENDED 4
141 #define CFI_CMDSET_MITSU_STANDARD 256
142 #define CFI_CMDSET_MITSU_EXTENDED 257
143 #define CFI_CMDSET_SST 258
144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512
146 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
147 # undef FLASH_CMD_RESET
148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
155 unsigned long long ll;
158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
162 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
163 #ifdef CFG_MAX_FLASH_BANKS_DETECT
164 # define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS_DETECT
166 # define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS
169 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
172 * Check if chip width is defined. If not, start detecting with 8bit.
174 #ifndef CFG_FLASH_CFI_WIDTH
175 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
178 typedef unsigned long flash_sect_t;
180 /* CFI standard query structure */
191 u8 word_write_timeout_typ;
192 u8 buf_write_timeout_typ;
193 u8 block_erase_timeout_typ;
194 u8 chip_erase_timeout_typ;
195 u8 word_write_timeout_max;
196 u8 buf_write_timeout_max;
197 u8 block_erase_timeout_max;
198 u8 chip_erase_timeout_max;
201 u16 max_buf_write_size;
202 u8 num_erase_regions;
203 u32 erase_region_info[NUM_ERASE_REGIONS];
204 } __attribute__((packed));
210 } __attribute__((packed));
212 static void flash_write8(u8 value, void *addr)
214 __raw_writeb(value, addr);
217 static void flash_write16(u16 value, void *addr)
219 __raw_writew(value, addr);
222 static void flash_write32(u32 value, void *addr)
224 __raw_writel(value, addr);
227 static void flash_write64(u64 value, void *addr)
229 /* No architectures currently implement __raw_writeq() */
230 *(volatile u64 *)addr = value;
233 static u8 flash_read8(void *addr)
235 return __raw_readb(addr);
238 static u16 flash_read16(void *addr)
240 return __raw_readw(addr);
243 static u32 flash_read32(void *addr)
245 return __raw_readl(addr);
248 static u64 __flash_read64(void *addr)
250 /* No architectures currently implement __raw_readq() */
251 return *(volatile u64 *)addr;
254 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
256 /*-----------------------------------------------------------------------
258 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
259 static flash_info_t *flash_get_info(ulong base)
262 flash_info_t * info = 0;
264 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
265 info = & flash_info[i];
266 if (info->size && info->start[0] <= base &&
267 base <= info->start[0] + info->size - 1)
271 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
275 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
277 if (sect != (info->sector_count - 1))
278 return info->start[sect + 1] - info->start[sect];
280 return info->start[0] + info->size - info->start[sect];
283 /*-----------------------------------------------------------------------
284 * create an address based on the offset and the port width
287 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
289 unsigned int byte_offset = offset * info->portwidth;
291 return map_physmem(info->start[sect] + byte_offset,
292 flash_sector_size(info, sect) - byte_offset,
296 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
297 unsigned int offset, void *addr)
299 unsigned int byte_offset = offset * info->portwidth;
301 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
304 /*-----------------------------------------------------------------------
305 * make a proper sized command based on the port and chip widths
307 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
312 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
313 u32 cmd_le = cpu_to_le32(cmd);
316 uchar *cp = (uchar *) cmdbuf;
318 for (i = info->portwidth; i > 0; i--){
319 cword_offset = (info->portwidth-i)%info->chipwidth;
320 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
321 cp_offset = info->portwidth - i;
322 val = *((uchar*)&cmd_le + cword_offset);
325 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
327 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
332 /*-----------------------------------------------------------------------
335 static void print_longlong (char *str, unsigned long long data)
340 cp = (unsigned char *) &data;
341 for (i = 0; i < 8; i++)
342 sprintf (&str[i * 2], "%2.2x", *cp++);
345 static void flash_printqry (struct cfi_qry *qry)
350 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
352 for (y = 0; y < 16; y++)
353 debug("%2.2x ", p[x + y]);
355 for (y = 0; y < 16; y++) {
356 unsigned char c = p[x + y];
357 if (c >= 0x20 && c <= 0x7e)
368 /*-----------------------------------------------------------------------
369 * read a character at a port width address
371 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
376 cp = flash_map (info, 0, offset);
377 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
378 retval = flash_read8(cp);
380 retval = flash_read8(cp + info->portwidth - 1);
382 flash_unmap (info, 0, offset, cp);
386 /*-----------------------------------------------------------------------
387 * read a word at a port width address, assume 16bit bus
389 static inline ushort flash_read_word (flash_info_t * info, uint offset)
391 ushort *addr, retval;
393 addr = flash_map (info, 0, offset);
394 retval = flash_read16 (addr);
395 flash_unmap (info, 0, offset, addr);
400 /*-----------------------------------------------------------------------
401 * read a long word by picking the least significant byte of each maximum
402 * port size word. Swap for ppc format.
404 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
413 addr = flash_map (info, sect, offset);
416 debug ("long addr is at %p info->portwidth = %d\n", addr,
418 for (x = 0; x < 4 * info->portwidth; x++) {
419 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
422 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
423 retval = ((flash_read8(addr) << 16) |
424 (flash_read8(addr + info->portwidth) << 24) |
425 (flash_read8(addr + 2 * info->portwidth)) |
426 (flash_read8(addr + 3 * info->portwidth) << 8));
428 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
429 (flash_read8(addr + info->portwidth - 1) << 16) |
430 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
431 (flash_read8(addr + 3 * info->portwidth - 1)));
433 flash_unmap(info, sect, offset, addr);
439 * Write a proper sized command to the correct address
441 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
442 uint offset, u32 cmd)
448 addr = flash_map (info, sect, offset);
449 flash_make_cmd (info, cmd, &cword);
450 switch (info->portwidth) {
452 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
453 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
454 flash_write8(cword.c, addr);
456 case FLASH_CFI_16BIT:
457 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
459 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
460 flash_write16(cword.w, addr);
462 case FLASH_CFI_32BIT:
463 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
465 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
466 flash_write32(cword.l, addr);
468 case FLASH_CFI_64BIT:
473 print_longlong (str, cword.ll);
475 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
480 flash_write64(cword.ll, addr);
484 /* Ensure all the instructions are fully finished */
487 flash_unmap(info, sect, offset, addr);
490 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
492 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
493 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
496 /*-----------------------------------------------------------------------
498 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
499 uint offset, uchar cmd)
505 addr = flash_map (info, sect, offset);
506 flash_make_cmd (info, cmd, &cword);
508 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
509 switch (info->portwidth) {
511 debug ("is= %x %x\n", flash_read8(addr), cword.c);
512 retval = (flash_read8(addr) == cword.c);
514 case FLASH_CFI_16BIT:
515 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
516 retval = (flash_read16(addr) == cword.w);
518 case FLASH_CFI_32BIT:
519 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
520 retval = (flash_read32(addr) == cword.l);
522 case FLASH_CFI_64BIT:
528 print_longlong (str1, flash_read64(addr));
529 print_longlong (str2, cword.ll);
530 debug ("is= %s %s\n", str1, str2);
533 retval = (flash_read64(addr) == cword.ll);
539 flash_unmap(info, sect, offset, addr);
544 /*-----------------------------------------------------------------------
546 static int flash_isset (flash_info_t * info, flash_sect_t sect,
547 uint offset, uchar cmd)
553 addr = flash_map (info, sect, offset);
554 flash_make_cmd (info, cmd, &cword);
555 switch (info->portwidth) {
557 retval = ((flash_read8(addr) & cword.c) == cword.c);
559 case FLASH_CFI_16BIT:
560 retval = ((flash_read16(addr) & cword.w) == cword.w);
562 case FLASH_CFI_32BIT:
563 retval = ((flash_read32(addr) & cword.l) == cword.l);
565 case FLASH_CFI_64BIT:
566 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
572 flash_unmap(info, sect, offset, addr);
577 /*-----------------------------------------------------------------------
579 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
580 uint offset, uchar cmd)
586 addr = flash_map (info, sect, offset);
587 flash_make_cmd (info, cmd, &cword);
588 switch (info->portwidth) {
590 retval = flash_read8(addr) != flash_read8(addr);
592 case FLASH_CFI_16BIT:
593 retval = flash_read16(addr) != flash_read16(addr);
595 case FLASH_CFI_32BIT:
596 retval = flash_read32(addr) != flash_read32(addr);
598 case FLASH_CFI_64BIT:
599 retval = flash_read64(addr) != flash_read64(addr);
605 flash_unmap(info, sect, offset, addr);
611 * flash_is_busy - check to see if the flash is busy
613 * This routine checks the status of the chip and returns true if the
616 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
620 switch (info->vendor) {
621 case CFI_CMDSET_INTEL_PROG_REGIONS:
622 case CFI_CMDSET_INTEL_STANDARD:
623 case CFI_CMDSET_INTEL_EXTENDED:
624 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
626 case CFI_CMDSET_AMD_STANDARD:
627 case CFI_CMDSET_AMD_EXTENDED:
628 #ifdef CONFIG_FLASH_CFI_LEGACY
629 case CFI_CMDSET_AMD_LEGACY:
631 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
636 debug ("flash_is_busy: %d\n", retval);
640 /*-----------------------------------------------------------------------
641 * wait for XSR.7 to be set. Time out with an error if it does not.
642 * This routine does not set the flash to read-array mode.
644 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
645 ulong tout, char *prompt)
653 /* Wait for command completion */
654 start = get_timer (0);
655 while (flash_is_busy (info, sector)) {
656 if (get_timer (start) > tout) {
657 printf ("Flash %s timeout at address %lx data %lx\n",
658 prompt, info->start[sector],
659 flash_read_long (info, sector, 0));
660 flash_write_cmd (info, sector, 0, info->cmd_reset);
663 udelay (1); /* also triggers watchdog */
668 /*-----------------------------------------------------------------------
669 * Wait for XSR.7 to be set, if it times out print an error, otherwise
670 * do a full status check.
672 * This routine sets the flash to read-array mode.
674 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
675 ulong tout, char *prompt)
679 retcode = flash_status_check (info, sector, tout, prompt);
680 switch (info->vendor) {
681 case CFI_CMDSET_INTEL_PROG_REGIONS:
682 case CFI_CMDSET_INTEL_EXTENDED:
683 case CFI_CMDSET_INTEL_STANDARD:
684 if ((retcode == ERR_OK)
685 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
687 printf ("Flash %s error at address %lx\n", prompt,
688 info->start[sector]);
689 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
690 FLASH_STATUS_PSLBS)) {
691 puts ("Command Sequence Error.\n");
692 } else if (flash_isset (info, sector, 0,
693 FLASH_STATUS_ECLBS)) {
694 puts ("Block Erase Error.\n");
695 retcode = ERR_NOT_ERASED;
696 } else if (flash_isset (info, sector, 0,
697 FLASH_STATUS_PSLBS)) {
698 puts ("Locking Error\n");
700 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
701 puts ("Block locked.\n");
702 retcode = ERR_PROTECTED;
704 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
705 puts ("Vpp Low Error.\n");
707 flash_write_cmd (info, sector, 0, info->cmd_reset);
715 /*-----------------------------------------------------------------------
717 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
719 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
722 unsigned long long ll;
725 switch (info->portwidth) {
729 case FLASH_CFI_16BIT:
730 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
733 cword->w = (cword->w >> 8) | w;
735 cword->w = (cword->w << 8) | c;
738 case FLASH_CFI_32BIT:
739 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
742 cword->l = (cword->l >> 8) | l;
744 cword->l = (cword->l << 8) | c;
747 case FLASH_CFI_64BIT:
748 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
751 cword->ll = (cword->ll >> 8) | ll;
753 cword->ll = (cword->ll << 8) | c;
759 /* loop through the sectors from the highest address when the passed
760 * address is greater or equal to the sector address we have a match
762 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
766 for (sector = info->sector_count - 1; sector >= 0; sector--) {
767 if (addr >= info->start[sector])
773 /*-----------------------------------------------------------------------
775 static int flash_write_cfiword (flash_info_t * info, ulong dest,
781 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
783 /* Check if Flash is (sufficiently) erased */
784 switch (info->portwidth) {
786 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
788 case FLASH_CFI_16BIT:
789 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
791 case FLASH_CFI_32BIT:
792 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
794 case FLASH_CFI_64BIT:
795 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
802 unmap_physmem(dstaddr, info->portwidth);
803 return ERR_NOT_ERASED;
806 /* Disable interrupts which might cause a timeout here */
807 flag = disable_interrupts ();
809 switch (info->vendor) {
810 case CFI_CMDSET_INTEL_PROG_REGIONS:
811 case CFI_CMDSET_INTEL_EXTENDED:
812 case CFI_CMDSET_INTEL_STANDARD:
813 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
814 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
816 case CFI_CMDSET_AMD_EXTENDED:
817 case CFI_CMDSET_AMD_STANDARD:
818 #ifdef CONFIG_FLASH_CFI_LEGACY
819 case CFI_CMDSET_AMD_LEGACY:
821 flash_unlock_seq (info, 0);
822 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
826 switch (info->portwidth) {
828 flash_write8(cword.c, dstaddr);
830 case FLASH_CFI_16BIT:
831 flash_write16(cword.w, dstaddr);
833 case FLASH_CFI_32BIT:
834 flash_write32(cword.l, dstaddr);
836 case FLASH_CFI_64BIT:
837 flash_write64(cword.ll, dstaddr);
841 /* re-enable interrupts if necessary */
843 enable_interrupts ();
845 unmap_physmem(dstaddr, info->portwidth);
847 return flash_full_status_check (info, find_sector (info, dest),
848 info->write_tout, "write");
851 #ifdef CFG_FLASH_USE_BUFFER_WRITE
853 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
860 void *dst = map_physmem(dest, len, MAP_NOCACHE);
867 switch (info->portwidth) {
871 case FLASH_CFI_16BIT:
874 case FLASH_CFI_32BIT:
877 case FLASH_CFI_64BIT:
887 while ((cnt-- > 0) && (flag == 0)) {
888 switch (info->portwidth) {
890 flag = ((flash_read8(dst2) & flash_read8(src)) ==
894 case FLASH_CFI_16BIT:
895 flag = ((flash_read16(dst2) & flash_read16(src)) ==
899 case FLASH_CFI_32BIT:
900 flag = ((flash_read32(dst2) & flash_read32(src)) ==
904 case FLASH_CFI_64BIT:
905 flag = ((flash_read64(dst2) & flash_read64(src)) ==
912 retcode = ERR_NOT_ERASED;
917 sector = find_sector (info, dest);
919 switch (info->vendor) {
920 case CFI_CMDSET_INTEL_PROG_REGIONS:
921 case CFI_CMDSET_INTEL_STANDARD:
922 case CFI_CMDSET_INTEL_EXTENDED:
923 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
924 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
925 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
926 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
927 flash_write_cmd (info, sector, 0, write_cmd);
928 retcode = flash_status_check (info, sector,
929 info->buffer_write_tout,
931 if (retcode == ERR_OK) {
932 /* reduce the number of loops by the width of
935 flash_write_cmd (info, sector, 0, cnt - 1);
937 switch (info->portwidth) {
939 flash_write8(flash_read8(src), dst);
942 case FLASH_CFI_16BIT:
943 flash_write16(flash_read16(src), dst);
946 case FLASH_CFI_32BIT:
947 flash_write32(flash_read32(src), dst);
950 case FLASH_CFI_64BIT:
951 flash_write64(flash_read64(src), dst);
959 flash_write_cmd (info, sector, 0,
960 FLASH_CMD_WRITE_BUFFER_CONFIRM);
961 retcode = flash_full_status_check (
962 info, sector, info->buffer_write_tout,
968 case CFI_CMDSET_AMD_STANDARD:
969 case CFI_CMDSET_AMD_EXTENDED:
970 flash_unlock_seq(info,0);
972 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
973 offset = ((unsigned long)dst - info->start[sector]) >> shift;
975 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
977 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
979 switch (info->portwidth) {
982 flash_write8(flash_read8(src), dst);
986 case FLASH_CFI_16BIT:
988 flash_write16(flash_read16(src), dst);
992 case FLASH_CFI_32BIT:
994 flash_write32(flash_read32(src), dst);
998 case FLASH_CFI_64BIT:
1000 flash_write64(flash_read64(src), dst);
1005 retcode = ERR_INVAL;
1009 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1010 retcode = flash_full_status_check (info, sector,
1011 info->buffer_write_tout,
1016 debug ("Unknown Command Set\n");
1017 retcode = ERR_INVAL;
1022 unmap_physmem(dst, len);
1025 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1028 /*-----------------------------------------------------------------------
1030 int flash_erase (flash_info_t * info, int s_first, int s_last)
1036 if (info->flash_id != FLASH_MAN_CFI) {
1037 puts ("Can't erase unknown flash type - aborted\n");
1040 if ((s_first < 0) || (s_first > s_last)) {
1041 puts ("- no sectors to erase\n");
1046 for (sect = s_first; sect <= s_last; ++sect) {
1047 if (info->protect[sect]) {
1052 printf ("- Warning: %d protected sectors will not be erased!\n",
1059 for (sect = s_first; sect <= s_last; sect++) {
1060 if (info->protect[sect] == 0) { /* not protected */
1061 switch (info->vendor) {
1062 case CFI_CMDSET_INTEL_PROG_REGIONS:
1063 case CFI_CMDSET_INTEL_STANDARD:
1064 case CFI_CMDSET_INTEL_EXTENDED:
1065 flash_write_cmd (info, sect, 0,
1066 FLASH_CMD_CLEAR_STATUS);
1067 flash_write_cmd (info, sect, 0,
1068 FLASH_CMD_BLOCK_ERASE);
1069 flash_write_cmd (info, sect, 0,
1070 FLASH_CMD_ERASE_CONFIRM);
1072 case CFI_CMDSET_AMD_STANDARD:
1073 case CFI_CMDSET_AMD_EXTENDED:
1074 flash_unlock_seq (info, sect);
1075 flash_write_cmd (info, sect,
1077 AMD_CMD_ERASE_START);
1078 flash_unlock_seq (info, sect);
1079 flash_write_cmd (info, sect, 0,
1080 AMD_CMD_ERASE_SECTOR);
1082 #ifdef CONFIG_FLASH_CFI_LEGACY
1083 case CFI_CMDSET_AMD_LEGACY:
1084 flash_unlock_seq (info, 0);
1085 flash_write_cmd (info, 0, info->addr_unlock1,
1086 AMD_CMD_ERASE_START);
1087 flash_unlock_seq (info, 0);
1088 flash_write_cmd (info, sect, 0,
1089 AMD_CMD_ERASE_SECTOR);
1093 debug ("Unkown flash vendor %d\n",
1098 if (flash_full_status_check
1099 (info, sect, info->erase_blk_tout, "erase")) {
1109 /*-----------------------------------------------------------------------
1111 void flash_print_info (flash_info_t * info)
1115 if (info->flash_id != FLASH_MAN_CFI) {
1116 puts ("missing or unknown FLASH type\n");
1120 printf ("%s FLASH (%d x %d)",
1122 (info->portwidth << 3), (info->chipwidth << 3));
1123 if (info->size < 1024*1024)
1124 printf (" Size: %ld kB in %d Sectors\n",
1125 info->size >> 10, info->sector_count);
1127 printf (" Size: %ld MB in %d Sectors\n",
1128 info->size >> 20, info->sector_count);
1130 switch (info->vendor) {
1131 case CFI_CMDSET_INTEL_PROG_REGIONS:
1132 printf ("Intel Prog Regions");
1134 case CFI_CMDSET_INTEL_STANDARD:
1135 printf ("Intel Standard");
1137 case CFI_CMDSET_INTEL_EXTENDED:
1138 printf ("Intel Extended");
1140 case CFI_CMDSET_AMD_STANDARD:
1141 printf ("AMD Standard");
1143 case CFI_CMDSET_AMD_EXTENDED:
1144 printf ("AMD Extended");
1146 #ifdef CONFIG_FLASH_CFI_LEGACY
1147 case CFI_CMDSET_AMD_LEGACY:
1148 printf ("AMD Legacy");
1152 printf ("Unknown (%d)", info->vendor);
1155 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1156 info->manufacturer_id, info->device_id);
1157 if (info->device_id == 0x7E) {
1158 printf("%04X", info->device_id2);
1160 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1161 info->erase_blk_tout,
1163 if (info->buffer_size > 1) {
1164 printf (" Buffer write timeout: %ld ms, "
1165 "buffer size: %d bytes\n",
1166 info->buffer_write_tout,
1170 puts ("\n Sector Start Addresses:");
1171 for (i = 0; i < info->sector_count; ++i) {
1174 #ifdef CFG_FLASH_EMPTY_INFO
1178 volatile unsigned long *flash;
1181 * Check if whole sector is erased
1183 size = flash_sector_size(info, i);
1185 flash = (volatile unsigned long *) info->start[i];
1186 size = size >> 2; /* divide by 4 for longword access */
1187 for (k = 0; k < size; k++) {
1188 if (*flash++ != 0xffffffff) {
1194 /* print empty and read-only info */
1195 printf (" %08lX %c %s ",
1198 info->protect[i] ? "RO" : " ");
1199 #else /* ! CFG_FLASH_EMPTY_INFO */
1200 printf (" %08lX %s ",
1202 info->protect[i] ? "RO" : " ");
1209 /*-----------------------------------------------------------------------
1210 * This is used in a few places in write_buf() to show programming
1211 * progress. Making it a function is nasty because it needs to do side
1212 * effect updates to digit and dots. Repeated code is nasty too, so
1213 * we define it once here.
1215 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1216 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1218 if ((scale > 0) && (dots <= 0)) { \
1219 if ((digit % 5) == 0) \
1220 printf ("%d", digit / 5); \
1227 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1230 /*-----------------------------------------------------------------------
1231 * Copy memory to flash, returns:
1234 * 2 - Flash not erased
1236 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1243 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1246 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1247 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1252 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1254 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1255 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1256 CONFIG_FLASH_SHOW_PROGRESS);
1260 /* get lower aligned address */
1261 wp = (addr & ~(info->portwidth - 1));
1263 /* handle unaligned start */
1264 if ((aln = addr - wp) != 0) {
1266 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1267 for (i = 0; i < aln; ++i)
1268 flash_add_byte (info, &cword, flash_read8(p + i));
1270 for (; (i < info->portwidth) && (cnt > 0); i++) {
1271 flash_add_byte (info, &cword, *src++);
1274 for (; (cnt == 0) && (i < info->portwidth); ++i)
1275 flash_add_byte (info, &cword, flash_read8(p + i));
1277 rc = flash_write_cfiword (info, wp, cword);
1278 unmap_physmem(p, info->portwidth);
1283 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1286 /* handle the aligned part */
1287 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1288 buffered_size = (info->portwidth / info->chipwidth);
1289 buffered_size *= info->buffer_size;
1290 while (cnt >= info->portwidth) {
1291 /* prohibit buffer write when buffer_size is 1 */
1292 if (info->buffer_size == 1) {
1294 for (i = 0; i < info->portwidth; i++)
1295 flash_add_byte (info, &cword, *src++);
1296 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1298 wp += info->portwidth;
1299 cnt -= info->portwidth;
1303 /* write buffer until next buffered_size aligned boundary */
1304 i = buffered_size - (wp % buffered_size);
1307 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1309 i -= i & (info->portwidth - 1);
1313 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1316 while (cnt >= info->portwidth) {
1318 for (i = 0; i < info->portwidth; i++) {
1319 flash_add_byte (info, &cword, *src++);
1321 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1323 wp += info->portwidth;
1324 cnt -= info->portwidth;
1325 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1327 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1334 * handle unaligned tail bytes
1337 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1338 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1339 flash_add_byte (info, &cword, *src++);
1342 for (; i < info->portwidth; ++i)
1343 flash_add_byte (info, &cword, flash_read8(p + i));
1344 unmap_physmem(p, info->portwidth);
1346 return flash_write_cfiword (info, wp, cword);
1349 /*-----------------------------------------------------------------------
1351 #ifdef CFG_FLASH_PROTECTION
1353 int flash_real_protect (flash_info_t * info, long sector, int prot)
1357 switch (info->vendor) {
1358 case CFI_CMDSET_INTEL_PROG_REGIONS:
1359 case CFI_CMDSET_INTEL_STANDARD:
1360 flash_write_cmd (info, sector, 0,
1361 FLASH_CMD_CLEAR_STATUS);
1362 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1364 flash_write_cmd (info, sector, 0,
1365 FLASH_CMD_PROTECT_SET);
1367 flash_write_cmd (info, sector, 0,
1368 FLASH_CMD_PROTECT_CLEAR);
1370 case CFI_CMDSET_AMD_EXTENDED:
1371 case CFI_CMDSET_AMD_STANDARD:
1372 #ifdef CONFIG_FLASH_CFI_LEGACY
1373 case CFI_CMDSET_AMD_LEGACY:
1375 /* U-Boot only checks the first byte */
1376 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1378 flash_unlock_seq (info, 0);
1379 flash_write_cmd (info, 0,
1381 ATM_CMD_SOFTLOCK_START);
1382 flash_unlock_seq (info, 0);
1383 flash_write_cmd (info, sector, 0,
1386 flash_write_cmd (info, 0,
1388 AMD_CMD_UNLOCK_START);
1389 if (info->device_id == ATM_ID_BV6416)
1390 flash_write_cmd (info, sector,
1391 0, ATM_CMD_UNLOCK_SECT);
1398 flash_full_status_check (info, sector, info->erase_blk_tout,
1399 prot ? "protect" : "unprotect")) == 0) {
1401 info->protect[sector] = prot;
1404 * On some of Intel's flash chips (marked via legacy_unlock)
1405 * unprotect unprotects all locking.
1407 if ((prot == 0) && (info->legacy_unlock)) {
1410 for (i = 0; i < info->sector_count; i++) {
1411 if (info->protect[i])
1412 flash_real_protect (info, i, 1);
1419 /*-----------------------------------------------------------------------
1420 * flash_read_user_serial - read the OneTimeProgramming cells
1422 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1429 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1430 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1431 memcpy (dst, src + offset, len);
1432 flash_write_cmd (info, 0, 0, info->cmd_reset);
1433 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1437 * flash_read_factory_serial - read the device Id from the protection area
1439 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1444 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1445 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1446 memcpy (buffer, src + offset, len);
1447 flash_write_cmd (info, 0, 0, info->cmd_reset);
1448 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1451 #endif /* CFG_FLASH_PROTECTION */
1453 /*-----------------------------------------------------------------------
1454 * Reverse the order of the erase regions in the CFI QRY structure.
1455 * This is needed for chips that are either a) correctly detected as
1456 * top-boot, or b) buggy.
1458 static void cfi_reverse_geometry(struct cfi_qry *qry)
1463 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1464 tmp = qry->erase_region_info[i];
1465 qry->erase_region_info[i] = qry->erase_region_info[j];
1466 qry->erase_region_info[j] = tmp;
1470 /*-----------------------------------------------------------------------
1471 * read jedec ids from device and set corresponding fields in info struct
1473 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1476 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1478 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1479 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1480 udelay(1000); /* some flash are slow to respond */
1481 info->manufacturer_id = flash_read_uchar (info,
1482 FLASH_OFFSET_MANUFACTURER_ID);
1483 info->device_id = flash_read_uchar (info,
1484 FLASH_OFFSET_DEVICE_ID);
1485 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1488 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1490 info->cmd_reset = FLASH_CMD_RESET;
1492 cmdset_intel_read_jedec_ids(info);
1493 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1495 #ifdef CFG_FLASH_PROTECTION
1496 /* read legacy lock/unlock bit from intel flash */
1497 if (info->ext_addr) {
1498 info->legacy_unlock = flash_read_uchar (info,
1499 info->ext_addr + 5) & 0x08;
1506 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1508 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1509 flash_unlock_seq(info, 0);
1510 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
1513 info->manufacturer_id = flash_read_uchar (info,
1514 FLASH_OFFSET_MANUFACTURER_ID);
1516 switch (info->chipwidth){
1517 case FLASH_CFI_8BIT:
1518 info->device_id = flash_read_uchar (info,
1519 FLASH_OFFSET_DEVICE_ID);
1520 if (info->device_id == 0x7E) {
1521 /* AMD 3-byte (expanded) device ids */
1522 info->device_id2 = flash_read_uchar (info,
1523 FLASH_OFFSET_DEVICE_ID2);
1524 info->device_id2 <<= 8;
1525 info->device_id2 |= flash_read_uchar (info,
1526 FLASH_OFFSET_DEVICE_ID3);
1529 case FLASH_CFI_16BIT:
1530 info->device_id = flash_read_word (info,
1531 FLASH_OFFSET_DEVICE_ID);
1536 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1539 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1541 info->cmd_reset = AMD_CMD_RESET;
1543 cmdset_amd_read_jedec_ids(info);
1544 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1549 #ifdef CONFIG_FLASH_CFI_LEGACY
1550 static void flash_read_jedec_ids (flash_info_t * info)
1552 info->manufacturer_id = 0;
1553 info->device_id = 0;
1554 info->device_id2 = 0;
1556 switch (info->vendor) {
1557 case CFI_CMDSET_INTEL_PROG_REGIONS:
1558 case CFI_CMDSET_INTEL_STANDARD:
1559 case CFI_CMDSET_INTEL_EXTENDED:
1560 cmdset_intel_read_jedec_ids(info);
1562 case CFI_CMDSET_AMD_STANDARD:
1563 case CFI_CMDSET_AMD_EXTENDED:
1564 cmdset_amd_read_jedec_ids(info);
1571 /*-----------------------------------------------------------------------
1572 * Call board code to request info about non-CFI flash.
1573 * board_flash_get_legacy needs to fill in at least:
1574 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1576 static int flash_detect_legacy(ulong base, int banknum)
1578 flash_info_t *info = &flash_info[banknum];
1580 if (board_flash_get_legacy(base, banknum, info)) {
1581 /* board code may have filled info completely. If not, we
1582 use JEDEC ID probing. */
1583 if (!info->vendor) {
1585 CFI_CMDSET_AMD_STANDARD,
1586 CFI_CMDSET_INTEL_STANDARD
1590 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1591 info->vendor = modes[i];
1592 info->start[0] = base;
1593 if (info->portwidth == FLASH_CFI_8BIT
1594 && info->interface == FLASH_CFI_X8X16) {
1595 info->addr_unlock1 = 0x2AAA;
1596 info->addr_unlock2 = 0x5555;
1598 info->addr_unlock1 = 0x5555;
1599 info->addr_unlock2 = 0x2AAA;
1601 flash_read_jedec_ids(info);
1602 debug("JEDEC PROBE: ID %x %x %x\n",
1603 info->manufacturer_id,
1606 if (jedec_flash_match(info, base))
1611 switch(info->vendor) {
1612 case CFI_CMDSET_INTEL_PROG_REGIONS:
1613 case CFI_CMDSET_INTEL_STANDARD:
1614 case CFI_CMDSET_INTEL_EXTENDED:
1615 info->cmd_reset = FLASH_CMD_RESET;
1617 case CFI_CMDSET_AMD_STANDARD:
1618 case CFI_CMDSET_AMD_EXTENDED:
1619 case CFI_CMDSET_AMD_LEGACY:
1620 info->cmd_reset = AMD_CMD_RESET;
1623 info->flash_id = FLASH_MAN_CFI;
1626 return 0; /* use CFI */
1629 static inline int flash_detect_legacy(ulong base, int banknum)
1631 return 0; /* use CFI */
1635 /*-----------------------------------------------------------------------
1636 * detect if flash is compatible with the Common Flash Interface (CFI)
1637 * http://www.jedec.org/download/search/jesd68.pdf
1639 static void flash_read_cfi (flash_info_t *info, void *buf,
1640 unsigned int start, size_t len)
1645 for (i = 0; i < len; i++)
1646 p[i] = flash_read_uchar(info, start + i);
1649 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1653 /* We do not yet know what kind of commandset to use, so we issue
1654 the reset command in both Intel and AMD variants, in the hope
1655 that AMD flash roms ignore the Intel command. */
1656 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1657 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1660 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1662 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1664 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1665 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1666 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1667 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1668 sizeof(struct cfi_qry));
1669 info->interface = le16_to_cpu(qry->interface_desc);
1671 info->cfi_offset = flash_offset_cfi[cfi_offset];
1672 debug ("device interface is %d\n",
1674 debug ("found port %d chip %d ",
1675 info->portwidth, info->chipwidth);
1676 debug ("port %d bits chip %d bits\n",
1677 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1678 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1680 /* calculate command offsets as in the Linux driver */
1681 info->addr_unlock1 = 0x555;
1682 info->addr_unlock2 = 0x2aa;
1685 * modify the unlock address if we are
1686 * in compatibility mode
1688 if ( /* x8/x16 in x8 mode */
1689 ((info->chipwidth == FLASH_CFI_BY8) &&
1690 (info->interface == FLASH_CFI_X8X16)) ||
1691 /* x16/x32 in x16 mode */
1692 ((info->chipwidth == FLASH_CFI_BY16) &&
1693 (info->interface == FLASH_CFI_X16X32)))
1695 info->addr_unlock1 = 0xaaa;
1696 info->addr_unlock2 = 0x555;
1699 info->name = "CFI conformant";
1707 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1709 debug ("flash detect cfi\n");
1711 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1712 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1713 for (info->chipwidth = FLASH_CFI_BY8;
1714 info->chipwidth <= info->portwidth;
1715 info->chipwidth <<= 1)
1716 if (__flash_detect_cfi(info, qry))
1719 debug ("not found\n");
1724 * Manufacturer-specific quirks. Add workarounds for geometry
1725 * reversal, etc. here.
1727 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1729 /* check if flash geometry needs reversal */
1730 if (qry->num_erase_regions > 1) {
1731 /* reverse geometry if top boot part */
1732 if (info->cfi_version < 0x3131) {
1733 /* CFI < 1.1, try to guess from device id */
1734 if ((info->device_id & 0x80) != 0)
1735 cfi_reverse_geometry(qry);
1736 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1737 /* CFI >= 1.1, deduct from top/bottom flag */
1738 /* note: ext_addr is valid since cfi_version > 0 */
1739 cfi_reverse_geometry(qry);
1744 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1746 int reverse_geometry = 0;
1748 /* Check the "top boot" bit in the PRI */
1749 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1750 reverse_geometry = 1;
1752 /* AT49BV6416(T) list the erase regions in the wrong order.
1753 * However, the device ID is identical with the non-broken
1754 * AT49BV642D since u-boot only reads the low byte (they
1755 * differ in the high byte.) So leave out this fixup for now.
1758 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1759 reverse_geometry = !reverse_geometry;
1762 if (reverse_geometry)
1763 cfi_reverse_geometry(qry);
1767 * The following code cannot be run from FLASH!
1770 ulong flash_get_size (ulong base, int banknum)
1772 flash_info_t *info = &flash_info[banknum];
1774 flash_sect_t sect_cnt;
1775 unsigned long sector;
1778 uchar num_erase_regions;
1779 int erase_region_size;
1780 int erase_region_count;
1783 memset(&qry, 0, sizeof(qry));
1786 info->cfi_version = 0;
1787 #ifdef CFG_FLASH_PROTECTION
1788 info->legacy_unlock = 0;
1791 info->start[0] = base;
1793 if (flash_detect_cfi (info, &qry)) {
1794 info->vendor = le16_to_cpu(qry.p_id);
1795 info->ext_addr = le16_to_cpu(qry.p_adr);
1796 num_erase_regions = qry.num_erase_regions;
1798 if (info->ext_addr) {
1799 info->cfi_version = (ushort) flash_read_uchar (info,
1800 info->ext_addr + 3) << 8;
1801 info->cfi_version |= (ushort) flash_read_uchar (info,
1802 info->ext_addr + 4);
1806 flash_printqry (&qry);
1809 switch (info->vendor) {
1810 case CFI_CMDSET_INTEL_PROG_REGIONS:
1811 case CFI_CMDSET_INTEL_STANDARD:
1812 case CFI_CMDSET_INTEL_EXTENDED:
1813 cmdset_intel_init(info, &qry);
1815 case CFI_CMDSET_AMD_STANDARD:
1816 case CFI_CMDSET_AMD_EXTENDED:
1817 cmdset_amd_init(info, &qry);
1820 printf("CFI: Unknown command set 0x%x\n",
1823 * Unfortunately, this means we don't know how
1824 * to get the chip back to Read mode. Might
1825 * as well try an Intel-style reset...
1827 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1831 /* Do manufacturer-specific fixups */
1832 switch (info->manufacturer_id) {
1834 flash_fixup_amd(info, &qry);
1837 flash_fixup_atmel(info, &qry);
1841 debug ("manufacturer is %d\n", info->vendor);
1842 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1843 debug ("device id is 0x%x\n", info->device_id);
1844 debug ("device id2 is 0x%x\n", info->device_id2);
1845 debug ("cfi version is 0x%04x\n", info->cfi_version);
1847 size_ratio = info->portwidth / info->chipwidth;
1848 /* if the chip is x8/x16 reduce the ratio by half */
1849 if ((info->interface == FLASH_CFI_X8X16)
1850 && (info->chipwidth == FLASH_CFI_BY8)) {
1853 debug ("size_ratio %d port %d bits chip %d bits\n",
1854 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1855 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1856 debug ("found %d erase regions\n", num_erase_regions);
1859 for (i = 0; i < num_erase_regions; i++) {
1860 if (i > NUM_ERASE_REGIONS) {
1861 printf ("%d erase regions found, only %d used\n",
1862 num_erase_regions, NUM_ERASE_REGIONS);
1866 tmp = le32_to_cpu(qry.erase_region_info[i]);
1867 debug("erase region %u: 0x%08lx\n", i, tmp);
1869 erase_region_count = (tmp & 0xffff) + 1;
1872 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1873 debug ("erase_region_count = %d erase_region_size = %d\n",
1874 erase_region_count, erase_region_size);
1875 for (j = 0; j < erase_region_count; j++) {
1876 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1877 printf("ERROR: too many flash sectors\n");
1880 info->start[sect_cnt] = sector;
1881 sector += (erase_region_size * size_ratio);
1884 * Only read protection status from
1885 * supported devices (intel...)
1887 switch (info->vendor) {
1888 case CFI_CMDSET_INTEL_PROG_REGIONS:
1889 case CFI_CMDSET_INTEL_EXTENDED:
1890 case CFI_CMDSET_INTEL_STANDARD:
1891 info->protect[sect_cnt] =
1892 flash_isset (info, sect_cnt,
1893 FLASH_OFFSET_PROTECT,
1894 FLASH_STATUS_PROTECT);
1897 /* default: not protected */
1898 info->protect[sect_cnt] = 0;
1905 info->sector_count = sect_cnt;
1906 info->size = 1 << qry.dev_size;
1907 /* multiply the size by the number of chips */
1908 info->size *= size_ratio;
1909 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1910 tmp = 1 << qry.block_erase_timeout_typ;
1911 info->erase_blk_tout = tmp *
1912 (1 << qry.block_erase_timeout_max);
1913 tmp = (1 << qry.buf_write_timeout_typ) *
1914 (1 << qry.buf_write_timeout_max);
1916 /* round up when converting to ms */
1917 info->buffer_write_tout = (tmp + 999) / 1000;
1918 tmp = (1 << qry.word_write_timeout_typ) *
1919 (1 << qry.word_write_timeout_max);
1920 /* round up when converting to ms */
1921 info->write_tout = (tmp + 999) / 1000;
1922 info->flash_id = FLASH_MAN_CFI;
1923 if ((info->interface == FLASH_CFI_X8X16) &&
1924 (info->chipwidth == FLASH_CFI_BY8)) {
1925 /* XXX - Need to test on x8/x16 in parallel. */
1926 info->portwidth >>= 1;
1930 flash_write_cmd (info, 0, 0, info->cmd_reset);
1931 return (info->size);
1934 /*-----------------------------------------------------------------------
1936 unsigned long flash_init (void)
1938 unsigned long size = 0;
1940 #if defined(CFG_FLASH_AUTOPROTECT_LIST)
1944 } apl[] = CFG_FLASH_AUTOPROTECT_LIST;
1947 #ifdef CFG_FLASH_PROTECTION
1948 char *s = getenv("unlock");
1951 #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CFG_FLASH_BANKS_LIST)[i])
1953 /* Init: no FLASHes known */
1954 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1955 flash_info[i].flash_id = FLASH_UNKNOWN;
1957 if (!flash_detect_legacy (BANK_BASE(i), i))
1958 flash_get_size (BANK_BASE(i), i);
1959 size += flash_info[i].size;
1960 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1961 #ifndef CFG_FLASH_QUIET_TEST
1962 printf ("## Unknown FLASH on Bank %d "
1963 "- Size = 0x%08lx = %ld MB\n",
1964 i+1, flash_info[i].size,
1965 flash_info[i].size << 20);
1966 #endif /* CFG_FLASH_QUIET_TEST */
1968 #ifdef CFG_FLASH_PROTECTION
1969 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1971 * Only the U-Boot image and it's environment
1972 * is protected, all other sectors are
1973 * unprotected (unlocked) if flash hardware
1974 * protection is used (CFG_FLASH_PROTECTION)
1975 * and the environment variable "unlock" is
1978 if (flash_info[i].legacy_unlock) {
1982 * Disable legacy_unlock temporarily,
1983 * since flash_real_protect would
1984 * relock all other sectors again
1987 flash_info[i].legacy_unlock = 0;
1990 * Legacy unlocking (e.g. Intel J3) ->
1991 * unlock only one sector. This will
1992 * unlock all sectors.
1994 flash_real_protect (&flash_info[i], 0, 0);
1996 flash_info[i].legacy_unlock = 1;
1999 * Manually mark other sectors as
2000 * unlocked (unprotected)
2002 for (k = 1; k < flash_info[i].sector_count; k++)
2003 flash_info[i].protect[k] = 0;
2006 * No legancy unlocking -> unlock all sectors
2008 flash_protect (FLAG_PROTECT_CLEAR,
2009 flash_info[i].start[0],
2010 flash_info[i].start[0]
2011 + flash_info[i].size - 1,
2015 #endif /* CFG_FLASH_PROTECTION */
2018 /* Monitor protection ON by default */
2019 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
2020 flash_protect (FLAG_PROTECT_SET,
2022 CFG_MONITOR_BASE + monitor_flash_len - 1,
2023 flash_get_info(CFG_MONITOR_BASE));
2026 /* Environment protection ON by default */
2027 #ifdef CFG_ENV_IS_IN_FLASH
2028 flash_protect (FLAG_PROTECT_SET,
2030 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
2031 flash_get_info(CFG_ENV_ADDR));
2034 /* Redundant environment protection ON by default */
2035 #ifdef CFG_ENV_ADDR_REDUND
2036 flash_protect (FLAG_PROTECT_SET,
2037 CFG_ENV_ADDR_REDUND,
2038 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
2039 flash_get_info(CFG_ENV_ADDR_REDUND));
2042 #if defined(CFG_FLASH_AUTOPROTECT_LIST)
2043 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2044 debug("autoprotecting from %08x to %08x\n",
2045 apl[i].start, apl[i].start + apl[i].size - 1);
2046 flash_protect (FLAG_PROTECT_SET,
2048 apl[i].start + apl[i].size - 1,
2049 flash_get_info(apl[i].start));