7 #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
11 #if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
15 #if defined(CONFIG_8xx) && defined(CONFIG_PCMCIA)
17 #if defined(CONFIG_IDE_8xx_PCCARD)
18 extern int check_ide_device (int slot);
21 extern int pcmcia_hardware_enable (int slot);
22 extern int pcmcia_voltage_set(int slot, int vcc, int vpp);
24 #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
25 extern int pcmcia_hardware_disable(int slot);
28 static u_int m8xx_get_graycode(u_int size);
30 static u_int m8xx_get_speed(u_int ns, u_int is_io);
33 /* look up table for pgcrx registers */
34 u_int *pcmcia_pgcrx[2] = {
35 &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
36 &((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
40 * Search this table to see if the windowsize is
44 #define M8XX_SIZES_NO 32
46 static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
47 { 0x00000001, 0x00000002, 0x00000008, 0x00000004,
48 0x00000080, 0x00000040, 0x00000010, 0x00000020,
49 0x00008000, 0x00004000, 0x00001000, 0x00002000,
50 0x00000100, 0x00000200, 0x00000800, 0x00000400,
52 0x0fffffff, 0xffffffff, 0xffffffff, 0xffffffff,
53 0x01000000, 0x02000000, 0xffffffff, 0x04000000,
54 0x00010000, 0x00020000, 0x00080000, 0x00040000,
55 0x00800000, 0x00400000, 0x00100000, 0x00200000 };
58 /* -------------------------------------------------------------------- */
61 #define HMI10_FRAM_TIMING ( PCMCIA_SHT(2) \
66 #if defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
67 #define CFG_PCMCIA_TIMING ( PCMCIA_SHT(9) \
71 #define CFG_PCMCIA_TIMING ( PCMCIA_SHT(2) \
76 /* -------------------------------------------------------------------- */
86 debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
88 /* intialize the fixed memory windows */
89 win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
90 base = CFG_PCMCIA_MEM_ADDR;
92 if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
93 printf ("Cannot set window size to 0x%08x\n",
98 slotbit = PCMCIA_SLOT_x;
99 for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
102 #if (PCMCIA_SOCKETS_NO == 2)
103 if (i == 4) /* Another slot starting from win 4 */
104 slotbit = (slotbit ? PCMCIA_PSLOT_A : PCMCIA_PSLOT_B);
107 #ifdef CONFIG_IDE_8xx_PCCARD
110 { /* map FRAM area */
111 win->or = ( PCMCIA_BSIZE_256K
116 | HMI10_FRAM_TIMING );
120 case 0: { /* map attribute memory */
121 win->or = ( PCMCIA_BSIZE_64M
126 | CFG_PCMCIA_TIMING );
130 case 1: { /* map I/O window for data reg */
131 win->or = ( PCMCIA_BSIZE_1K
136 | CFG_PCMCIA_TIMING );
140 case 2: { /* map I/O window for cmd/ctrl reg block */
141 win->or = ( PCMCIA_BSIZE_1K
146 | CFG_PCMCIA_TIMING );
149 #endif /* CONFIG_IDE_8xx_PCCARD */
151 case 3: { /* map I/O window for 4xUART data/ctrl */
153 win->or = ( PCMCIA_BSIZE_256K
158 | CFG_PCMCIA_TIMING );
161 #endif /* CONFIG_HMI10 */
162 default: /* set to not valid */
167 debug ("MemWin %d: PBR 0x%08lX POR %08lX\n",
168 i, win->br, win->or);
169 base += CFG_PCMCIA_MEM_SIZE;
173 for (i=0, rc=0, slot=_slot_; i<PCMCIA_SOCKETS_NO; i++, slot = !slot) {
174 /* turn off voltage */
175 if ((rc = pcmcia_voltage_set(slot, 0, 0)))
178 /* Enable external hardware */
179 if ((rc = pcmcia_hardware_enable(slot)))
182 #ifdef CONFIG_IDE_8xx_PCCARD
183 if ((rc = check_ide_device(i)))
190 #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
191 int pcmcia_off (void)
196 printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
198 /* clear interrupt state, and disable interrupts */
199 ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr = PCMCIA_MASK(_slot_);
200 ((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
202 /* turn off interrupt and disable CxOE */
203 PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
205 /* turn off memory windows */
206 win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
208 for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
209 /* disable memory window */
214 /* turn off voltage */
215 pcmcia_voltage_set(_slot_, 0, 0);
217 /* disable external hardware */
218 printf ("Shutdown and Poweroff " PCMCIA_SLOT_MSG "\n");
219 pcmcia_hardware_disable(_slot_);
222 #endif /* CFG_CMD_PCMCIA */
225 static u_int m8xx_get_graycode(u_int size)
229 for (k = 0; k < M8XX_SIZES_NO; k++) {
230 if(m8xx_size_to_gray[k] == size)
234 if((k == M8XX_SIZES_NO) || (m8xx_size_to_gray[k] == -1))
242 #if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
244 /* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
245 * SYPCR is write once only, therefore must the slowest memory be faster
246 * than the bus monitor or we will get a machine check due to the bus timeout.
248 #undef PCMCIA_BMT_LIMIT
249 #define PCMCIA_BMT_LIMIT (6*8)
252 static u_int m8xx_get_speed(u_int ns, u_int is_io)
254 u_int reg, clocks, psst, psl, psht;
259 * We get called with IO maps setup to 0ns
260 * if not specified by the user.
261 * They should be 255ns.
267 ns = 100; /* fast memory if 0 */
271 * In PSST, PSL, PSHT fields we tell the controller
272 * timing parameters in CLKOUT clock cycles.
273 * CLKOUT is the same as GCLK2_50.
276 /* how we want to adjust the timing - in percent */
278 #define ADJ 180 /* 80 % longer accesstime - to be sure */
280 clocks = ((M8XX_BUSFREQ / 1000) * ns) / 1000;
281 clocks = (clocks * ADJ) / (100*1000);
283 if(clocks >= PCMCIA_BMT_LIMIT) {
284 DEBUG(0, "Max access time limit reached\n");
285 clocks = PCMCIA_BMT_LIMIT-1;
288 psst = clocks / 7; /* setup time */
289 psht = clocks / 7; /* hold time */
290 psl = (clocks * 5) / 7; /* strobe length */
292 psst += clocks - (psst + psht + psl);
302 #endif /* CONFIG_8xx && CONFIG_PCMCIA */