drivers/mmc/rockchip_dw_mmc.c

   1 /*
   2  * Copyright (c) 2013 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <dt-structs.h>
  11 #include <dwmmc.h>
  12 #include <errno.h>
  13 #include <mapmem.h>
  14 #include <pwrseq.h>
  15 #include <syscon.h>
  16 #include <asm/gpio.h>
  17 #include <asm/arch/clock.h>
  18 #include <asm/arch/periph.h>
  19 #include <linux/err.h>
  20
  21 DECLARE_GLOBAL_DATA_PTR;
  22
  23 struct rockchip_mmc_plat {
  24 #if CONFIG_IS_ENABLED(OF_PLATDATA)
  25         struct dtd_rockchip_rk3288_dw_mshc dtplat;
  26 #endif
  27         struct mmc_config cfg;
  28         struct mmc mmc;
  29 };
  30
  31 struct rockchip_dwmmc_priv {
  32         struct clk clk;
  33         struct dwmci_host host;
  34         int fifo_depth;
  35         bool fifo_mode;
  36         u32 minmax[2];
  37 };
  38
  39 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  40 {
  41         struct udevice *dev = host->priv;
  42         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  43         int ret;
  44
  45         ret = clk_set_rate(&priv->clk, freq);
  46         if (ret < 0) {
  47                 printf("%s: err=%d\n", __func__, ret);
  48                 return ret;
  49         }
  50
  51         return freq;
  52 }
  53
  54 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  55 {
  56 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  57         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  58         struct dwmci_host *host = &priv->host;
  59
  60         host->name = dev->name;
  61         host->ioaddr = (void *)devfdt_get_addr(dev);
  62         host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
  63         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  64         host->priv = dev;
  65
  66         /* use non-removeable as sdcard and emmc as judgement */
  67         if (dev_read_bool(dev, "non-removable"))
  68                 host->dev_index = 0;
  69         else
  70                 host->dev_index = 1;
  71
  72         priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
  73
  74         if (priv->fifo_depth < 0)
  75                 return -EINVAL;
  76         priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
  77
  78         /*
  79          * 'clock-freq-min-max' is deprecated
  80          * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
  81          */
  82         if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
  83                 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
  84
  85                 if (val < 0)
  86                         return val;
  87
  88                 priv->minmax[0] = 400000;  /* 400 kHz */
  89                 priv->minmax[1] = val;
  90         } else {
  91                 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
  92                       __func__);
  93         }
  94 #endif
  95         return 0;
  96 }
  97
  98 static int rockchip_dwmmc_probe(struct udevice *dev)
  99 {
 100         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 101         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 102         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
 103         struct dwmci_host *host = &priv->host;
 104         struct udevice *pwr_dev __maybe_unused;
 105         int ret;
 106
 107 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 108         struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
 109
 110         host->name = dev->name;
 111         host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 112         host->buswidth = dtplat->bus_width;
 113         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
 114         host->priv = dev;
 115         host->dev_index = 0;
 116         priv->fifo_depth = dtplat->fifo_depth;
 117         priv->fifo_mode = 0;
 118         memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
 119
 120         ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
 121         if (ret < 0)
 122                 return ret;
 123 #else
 124         ret = clk_get_by_name(dev, "ciu", &priv->clk);
 125         if (ret < 0)
 126                 return ret;
 127 #endif
 128         host->fifoth_val = MSIZE(0x2) |
 129                 RX_WMARK(priv->fifo_depth / 2 - 1) |
 130                 TX_WMARK(priv->fifo_depth / 2);
 131
 132         host->fifo_mode = priv->fifo_mode;
 133
 134 #ifdef CONFIG_PWRSEQ
 135         /* Enable power if needed */
 136         ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
 137                                            &pwr_dev);
 138         if (!ret) {
 139                 ret = pwrseq_set_power(pwr_dev, true);
 140                 if (ret)
 141                         return ret;
 142         }
 143 #endif
 144         dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
 145         host->mmc = &plat->mmc;
 146         host->mmc->priv = &priv->host;
 147         host->mmc->dev = dev;
 148         upriv->mmc = host->mmc;
 149
 150         return dwmci_probe(dev);
 151 }
 152
 153 static int rockchip_dwmmc_bind(struct udevice *dev)
 154 {
 155         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 156
 157         return dwmci_bind(dev, &plat->mmc, &plat->cfg);
 158 }
 159
 160 static const struct udevice_id rockchip_dwmmc_ids[] = {
 161         { .compatible = "rockchip,rk3288-dw-mshc" },
 162         { }
 163 };
 164
 165 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
 166         .name           = "rockchip_rk3288_dw_mshc",
 167         .id             = UCLASS_MMC,
 168         .of_match       = rockchip_dwmmc_ids,
 169         .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
 170         .ops            = &dm_dwmci_ops,
 171         .bind           = rockchip_dwmmc_bind,
 172         .probe          = rockchip_dwmmc_probe,
 173         .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
 174         .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
 175 };
 176
 177 #ifdef CONFIG_PWRSEQ
 178 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
 179 {
 180         struct gpio_desc reset;
 181         int ret;
 182
 183         ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
 184         if (ret)
 185                 return ret;
 186         dm_gpio_set_value(&reset, 1);
 187         udelay(1);
 188         dm_gpio_set_value(&reset, 0);
 189         udelay(200);
 190
 191         return 0;
 192 }
 193
 194 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
 195         .set_power      = rockchip_dwmmc_pwrseq_set_power,
 196 };
 197
 198 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
 199         { .compatible = "mmc-pwrseq-emmc" },
 200         { }
 201 };
 202
 203 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
 204         .name           = "mmc_pwrseq_emmc",
 205         .id             = UCLASS_PWRSEQ,
 206         .of_match       = rockchip_dwmmc_pwrseq_ids,
 207         .ops            = &rockchip_dwmmc_pwrseq_ops,
 208 };
 209 #endif