2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/clock.h>
16 #include <asm/arch/periph.h>
17 #include <linux/err.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 struct rockchip_mmc_plat {
22 struct mmc_config cfg;
26 struct rockchip_dwmmc_priv {
28 struct dwmci_host host;
31 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
33 struct udevice *dev = host->priv;
34 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
37 ret = clk_set_rate(&priv->clk, freq);
39 debug("%s: err=%d\n", __func__, ret);
46 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
48 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
49 struct dwmci_host *host = &priv->host;
51 host->name = dev->name;
52 host->ioaddr = (void *)dev_get_addr(dev);
53 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
55 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
58 /* use non-removeable as sdcard and emmc as judgement */
59 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
67 static int rockchip_dwmmc_probe(struct udevice *dev)
69 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
70 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
71 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
72 struct dwmci_host *host = &priv->host;
73 struct udevice *pwr_dev __maybe_unused;
78 ret = clk_get_by_index(dev, 0, &priv->clk);
82 if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
83 "clock-freq-min-max", minmax, 2))
86 fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
91 host->fifoth_val = MSIZE(0x2) |
92 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
94 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
95 host->fifo_mode = true;
98 /* Enable power if needed */
99 ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
102 ret = pwrseq_set_power(pwr_dev, true);
107 dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
108 minmax[1], minmax[0]);
109 host->mmc = &plat->mmc;
110 host->mmc->priv = &priv->host;
111 host->mmc->dev = dev;
112 upriv->mmc = host->mmc;
114 return dwmci_probe(dev);
117 static int rockchip_dwmmc_bind(struct udevice *dev)
119 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
122 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
129 static const struct udevice_id rockchip_dwmmc_ids[] = {
130 { .compatible = "rockchip,rk3288-dw-mshc" },
134 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
135 .name = "rockchip_dwmmc",
137 .of_match = rockchip_dwmmc_ids,
138 .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
139 .ops = &dm_dwmci_ops,
140 .bind = rockchip_dwmmc_bind,
141 .probe = rockchip_dwmmc_probe,
142 .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
143 .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
147 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
149 struct gpio_desc reset;
152 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
155 dm_gpio_set_value(&reset, 1);
157 dm_gpio_set_value(&reset, 0);
163 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
164 .set_power = rockchip_dwmmc_pwrseq_set_power,
167 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
168 { .compatible = "mmc-pwrseq-emmc" },
172 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
173 .name = "mmc_pwrseq_emmc",
175 .of_match = rockchip_dwmmc_pwrseq_ids,
176 .ops = &rockchip_dwmmc_pwrseq_ops,