3 * Texas Instruments, <www.ti.com>
4 * Syed Mohammed Khasim <khasim@ti.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation's version 2 of
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/arch/mmc.h>
35 const unsigned short mmc_transspeed_val[15][4] = {
36 {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
37 {CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)},
38 {CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)},
39 {CLKD(15, 1), CLKD(15, 10), CLKD(15, 100), CLKD(15, 1000)},
40 {CLKD(20, 1), CLKD(20, 10), CLKD(20, 100), CLKD(20, 1000)},
41 {CLKD(26, 1), CLKD(26, 10), CLKD(26, 100), CLKD(26, 1000)},
42 {CLKD(30, 1), CLKD(30, 10), CLKD(30, 100), CLKD(30, 1000)},
43 {CLKD(35, 1), CLKD(35, 10), CLKD(35, 100), CLKD(35, 1000)},
44 {CLKD(40, 1), CLKD(40, 10), CLKD(40, 100), CLKD(40, 1000)},
45 {CLKD(45, 1), CLKD(45, 10), CLKD(45, 100), CLKD(45, 1000)},
46 {CLKD(52, 1), CLKD(52, 10), CLKD(52, 100), CLKD(52, 1000)},
47 {CLKD(55, 1), CLKD(55, 10), CLKD(55, 100), CLKD(55, 1000)},
48 {CLKD(60, 1), CLKD(60, 10), CLKD(60, 100), CLKD(60, 1000)},
49 {CLKD(70, 1), CLKD(70, 10), CLKD(70, 100), CLKD(70, 1000)},
50 {CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)}
53 mmc_card_data cur_card_data;
54 static block_dev_desc_t mmc_blk_dev;
55 static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
57 unsigned char mmc_set_dev(int dev)
61 mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
64 mmc_base = (hsmmc_t *)OMAP_HSMMC2_BASE;
67 mmc_base = (hsmmc_t *)OMAP_HSMMC3_BASE;
70 mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
77 block_dev_desc_t *mmc_get_dev(int dev)
79 return (block_dev_desc_t *) &mmc_blk_dev;
82 unsigned char mmc_board_init(void)
84 t2_t *t2_base = (t2_t *)T2_BASE;
85 struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
87 #if defined(CONFIG_TWL4030_POWER)
88 twl4030_power_mmc_init();
91 writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
92 PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
93 &t2_base->pbias_lite);
95 writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
98 writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL,
101 writel(readl(&prcm_base->fclken1_core) |
102 EN_MMC1 | EN_MMC2 | EN_MMC3,
103 &prcm_base->fclken1_core);
105 writel(readl(&prcm_base->iclken1_core) |
106 EN_MMC1 | EN_MMC2 | EN_MMC3,
107 &prcm_base->iclken1_core);
112 void mmc_init_stream(void)
114 writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
116 writel(MMC_CMD0, &mmc_base->cmd);
117 while (!(readl(&mmc_base->stat) & CC_MASK));
119 writel(CC_MASK, &mmc_base->stat);
121 writel(MMC_CMD0, &mmc_base->cmd);
122 while (!(readl(&mmc_base->stat) & CC_MASK));
124 writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
127 unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
131 mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),
132 (ICE_STOP | DTO_15THDTO | CEN_DISABLE));
136 val = MMC_INIT_SEQ_CLK / 2;
139 val = MMC_400kHz_CLK;
147 mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
148 (val << CLKD_OFFSET) | ICE_OSCILLATE);
150 while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY);
152 writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
156 unsigned char mmc_init_setup(void)
158 unsigned int reg_val;
162 writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
163 &mmc_base->sysconfig);
164 while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0);
166 writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl);
167 while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0);
169 writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
170 writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
173 reg_val = readl(&mmc_base->con) & RESERVED_MASK;
175 writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH |
176 MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK |
177 HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con);
179 mmc_clock_config(CLK_INITSEQ, 0);
180 writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
182 writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE |
183 IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC,
190 unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
191 unsigned int *response)
193 unsigned int mmc_stat;
195 while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS);
197 writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk);
198 writel(0xFFFFFFFF, &mmc_base->stat);
199 writel(arg, &mmc_base->arg);
200 writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |
201 MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE,
206 mmc_stat = readl(&mmc_base->stat);
207 } while (mmc_stat == 0);
209 if ((mmc_stat & ERRI_MASK) != 0)
210 return (unsigned char) mmc_stat;
212 if (mmc_stat & CC_MASK) {
213 writel(CC_MASK, &mmc_base->stat);
214 response[0] = readl(&mmc_base->rsp10);
215 if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) {
216 response[1] = readl(&mmc_base->rsp32);
217 response[2] = readl(&mmc_base->rsp54);
218 response[3] = readl(&mmc_base->rsp76);
226 unsigned char mmc_read_data(unsigned int *output_buf)
228 unsigned int mmc_stat;
229 unsigned int read_count = 0;
236 mmc_stat = readl(&mmc_base->stat);
237 } while (mmc_stat == 0);
239 if ((mmc_stat & ERRI_MASK) != 0)
240 return (unsigned char) mmc_stat;
242 if (mmc_stat & BRR_MASK) {
245 writel(readl(&mmc_base->stat) | BRR_MASK,
247 for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) {
248 *output_buf = readl(&mmc_base->data);
254 if (mmc_stat & BWR_MASK)
255 writel(readl(&mmc_base->stat) | BWR_MASK,
258 if (mmc_stat & TC_MASK) {
259 writel(readl(&mmc_base->stat) | TC_MASK,
267 unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
270 unsigned int argument = 0;
271 unsigned int ocr_value, ocr_recvd, ret_cmd41, hcs_val;
272 unsigned short retry_cnt = 2000;
275 /* Set to Initialization Clock */
276 err = mmc_clock_config(CLK_400KHZ, 0);
280 mmc_card_cur->RCA = MMC_RELATIVE_CARD_ADDRESS;
281 argument = 0x00000000;
283 ocr_value = (0x1FF << 15);
284 err = mmc_send_cmd(MMC_CMD0, argument, mmc_resp.resp);
288 argument = SD_CMD8_CHECK_PATTERN | SD_CMD8_2_7_3_6_V_RANGE;
289 err = mmc_send_cmd(MMC_SDCMD8, argument, mmc_resp.resp);
290 hcs_val = (err == 1) ?
291 MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR :
292 MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE;
294 argument = 0x0000 << 16;
295 err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
297 mmc_card_cur->card_type = SD_CARD;
298 ocr_value |= hcs_val;
299 ret_cmd41 = MMC_ACMD41;
301 mmc_card_cur->card_type = MMC_CARD;
302 ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR;
303 ret_cmd41 = MMC_CMD1;
304 writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
305 writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con);
308 argument = ocr_value;
309 err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
313 ocr_recvd = mmc_resp.r3.ocr;
315 while (!(ocr_recvd & (0x1 << 31)) && (retry_cnt > 0)) {
317 if (mmc_card_cur->card_type == SD_CARD) {
318 argument = 0x0000 << 16;
319 err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
322 argument = ocr_value;
323 err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
326 ocr_recvd = mmc_resp.r3.ocr;
329 if (!(ocr_recvd & (0x1 << 31)))
332 if (mmc_card_cur->card_type == MMC_CARD) {
333 if ((ocr_recvd & MMC_OCR_REG_ACCESS_MODE_MASK) ==
334 MMC_OCR_REG_ACCESS_MODE_SECTOR) {
335 mmc_card_cur->mode = SECTOR_MODE;
337 mmc_card_cur->mode = BYTE_MODE;
340 ocr_recvd &= ~MMC_OCR_REG_ACCESS_MODE_MASK;
342 if ((ocr_recvd & MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK)
343 == MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR) {
344 mmc_card_cur->mode = SECTOR_MODE;
346 mmc_card_cur->mode = BYTE_MODE;
348 ocr_recvd &= ~MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK;
351 ocr_recvd &= ~(0x1 << 31);
352 if (!(ocr_recvd & ocr_value))
355 err = mmc_send_cmd(MMC_CMD2, argument, mmc_resp.resp);
359 if (mmc_card_cur->card_type == MMC_CARD) {
360 argument = mmc_card_cur->RCA << 16;
361 err = mmc_send_cmd(MMC_CMD3, argument, mmc_resp.resp);
365 argument = 0x00000000;
366 err = mmc_send_cmd(MMC_SDCMD3, argument, mmc_resp.resp);
370 mmc_card_cur->RCA = mmc_resp.r6.newpublishedrca;
373 writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
374 writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con);
378 unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
379 mmc_csd_reg_t *cur_csd)
381 mmc_extended_csd_reg_t ext_csd;
382 unsigned int size, count, blk_len, blk_no, card_size, argument;
384 unsigned int resp[4];
386 if (mmc_dev_data->mode == SECTOR_MODE) {
387 if (mmc_dev_data->card_type == SD_CARD) {
389 (((mmc_sd2_csd_reg_t *) cur_csd)->
390 c_size_lsb & MMC_SD2_CSD_C_SIZE_LSB_MASK) |
391 ((((mmc_sd2_csd_reg_t *) cur_csd)->
392 c_size_msb & MMC_SD2_CSD_C_SIZE_MSB_MASK)
393 << MMC_SD2_CSD_C_SIZE_MSB_OFFSET);
394 mmc_dev_data->size = card_size * 1024;
395 if (mmc_dev_data->size == 0)
398 argument = 0x00000000;
399 err = mmc_send_cmd(MMC_CMD8, argument, resp);
402 err = mmc_read_data((unsigned int *) &ext_csd);
405 mmc_dev_data->size = ext_csd.sectorcount;
407 if (mmc_dev_data->size == 0)
408 mmc_dev_data->size = 8388608;
411 if (cur_csd->c_size_mult >= 8)
414 if (cur_csd->read_bl_len >= 12)
418 count = 1 << (cur_csd->c_size_mult + 2);
419 card_size = (cur_csd->c_size_lsb & MMC_CSD_C_SIZE_LSB_MASK) |
420 ((cur_csd->c_size_msb & MMC_CSD_C_SIZE_MSB_MASK)
421 << MMC_CSD_C_SIZE_MSB_OFFSET);
422 blk_no = (card_size + 1) * count;
423 blk_len = 1 << cur_csd->read_bl_len;
424 size = blk_no * blk_len;
425 mmc_dev_data->size = size / MMCSD_SECTOR_SIZE;
426 if (mmc_dev_data->size == 0)
432 unsigned char omap_mmc_read_sect(unsigned int start_sec, unsigned int num_bytes,
433 mmc_card_data *mmc_c,
434 unsigned long *output_buf)
437 unsigned int argument;
438 unsigned int resp[4];
439 unsigned int num_sec_val =
440 (num_bytes + (MMCSD_SECTOR_SIZE - 1)) / MMCSD_SECTOR_SIZE;
441 unsigned int sec_inc_val;
443 if (num_sec_val == 0)
446 if (mmc_c->mode == SECTOR_MODE) {
447 argument = start_sec;
450 argument = start_sec * MMCSD_SECTOR_SIZE;
451 sec_inc_val = MMCSD_SECTOR_SIZE;
454 while (num_sec_val) {
455 err = mmc_send_cmd(MMC_CMD17, argument, resp);
459 err = mmc_read_data((unsigned int *) output_buf);
463 output_buf += (MMCSD_SECTOR_SIZE / 4);
464 argument += sec_inc_val;
470 unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
472 unsigned char ret_val;
473 unsigned int argument;
474 unsigned int trans_clk, trans_fact, trans_unit, retries = 2;
475 unsigned char trans_speed;
478 ret_val = mmc_init_setup();
484 ret_val = mmc_detect_card(mmc_card_cur);
486 } while ((retries > 0) && (ret_val != 1));
488 argument = mmc_card_cur->RCA << 16;
489 ret_val = mmc_send_cmd(MMC_CMD9, argument, mmc_resp.resp);
493 if (mmc_card_cur->card_type == MMC_CARD)
494 mmc_card_cur->version = mmc_resp.Card_CSD.spec_vers;
496 trans_speed = mmc_resp.Card_CSD.tran_speed;
498 ret_val = mmc_send_cmd(MMC_CMD4, MMC_DSR_DEFAULT << 16, mmc_resp.resp);
502 trans_unit = trans_speed & MMC_CSD_TRAN_SPEED_UNIT_MASK;
503 trans_fact = trans_speed & MMC_CSD_TRAN_SPEED_FACTOR_MASK;
505 if (trans_unit > MMC_CSD_TRAN_SPEED_UNIT_100MHZ)
508 if ((trans_fact < MMC_CSD_TRAN_SPEED_FACTOR_1_0) ||
509 (trans_fact > MMC_CSD_TRAN_SPEED_FACTOR_8_0))
515 trans_clk = mmc_transspeed_val[trans_fact - 1][trans_unit] * 2;
516 ret_val = mmc_clock_config(CLK_MISC, trans_clk);
521 argument = mmc_card_cur->RCA << 16;
522 ret_val = mmc_send_cmd(MMC_CMD7_SELECT, argument, mmc_resp.resp);
526 /* Configure the block length to 512 bytes */
527 argument = MMCSD_SECTOR_SIZE;
528 ret_val = mmc_send_cmd(MMC_CMD16, argument, mmc_resp.resp);
532 /* get the card size in sectors */
533 ret_val = mmc_read_cardsize(mmc_card_cur, &mmc_resp.Card_CSD);
539 unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt,
542 omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data,
543 (unsigned long *) dst);
547 int mmc_legacy_init(int dev)
549 if (mmc_set_dev(dev) != 0)
552 if (configure_mmc(&cur_card_data) != 1)
555 mmc_blk_dev.if_type = IF_TYPE_MMC;
556 mmc_blk_dev.part_type = PART_TYPE_DOS;
559 mmc_blk_dev.type = 0;
561 /* FIXME fill in the correct size (is set to 32MByte) */
562 mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE;
563 mmc_blk_dev.lba = 0x10000;
564 mmc_blk_dev.removable = 0;
565 mmc_blk_dev.block_read = mmc_bread;
567 fat_register_device(&mmc_blk_dev, 1);