2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <dm/device-internal.h>
20 #include <linux/list.h>
22 #include "mmc_private.h"
24 static struct list_head mmc_devices;
25 static int cur_dev_num = -1;
27 __weak int board_mmc_getwp(struct mmc *mmc)
32 int mmc_getwp(struct mmc *mmc)
36 wp = board_mmc_getwp(mmc);
39 if (mmc->cfg->ops->getwp)
40 wp = mmc->cfg->ops->getwp(mmc);
48 __weak int board_mmc_getcd(struct mmc *mmc)
53 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
57 #ifdef CONFIG_MMC_TRACE
61 printf("CMD_SEND:%d\n", cmd->cmdidx);
62 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
63 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
65 printf("\t\tRET\t\t\t %d\n", ret);
67 switch (cmd->resp_type) {
69 printf("\t\tMMC_RSP_NONE\n");
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
82 printf("\t\t \t\t 0x%08X \n",
84 printf("\t\t \t\t 0x%08X \n",
86 printf("\t\t \t\t 0x%08X \n",
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i = 0; i < 4; i++) {
92 printf("\t\t\t\t\t%03d - ", i*4);
93 ptr = (u8 *)&cmd->response[i];
95 for (j = 0; j < 4; j++)
96 printf("%02X ", *ptr--);
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
105 printf("\t\tERROR MMC rsp not supported\n");
110 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
115 int mmc_send_status(struct mmc *mmc, int timeout)
118 int err, retries = 5;
119 #ifdef CONFIG_MMC_TRACE
123 cmd.cmdidx = MMC_CMD_SEND_STATUS;
124 cmd.resp_type = MMC_RSP_R1;
125 if (!mmc_host_is_spi(mmc))
126 cmd.cmdarg = mmc->rca << 16;
129 err = mmc_send_cmd(mmc, &cmd, NULL);
131 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
132 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
135 else if (cmd.response[0] & MMC_STATUS_MASK) {
136 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
137 printf("Status Error: 0x%08X\n",
142 } else if (--retries < 0)
151 #ifdef CONFIG_MMC_TRACE
152 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
153 printf("CURR STATE:%d\n", status);
156 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
157 printf("Timeout waiting card ready\n");
161 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
167 int mmc_set_blocklen(struct mmc *mmc, int len)
174 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
175 cmd.resp_type = MMC_RSP_R1;
178 return mmc_send_cmd(mmc, &cmd, NULL);
181 struct mmc *find_mmc_device(int dev_num)
184 struct list_head *entry;
186 list_for_each(entry, &mmc_devices) {
187 m = list_entry(entry, struct mmc, link);
189 if (m->block_dev.devnum == dev_num)
193 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
194 printf("MMC Device %d not found\n", dev_num);
200 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
204 struct mmc_data data;
207 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
209 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
211 if (mmc->high_capacity)
214 cmd.cmdarg = start * mmc->read_bl_len;
216 cmd.resp_type = MMC_RSP_R1;
219 data.blocks = blkcnt;
220 data.blocksize = mmc->read_bl_len;
221 data.flags = MMC_DATA_READ;
223 if (mmc_send_cmd(mmc, &cmd, &data))
227 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
229 cmd.resp_type = MMC_RSP_R1b;
230 if (mmc_send_cmd(mmc, &cmd, NULL)) {
231 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
232 printf("mmc fail to send stop cmd\n");
241 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
242 lbaint_t blkcnt, void *dst)
244 int dev_num = block_dev->devnum;
246 lbaint_t cur, blocks_todo = blkcnt;
251 struct mmc *mmc = find_mmc_device(dev_num);
255 err = mmc_select_hwpart(dev_num, block_dev->hwpart);
259 if ((start + blkcnt) > mmc->block_dev.lba) {
260 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
261 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
262 start + blkcnt, mmc->block_dev.lba);
267 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
268 debug("%s: Failed to set blocklen\n", __func__);
273 cur = (blocks_todo > mmc->cfg->b_max) ?
274 mmc->cfg->b_max : blocks_todo;
275 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
276 debug("%s: Failed to read blocks\n", __func__);
281 dst += cur * mmc->read_bl_len;
282 } while (blocks_todo > 0);
287 static int mmc_go_idle(struct mmc *mmc)
294 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
296 cmd.resp_type = MMC_RSP_NONE;
298 err = mmc_send_cmd(mmc, &cmd, NULL);
308 static int sd_send_op_cond(struct mmc *mmc)
315 cmd.cmdidx = MMC_CMD_APP_CMD;
316 cmd.resp_type = MMC_RSP_R1;
319 err = mmc_send_cmd(mmc, &cmd, NULL);
324 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
325 cmd.resp_type = MMC_RSP_R3;
328 * Most cards do not answer if some reserved bits
329 * in the ocr are set. However, Some controller
330 * can set bit 7 (reserved for low voltages), but
331 * how to manage low voltages SD card is not yet
334 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
335 (mmc->cfg->voltages & 0xff8000);
337 if (mmc->version == SD_VERSION_2)
338 cmd.cmdarg |= OCR_HCS;
340 err = mmc_send_cmd(mmc, &cmd, NULL);
345 if (cmd.response[0] & OCR_BUSY)
354 if (mmc->version != SD_VERSION_2)
355 mmc->version = SD_VERSION_1_0;
357 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
358 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
359 cmd.resp_type = MMC_RSP_R3;
362 err = mmc_send_cmd(mmc, &cmd, NULL);
368 mmc->ocr = cmd.response[0];
370 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
376 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
381 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
382 cmd.resp_type = MMC_RSP_R3;
384 if (use_arg && !mmc_host_is_spi(mmc))
385 cmd.cmdarg = OCR_HCS |
386 (mmc->cfg->voltages &
387 (mmc->ocr & OCR_VOLTAGE_MASK)) |
388 (mmc->ocr & OCR_ACCESS_MODE);
390 err = mmc_send_cmd(mmc, &cmd, NULL);
393 mmc->ocr = cmd.response[0];
397 static int mmc_send_op_cond(struct mmc *mmc)
401 /* Some cards seem to need this */
404 /* Asking to the card its capabilities */
405 for (i = 0; i < 2; i++) {
406 err = mmc_send_op_cond_iter(mmc, i != 0);
410 /* exit if not busy (flag seems to be inverted) */
411 if (mmc->ocr & OCR_BUSY)
414 mmc->op_cond_pending = 1;
418 static int mmc_complete_op_cond(struct mmc *mmc)
425 mmc->op_cond_pending = 0;
426 if (!(mmc->ocr & OCR_BUSY)) {
427 start = get_timer(0);
429 err = mmc_send_op_cond_iter(mmc, 1);
432 if (mmc->ocr & OCR_BUSY)
434 if (get_timer(start) > timeout)
440 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
441 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
442 cmd.resp_type = MMC_RSP_R3;
445 err = mmc_send_cmd(mmc, &cmd, NULL);
450 mmc->ocr = cmd.response[0];
453 mmc->version = MMC_VERSION_UNKNOWN;
455 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
462 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
465 struct mmc_data data;
468 /* Get the Card Status Register */
469 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
470 cmd.resp_type = MMC_RSP_R1;
473 data.dest = (char *)ext_csd;
475 data.blocksize = MMC_MAX_BLOCK_LEN;
476 data.flags = MMC_DATA_READ;
478 err = mmc_send_cmd(mmc, &cmd, &data);
484 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
490 cmd.cmdidx = MMC_CMD_SWITCH;
491 cmd.resp_type = MMC_RSP_R1b;
492 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
496 ret = mmc_send_cmd(mmc, &cmd, NULL);
498 /* Waiting for the ready status */
500 ret = mmc_send_status(mmc, timeout);
506 static int mmc_change_freq(struct mmc *mmc)
508 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
514 if (mmc_host_is_spi(mmc))
517 /* Only version 4 supports high-speed */
518 if (mmc->version < MMC_VERSION_4)
521 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
523 err = mmc_send_ext_csd(mmc, ext_csd);
528 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
530 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
533 return err == SWITCH_ERR ? 0 : err;
535 /* Now check to see that it worked */
536 err = mmc_send_ext_csd(mmc, ext_csd);
541 /* No high-speed support */
542 if (!ext_csd[EXT_CSD_HS_TIMING])
545 /* High Speed is set, there are two types: 52MHz and 26MHz */
546 if (cardtype & EXT_CSD_CARD_TYPE_52) {
547 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
548 mmc->card_caps |= MMC_MODE_DDR_52MHz;
549 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
551 mmc->card_caps |= MMC_MODE_HS;
557 static int mmc_set_capacity(struct mmc *mmc, int part_num)
561 mmc->capacity = mmc->capacity_user;
565 mmc->capacity = mmc->capacity_boot;
568 mmc->capacity = mmc->capacity_rpmb;
574 mmc->capacity = mmc->capacity_gp[part_num - 4];
580 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
585 int mmc_switch_part(int dev_num, unsigned int part_num)
587 struct mmc *mmc = find_mmc_device(dev_num);
593 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
594 (mmc->part_config & ~PART_ACCESS_MASK)
595 | (part_num & PART_ACCESS_MASK));
598 * Set the capacity if the switch succeeded or was intended
599 * to return to representing the raw device.
601 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
602 ret = mmc_set_capacity(mmc, part_num);
603 mmc->block_dev.hwpart = part_num;
609 static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
611 struct mmc *mmc = find_mmc_device(desc->devnum);
617 if (mmc->block_dev.hwpart == hwpart)
620 if (mmc->part_config == MMCPART_NOAVAILABLE)
623 ret = mmc_switch_part(desc->devnum, hwpart);
630 int mmc_select_hwpart(int dev_num, int hwpart)
632 struct mmc *mmc = find_mmc_device(dev_num);
638 if (mmc->block_dev.hwpart == hwpart)
641 if (mmc->part_config == MMCPART_NOAVAILABLE)
644 ret = mmc_switch_part(dev_num, hwpart);
651 int mmc_hwpart_config(struct mmc *mmc,
652 const struct mmc_hwpart_conf *conf,
653 enum mmc_hwpart_conf_mode mode)
659 u32 max_enh_size_mult;
660 u32 tot_enh_size_mult = 0;
663 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
665 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
668 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
669 printf("eMMC >= 4.4 required for enhanced user data area\n");
673 if (!(mmc->part_support & PART_SUPPORT)) {
674 printf("Card does not support partitioning\n");
678 if (!mmc->hc_wp_grp_size) {
679 printf("Card does not define HC WP group size\n");
683 /* check partition alignment and total enhanced size */
684 if (conf->user.enh_size) {
685 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
686 conf->user.enh_start % mmc->hc_wp_grp_size) {
687 printf("User data enhanced area not HC WP group "
691 part_attrs |= EXT_CSD_ENH_USR;
692 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
693 if (mmc->high_capacity) {
694 enh_start_addr = conf->user.enh_start;
696 enh_start_addr = (conf->user.enh_start << 9);
702 tot_enh_size_mult += enh_size_mult;
704 for (pidx = 0; pidx < 4; pidx++) {
705 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
706 printf("GP%i partition not HC WP group size "
707 "aligned\n", pidx+1);
710 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
711 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
712 part_attrs |= EXT_CSD_ENH_GP(pidx);
713 tot_enh_size_mult += gp_size_mult[pidx];
717 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
718 printf("Card does not support enhanced attribute\n");
722 err = mmc_send_ext_csd(mmc, ext_csd);
727 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
728 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
729 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
730 if (tot_enh_size_mult > max_enh_size_mult) {
731 printf("Total enhanced size exceeds maximum (%u > %u)\n",
732 tot_enh_size_mult, max_enh_size_mult);
736 /* The default value of EXT_CSD_WR_REL_SET is device
737 * dependent, the values can only be changed if the
738 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
739 * changed only once and before partitioning is completed. */
740 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
741 if (conf->user.wr_rel_change) {
742 if (conf->user.wr_rel_set)
743 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
745 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
747 for (pidx = 0; pidx < 4; pidx++) {
748 if (conf->gp_part[pidx].wr_rel_change) {
749 if (conf->gp_part[pidx].wr_rel_set)
750 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
752 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
756 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
757 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
758 puts("Card does not support host controlled partition write "
759 "reliability settings\n");
763 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
764 EXT_CSD_PARTITION_SETTING_COMPLETED) {
765 printf("Card already partitioned\n");
769 if (mode == MMC_HWPART_CONF_CHECK)
772 /* Partitioning requires high-capacity size definitions */
773 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
774 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
775 EXT_CSD_ERASE_GROUP_DEF, 1);
780 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
782 /* update erase group size to be high-capacity */
783 mmc->erase_grp_size =
784 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
788 /* all OK, write the configuration */
789 for (i = 0; i < 4; i++) {
790 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
791 EXT_CSD_ENH_START_ADDR+i,
792 (enh_start_addr >> (i*8)) & 0xFF);
796 for (i = 0; i < 3; i++) {
797 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
798 EXT_CSD_ENH_SIZE_MULT+i,
799 (enh_size_mult >> (i*8)) & 0xFF);
803 for (pidx = 0; pidx < 4; pidx++) {
804 for (i = 0; i < 3; i++) {
805 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
806 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
807 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
812 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
813 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
817 if (mode == MMC_HWPART_CONF_SET)
820 /* The WR_REL_SET is a write-once register but shall be
821 * written before setting PART_SETTING_COMPLETED. As it is
822 * write-once we can only write it when completing the
824 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
825 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
826 EXT_CSD_WR_REL_SET, wr_rel_set);
831 /* Setting PART_SETTING_COMPLETED confirms the partition
832 * configuration but it only becomes effective after power
833 * cycle, so we do not adjust the partition related settings
834 * in the mmc struct. */
836 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
837 EXT_CSD_PARTITION_SETTING,
838 EXT_CSD_PARTITION_SETTING_COMPLETED);
845 int mmc_getcd(struct mmc *mmc)
849 cd = board_mmc_getcd(mmc);
852 if (mmc->cfg->ops->getcd)
853 cd = mmc->cfg->ops->getcd(mmc);
861 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
864 struct mmc_data data;
866 /* Switch the frequency */
867 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
868 cmd.resp_type = MMC_RSP_R1;
869 cmd.cmdarg = (mode << 31) | 0xffffff;
870 cmd.cmdarg &= ~(0xf << (group * 4));
871 cmd.cmdarg |= value << (group * 4);
873 data.dest = (char *)resp;
876 data.flags = MMC_DATA_READ;
878 return mmc_send_cmd(mmc, &cmd, &data);
882 static int sd_change_freq(struct mmc *mmc)
886 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
887 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
888 struct mmc_data data;
893 if (mmc_host_is_spi(mmc))
896 /* Read the SCR to find out if this card supports higher speeds */
897 cmd.cmdidx = MMC_CMD_APP_CMD;
898 cmd.resp_type = MMC_RSP_R1;
899 cmd.cmdarg = mmc->rca << 16;
901 err = mmc_send_cmd(mmc, &cmd, NULL);
906 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
907 cmd.resp_type = MMC_RSP_R1;
913 data.dest = (char *)scr;
916 data.flags = MMC_DATA_READ;
918 err = mmc_send_cmd(mmc, &cmd, &data);
927 mmc->scr[0] = __be32_to_cpu(scr[0]);
928 mmc->scr[1] = __be32_to_cpu(scr[1]);
930 switch ((mmc->scr[0] >> 24) & 0xf) {
932 mmc->version = SD_VERSION_1_0;
935 mmc->version = SD_VERSION_1_10;
938 mmc->version = SD_VERSION_2;
939 if ((mmc->scr[0] >> 15) & 0x1)
940 mmc->version = SD_VERSION_3;
943 mmc->version = SD_VERSION_1_0;
947 if (mmc->scr[0] & SD_DATA_4BIT)
948 mmc->card_caps |= MMC_MODE_4BIT;
950 /* Version 1.0 doesn't support switching */
951 if (mmc->version == SD_VERSION_1_0)
956 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
957 (u8 *)switch_status);
962 /* The high-speed function is busy. Try again */
963 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
967 /* If high-speed isn't supported, we return */
968 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
972 * If the host doesn't support SD_HIGHSPEED, do not switch card to
973 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
974 * This can avoid furthur problem when the card runs in different
975 * mode between the host.
977 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
978 (mmc->cfg->host_caps & MMC_MODE_HS)))
981 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
986 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
987 mmc->card_caps |= MMC_MODE_HS;
992 /* frequency bases */
993 /* divided by 10 to be nice to platforms without floating point */
994 static const int fbase[] = {
1001 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1002 * to platforms without floating point.
1004 static const int multipliers[] = {
1023 static void mmc_set_ios(struct mmc *mmc)
1025 if (mmc->cfg->ops->set_ios)
1026 mmc->cfg->ops->set_ios(mmc);
1029 void mmc_set_clock(struct mmc *mmc, uint clock)
1031 if (clock > mmc->cfg->f_max)
1032 clock = mmc->cfg->f_max;
1034 if (clock < mmc->cfg->f_min)
1035 clock = mmc->cfg->f_min;
1042 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1044 mmc->bus_width = width;
1049 static int mmc_startup(struct mmc *mmc)
1053 u64 cmult, csize, capacity;
1055 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1056 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1058 bool has_parts = false;
1059 bool part_completed;
1061 #ifdef CONFIG_MMC_SPI_CRC_ON
1062 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1063 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1064 cmd.resp_type = MMC_RSP_R1;
1066 err = mmc_send_cmd(mmc, &cmd, NULL);
1073 /* Put the Card in Identify Mode */
1074 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1075 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1076 cmd.resp_type = MMC_RSP_R2;
1079 err = mmc_send_cmd(mmc, &cmd, NULL);
1084 memcpy(mmc->cid, cmd.response, 16);
1087 * For MMC cards, set the Relative Address.
1088 * For SD cards, get the Relatvie Address.
1089 * This also puts the cards into Standby State
1091 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1092 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1093 cmd.cmdarg = mmc->rca << 16;
1094 cmd.resp_type = MMC_RSP_R6;
1096 err = mmc_send_cmd(mmc, &cmd, NULL);
1102 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1105 /* Get the Card-Specific Data */
1106 cmd.cmdidx = MMC_CMD_SEND_CSD;
1107 cmd.resp_type = MMC_RSP_R2;
1108 cmd.cmdarg = mmc->rca << 16;
1110 err = mmc_send_cmd(mmc, &cmd, NULL);
1112 /* Waiting for the ready status */
1113 mmc_send_status(mmc, timeout);
1118 mmc->csd[0] = cmd.response[0];
1119 mmc->csd[1] = cmd.response[1];
1120 mmc->csd[2] = cmd.response[2];
1121 mmc->csd[3] = cmd.response[3];
1123 if (mmc->version == MMC_VERSION_UNKNOWN) {
1124 int version = (cmd.response[0] >> 26) & 0xf;
1128 mmc->version = MMC_VERSION_1_2;
1131 mmc->version = MMC_VERSION_1_4;
1134 mmc->version = MMC_VERSION_2_2;
1137 mmc->version = MMC_VERSION_3;
1140 mmc->version = MMC_VERSION_4;
1143 mmc->version = MMC_VERSION_1_2;
1148 /* divide frequency by 10, since the mults are 10x bigger */
1149 freq = fbase[(cmd.response[0] & 0x7)];
1150 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1152 mmc->tran_speed = freq * mult;
1154 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1155 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1158 mmc->write_bl_len = mmc->read_bl_len;
1160 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1162 if (mmc->high_capacity) {
1163 csize = (mmc->csd[1] & 0x3f) << 16
1164 | (mmc->csd[2] & 0xffff0000) >> 16;
1167 csize = (mmc->csd[1] & 0x3ff) << 2
1168 | (mmc->csd[2] & 0xc0000000) >> 30;
1169 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1172 mmc->capacity_user = (csize + 1) << (cmult + 2);
1173 mmc->capacity_user *= mmc->read_bl_len;
1174 mmc->capacity_boot = 0;
1175 mmc->capacity_rpmb = 0;
1176 for (i = 0; i < 4; i++)
1177 mmc->capacity_gp[i] = 0;
1179 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1180 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1182 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1183 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1185 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1186 cmd.cmdidx = MMC_CMD_SET_DSR;
1187 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1188 cmd.resp_type = MMC_RSP_NONE;
1189 if (mmc_send_cmd(mmc, &cmd, NULL))
1190 printf("MMC: SET_DSR failed\n");
1193 /* Select the card, and put it into Transfer Mode */
1194 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1195 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1196 cmd.resp_type = MMC_RSP_R1;
1197 cmd.cmdarg = mmc->rca << 16;
1198 err = mmc_send_cmd(mmc, &cmd, NULL);
1205 * For SD, its erase group is always one sector
1207 mmc->erase_grp_size = 1;
1208 mmc->part_config = MMCPART_NOAVAILABLE;
1209 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1210 /* check ext_csd version and capacity */
1211 err = mmc_send_ext_csd(mmc, ext_csd);
1214 if (ext_csd[EXT_CSD_REV] >= 2) {
1216 * According to the JEDEC Standard, the value of
1217 * ext_csd's capacity is valid if the value is more
1220 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1221 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1222 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1223 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1224 capacity *= MMC_MAX_BLOCK_LEN;
1225 if ((capacity >> 20) > 2 * 1024)
1226 mmc->capacity_user = capacity;
1229 switch (ext_csd[EXT_CSD_REV]) {
1231 mmc->version = MMC_VERSION_4_1;
1234 mmc->version = MMC_VERSION_4_2;
1237 mmc->version = MMC_VERSION_4_3;
1240 mmc->version = MMC_VERSION_4_41;
1243 mmc->version = MMC_VERSION_4_5;
1246 mmc->version = MMC_VERSION_5_0;
1250 /* The partition data may be non-zero but it is only
1251 * effective if PARTITION_SETTING_COMPLETED is set in
1252 * EXT_CSD, so ignore any data if this bit is not set,
1253 * except for enabling the high-capacity group size
1254 * definition (see below). */
1255 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1256 EXT_CSD_PARTITION_SETTING_COMPLETED);
1258 /* store the partition info of emmc */
1259 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1260 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1261 ext_csd[EXT_CSD_BOOT_MULT])
1262 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1263 if (part_completed &&
1264 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1265 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1267 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1269 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1271 for (i = 0; i < 4; i++) {
1272 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1273 uint mult = (ext_csd[idx + 2] << 16) +
1274 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1277 if (!part_completed)
1279 mmc->capacity_gp[i] = mult;
1280 mmc->capacity_gp[i] *=
1281 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1282 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1283 mmc->capacity_gp[i] <<= 19;
1286 if (part_completed) {
1287 mmc->enh_user_size =
1288 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1289 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1290 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1291 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1292 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1293 mmc->enh_user_size <<= 19;
1294 mmc->enh_user_start =
1295 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1296 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1297 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1298 ext_csd[EXT_CSD_ENH_START_ADDR];
1299 if (mmc->high_capacity)
1300 mmc->enh_user_start <<= 9;
1304 * Host needs to enable ERASE_GRP_DEF bit if device is
1305 * partitioned. This bit will be lost every time after a reset
1306 * or power off. This will affect erase size.
1310 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1311 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1314 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1315 EXT_CSD_ERASE_GROUP_DEF, 1);
1320 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1323 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1324 /* Read out group size from ext_csd */
1325 mmc->erase_grp_size =
1326 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1328 * if high capacity and partition setting completed
1329 * SEC_COUNT is valid even if it is smaller than 2 GiB
1330 * JEDEC Standard JESD84-B45, 6.2.4
1332 if (mmc->high_capacity && part_completed) {
1333 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1334 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1335 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1336 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1337 capacity *= MMC_MAX_BLOCK_LEN;
1338 mmc->capacity_user = capacity;
1341 /* Calculate the group size from the csd value. */
1342 int erase_gsz, erase_gmul;
1343 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1344 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1345 mmc->erase_grp_size = (erase_gsz + 1)
1349 mmc->hc_wp_grp_size = 1024
1350 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1351 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1353 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1356 err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
1361 err = sd_change_freq(mmc);
1363 err = mmc_change_freq(mmc);
1368 /* Restrict card's capabilities by what the host can do */
1369 mmc->card_caps &= mmc->cfg->host_caps;
1372 if (mmc->card_caps & MMC_MODE_4BIT) {
1373 cmd.cmdidx = MMC_CMD_APP_CMD;
1374 cmd.resp_type = MMC_RSP_R1;
1375 cmd.cmdarg = mmc->rca << 16;
1377 err = mmc_send_cmd(mmc, &cmd, NULL);
1381 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1382 cmd.resp_type = MMC_RSP_R1;
1384 err = mmc_send_cmd(mmc, &cmd, NULL);
1388 mmc_set_bus_width(mmc, 4);
1391 if (mmc->card_caps & MMC_MODE_HS)
1392 mmc->tran_speed = 50000000;
1394 mmc->tran_speed = 25000000;
1395 } else if (mmc->version >= MMC_VERSION_4) {
1396 /* Only version 4 of MMC supports wider bus widths */
1399 /* An array of possible bus widths in order of preference */
1400 static unsigned ext_csd_bits[] = {
1401 EXT_CSD_DDR_BUS_WIDTH_8,
1402 EXT_CSD_DDR_BUS_WIDTH_4,
1403 EXT_CSD_BUS_WIDTH_8,
1404 EXT_CSD_BUS_WIDTH_4,
1405 EXT_CSD_BUS_WIDTH_1,
1408 /* An array to map CSD bus widths to host cap bits */
1409 static unsigned ext_to_hostcaps[] = {
1410 [EXT_CSD_DDR_BUS_WIDTH_4] =
1411 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1412 [EXT_CSD_DDR_BUS_WIDTH_8] =
1413 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1414 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1415 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1418 /* An array to map chosen bus width to an integer */
1419 static unsigned widths[] = {
1423 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1424 unsigned int extw = ext_csd_bits[idx];
1425 unsigned int caps = ext_to_hostcaps[extw];
1428 * If the bus width is still not changed,
1429 * don't try to set the default again.
1430 * Otherwise, recover from switch attempts
1431 * by switching to 1-bit bus width.
1433 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1434 mmc->bus_width == 1) {
1440 * Check to make sure the card and controller support
1441 * these capabilities
1443 if ((mmc->card_caps & caps) != caps)
1446 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1447 EXT_CSD_BUS_WIDTH, extw);
1452 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1453 mmc_set_bus_width(mmc, widths[idx]);
1455 err = mmc_send_ext_csd(mmc, test_csd);
1460 /* Only compare read only fields */
1461 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1462 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1463 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1464 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1465 ext_csd[EXT_CSD_REV]
1466 == test_csd[EXT_CSD_REV] &&
1467 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1468 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1469 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1470 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1479 if (mmc->card_caps & MMC_MODE_HS) {
1480 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1481 mmc->tran_speed = 52000000;
1483 mmc->tran_speed = 26000000;
1487 mmc_set_clock(mmc, mmc->tran_speed);
1489 /* Fix the block length for DDR mode */
1490 if (mmc->ddr_mode) {
1491 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1492 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1495 /* fill in device description */
1496 mmc->block_dev.lun = 0;
1497 mmc->block_dev.hwpart = 0;
1498 mmc->block_dev.type = 0;
1499 mmc->block_dev.blksz = mmc->read_bl_len;
1500 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1501 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1502 #if !defined(CONFIG_SPL_BUILD) || \
1503 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1504 !defined(CONFIG_USE_TINY_PRINTF))
1505 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1506 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1507 (mmc->cid[3] >> 16) & 0xffff);
1508 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1509 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1510 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1511 (mmc->cid[2] >> 24) & 0xff);
1512 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1513 (mmc->cid[2] >> 16) & 0xf);
1515 mmc->block_dev.vendor[0] = 0;
1516 mmc->block_dev.product[0] = 0;
1517 mmc->block_dev.revision[0] = 0;
1519 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1520 part_init(&mmc->block_dev);
1526 static int mmc_send_if_cond(struct mmc *mmc)
1531 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1532 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1533 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1534 cmd.resp_type = MMC_RSP_R7;
1536 err = mmc_send_cmd(mmc, &cmd, NULL);
1541 if ((cmd.response[0] & 0xff) != 0xaa)
1542 return UNUSABLE_ERR;
1544 mmc->version = SD_VERSION_2;
1549 /* not used any more */
1550 int __deprecated mmc_register(struct mmc *mmc)
1552 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1553 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1558 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1562 /* quick validation */
1563 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1564 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1567 mmc = calloc(1, sizeof(*mmc));
1574 /* the following chunk was mmc_register() */
1576 /* Setup dsr related values */
1578 mmc->dsr = 0xffffffff;
1579 /* Setup the universal parts of the block interface just once */
1580 mmc->block_dev.if_type = IF_TYPE_MMC;
1581 mmc->block_dev.devnum = cur_dev_num++;
1582 mmc->block_dev.removable = 1;
1583 mmc->block_dev.block_read = mmc_bread;
1584 mmc->block_dev.block_write = mmc_bwrite;
1585 mmc->block_dev.block_erase = mmc_berase;
1587 /* setup initial part type */
1588 mmc->block_dev.part_type = mmc->cfg->part_type;
1590 INIT_LIST_HEAD(&mmc->link);
1592 list_add_tail(&mmc->link, &mmc_devices);
1597 void mmc_destroy(struct mmc *mmc)
1599 /* only freeing memory for now */
1603 static int mmc_get_dev(int dev, struct blk_desc **descp)
1605 struct mmc *mmc = find_mmc_device(dev);
1610 ret = mmc_init(mmc);
1614 *descp = &mmc->block_dev;
1619 /* board-specific MMC power initializations. */
1620 __weak void board_mmc_power_init(void)
1624 int mmc_start_init(struct mmc *mmc)
1628 /* we pretend there's no card when init is NULL */
1629 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1631 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1632 printf("MMC: no card present\n");
1640 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1641 mmc_adapter_card_type_ident();
1643 board_mmc_power_init();
1645 /* made sure it's not NULL earlier */
1646 err = mmc->cfg->ops->init(mmc);
1652 mmc_set_bus_width(mmc, 1);
1653 mmc_set_clock(mmc, 1);
1655 /* Reset the Card */
1656 err = mmc_go_idle(mmc);
1661 /* The internal partition reset to user partition(0) at every CMD0*/
1662 mmc->block_dev.hwpart = 0;
1664 /* Test for SD version 2 */
1665 err = mmc_send_if_cond(mmc);
1667 /* Now try to get the SD card's operating condition */
1668 err = sd_send_op_cond(mmc);
1670 /* If the command timed out, we check for an MMC card */
1671 if (err == TIMEOUT) {
1672 err = mmc_send_op_cond(mmc);
1675 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1676 printf("Card did not respond to voltage select!\n");
1678 return UNUSABLE_ERR;
1683 mmc->init_in_progress = 1;
1688 static int mmc_complete_init(struct mmc *mmc)
1692 mmc->init_in_progress = 0;
1693 if (mmc->op_cond_pending)
1694 err = mmc_complete_op_cond(mmc);
1697 err = mmc_startup(mmc);
1705 int mmc_init(struct mmc *mmc)
1713 start = get_timer(0);
1715 if (!mmc->init_in_progress)
1716 err = mmc_start_init(mmc);
1719 err = mmc_complete_init(mmc);
1720 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1724 int mmc_set_dsr(struct mmc *mmc, u16 val)
1730 /* CPU-specific MMC initializations */
1731 __weak int cpu_mmc_init(bd_t *bis)
1736 /* board-specific MMC initializations. */
1737 __weak int board_mmc_init(bd_t *bis)
1742 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1744 void print_mmc_devices(char separator)
1747 struct list_head *entry;
1750 list_for_each(entry, &mmc_devices) {
1751 m = list_entry(entry, struct mmc, link);
1754 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1758 printf("%s: %d", m->cfg->name, m->block_dev.devnum);
1760 printf(" (%s)", mmc_type);
1762 if (entry->next != &mmc_devices) {
1763 printf("%c", separator);
1764 if (separator != '\n')
1773 void print_mmc_devices(char separator) { }
1776 int get_mmc_num(void)
1781 void mmc_set_preinit(struct mmc *mmc, int preinit)
1783 mmc->preinit = preinit;
1786 static void do_preinit(void)
1789 struct list_head *entry;
1791 list_for_each(entry, &mmc_devices) {
1792 m = list_entry(entry, struct mmc, link);
1794 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1795 mmc_set_preinit(m, 1);
1802 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1803 static int mmc_probe(bd_t *bis)
1807 #elif defined(CONFIG_DM_MMC)
1808 static int mmc_probe(bd_t *bis)
1812 struct udevice *dev;
1814 ret = uclass_get(UCLASS_MMC, &uc);
1819 * Try to add them in sequence order. Really with driver model we
1820 * should allow holes, but the current MMC list does not allow that.
1821 * So if we request 0, 1, 3 we will get 0, 1, 2.
1823 for (i = 0; ; i++) {
1824 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1828 uclass_foreach_dev(dev, uc) {
1829 ret = device_probe(dev);
1831 printf("%s - probe failed: %d\n", dev->name, ret);
1837 static int mmc_probe(bd_t *bis)
1839 if (board_mmc_init(bis) < 0)
1846 int mmc_initialize(bd_t *bis)
1848 static int initialized = 0;
1850 if (initialized) /* Avoid initializing mmc multiple times */
1854 INIT_LIST_HEAD (&mmc_devices);
1857 ret = mmc_probe(bis);
1861 #ifndef CONFIG_SPL_BUILD
1862 print_mmc_devices(',');
1869 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1871 * This function changes the size of boot partition and the size of rpmb
1872 * partition present on EMMC devices.
1875 * struct *mmc: pointer for the mmc device strcuture
1876 * bootsize: size of boot partition
1877 * rpmbsize: size of rpmb partition
1879 * Returns 0 on success.
1882 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1883 unsigned long rpmbsize)
1888 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1889 cmd.cmdidx = MMC_CMD_RES_MAN;
1890 cmd.resp_type = MMC_RSP_R1b;
1891 cmd.cmdarg = MMC_CMD62_ARG1;
1893 err = mmc_send_cmd(mmc, &cmd, NULL);
1895 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1899 /* Boot partition changing mode */
1900 cmd.cmdidx = MMC_CMD_RES_MAN;
1901 cmd.resp_type = MMC_RSP_R1b;
1902 cmd.cmdarg = MMC_CMD62_ARG2;
1904 err = mmc_send_cmd(mmc, &cmd, NULL);
1906 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1909 /* boot partition size is multiple of 128KB */
1910 bootsize = (bootsize * 1024) / 128;
1912 /* Arg: boot partition size */
1913 cmd.cmdidx = MMC_CMD_RES_MAN;
1914 cmd.resp_type = MMC_RSP_R1b;
1915 cmd.cmdarg = bootsize;
1917 err = mmc_send_cmd(mmc, &cmd, NULL);
1919 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1922 /* RPMB partition size is multiple of 128KB */
1923 rpmbsize = (rpmbsize * 1024) / 128;
1924 /* Arg: RPMB partition size */
1925 cmd.cmdidx = MMC_CMD_RES_MAN;
1926 cmd.resp_type = MMC_RSP_R1b;
1927 cmd.cmdarg = rpmbsize;
1929 err = mmc_send_cmd(mmc, &cmd, NULL);
1931 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1938 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1939 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1942 * Returns 0 on success.
1944 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1948 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1949 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1950 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1951 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1959 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1960 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1963 * Returns 0 on success.
1965 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1969 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1970 EXT_CSD_BOOT_ACK(ack) |
1971 EXT_CSD_BOOT_PART_NUM(part_num) |
1972 EXT_CSD_PARTITION_ACCESS(access));
1980 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1981 * for enable. Note that this is a write-once field for non-zero values.
1983 * Returns 0 on success.
1985 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1987 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1992 U_BOOT_LEGACY_BLK(mmc) = {
1993 .if_typename = "mmc",
1994 .if_type = IF_TYPE_MMC,
1996 .get_dev = mmc_get_dev,
1997 .select_hwpart = mmc_select_hwpartp,