drivers/mmc/mmc.c

   1 /*
   2  * Copyright 2008, Freescale Semiconductor, Inc
   3  * Andy Fleming
   4  *
   5  * Based vaguely on the Linux code
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <errno.h>
  16 #include <mmc.h>
  17 #include <part.h>
  18 #include <power/regulator.h>
  19 #include <malloc.h>
  20 #include <memalign.h>
  21 #include <linux/list.h>
  22 #include <div64.h>
  23 #include "mmc_private.h"
  24
  25 static const unsigned int sd_au_size[] = {
  26         0,              SZ_16K / 512,           SZ_32K / 512,
  27         SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
  28         SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
  29         SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
  30         SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,   SZ_64M / 512,
  31 };
  32
  33 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  34 static int mmc_power_cycle(struct mmc *mmc);
  35 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
  36
  37 #if CONFIG_IS_ENABLED(MMC_TINY)
  38 static struct mmc mmc_static;
  39 struct mmc *find_mmc_device(int dev_num)
  40 {
  41         return &mmc_static;
  42 }
  43
  44 void mmc_do_preinit(void)
  45 {
  46         struct mmc *m = &mmc_static;
  47 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  48         mmc_set_preinit(m, 1);
  49 #endif
  50         if (m->preinit)
  51                 mmc_start_init(m);
  52 }
  53
  54 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
  55 {
  56         return &mmc->block_dev;
  57 }
  58 #endif
  59
  60 #if !CONFIG_IS_ENABLED(DM_MMC)
  61
  62 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
  63 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout)
  64 {
  65         return -ENOSYS;
  66 }
  67 #endif
  68
  69 __weak int board_mmc_getwp(struct mmc *mmc)
  70 {
  71         return -1;
  72 }
  73
  74 int mmc_getwp(struct mmc *mmc)
  75 {
  76         int wp;
  77
  78         wp = board_mmc_getwp(mmc);
  79
  80         if (wp < 0) {
  81                 if (mmc->cfg->ops->getwp)
  82                         wp = mmc->cfg->ops->getwp(mmc);
  83                 else
  84                         wp = 0;
  85         }
  86
  87         return wp;
  88 }
  89
  90 __weak int board_mmc_getcd(struct mmc *mmc)
  91 {
  92         return -1;
  93 }
  94 #endif
  95
  96 #ifdef CONFIG_MMC_TRACE
  97 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  98 {
  99         printf("CMD_SEND:%d\n", cmd->cmdidx);
 100         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
 101 }
 102
 103 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
 104 {
 105         int i;
 106         u8 *ptr;
 107
 108         if (ret) {
 109                 printf("\t\tRET\t\t\t %d\n", ret);
 110         } else {
 111                 switch (cmd->resp_type) {
 112                 case MMC_RSP_NONE:
 113                         printf("\t\tMMC_RSP_NONE\n");
 114                         break;
 115                 case MMC_RSP_R1:
 116                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
 117                                 cmd->response[0]);
 118                         break;
 119                 case MMC_RSP_R1b:
 120                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
 121                                 cmd->response[0]);
 122                         break;
 123                 case MMC_RSP_R2:
 124                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
 125                                 cmd->response[0]);
 126                         printf("\t\t          \t\t 0x%08X \n",
 127                                 cmd->response[1]);
 128                         printf("\t\t          \t\t 0x%08X \n",
 129                                 cmd->response[2]);
 130                         printf("\t\t          \t\t 0x%08X \n",
 131                                 cmd->response[3]);
 132                         printf("\n");
 133                         printf("\t\t\t\t\tDUMPING DATA\n");
 134                         for (i = 0; i < 4; i++) {
 135                                 int j;
 136                                 printf("\t\t\t\t\t%03d - ", i*4);
 137                                 ptr = (u8 *)&cmd->response[i];
 138                                 ptr += 3;
 139                                 for (j = 0; j < 4; j++)
 140                                         printf("%02X ", *ptr--);
 141                                 printf("\n");
 142                         }
 143                         break;
 144                 case MMC_RSP_R3:
 145                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
 146                                 cmd->response[0]);
 147                         break;
 148                 default:
 149                         printf("\t\tERROR MMC rsp not supported\n");
 150                         break;
 151                 }
 152         }
 153 }
 154
 155 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 156 {
 157         int status;
 158
 159         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 160         printf("CURR STATE:%d\n", status);
 161 }
 162 #endif
 163
 164 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 165 const char *mmc_mode_name(enum bus_mode mode)
 166 {
 167         static const char *const names[] = {
 168               [MMC_LEGACY]      = "MMC legacy",
 169               [SD_LEGACY]       = "SD Legacy",
 170               [MMC_HS]          = "MMC High Speed (26MHz)",
 171               [SD_HS]           = "SD High Speed (50MHz)",
 172               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 173               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 174               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 175               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 176               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 177               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 178               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 179               [MMC_HS_200]      = "HS200 (200MHz)",
 180         };
 181
 182         if (mode >= MMC_MODES_END)
 183                 return "Unknown mode";
 184         else
 185                 return names[mode];
 186 }
 187 #endif
 188
 189 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 190 {
 191         static const int freqs[] = {
 192               [SD_LEGACY]       = 25000000,
 193               [MMC_HS]          = 26000000,
 194               [SD_HS]           = 50000000,
 195 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 196               [UHS_SDR12]       = 25000000,
 197               [UHS_SDR25]       = 50000000,
 198               [UHS_SDR50]       = 100000000,
 199               [UHS_DDR50]       = 50000000,
 200 #ifdef MMC_SUPPORTS_TUNING
 201               [UHS_SDR104]      = 208000000,
 202 #endif
 203 #endif
 204               [MMC_HS_52]       = 52000000,
 205               [MMC_DDR_52]      = 52000000,
 206 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 207               [MMC_HS_200]      = 200000000,
 208 #endif
 209         };
 210
 211         if (mode == MMC_LEGACY)
 212                 return mmc->legacy_speed;
 213         else if (mode >= MMC_MODES_END)
 214                 return 0;
 215         else
 216                 return freqs[mode];
 217 }
 218
 219 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 220 {
 221         mmc->selected_mode = mode;
 222         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 223         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 224         debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 225               mmc->tran_speed / 1000000);
 226         return 0;
 227 }
 228
 229 #if !CONFIG_IS_ENABLED(DM_MMC)
 230 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 231 {
 232         int ret;
 233
 234         mmmc_trace_before_send(mmc, cmd);
 235         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 236         mmmc_trace_after_send(mmc, cmd, ret);
 237
 238         return ret;
 239 }
 240 #endif
 241
 242 int mmc_send_status(struct mmc *mmc, int timeout)
 243 {
 244         struct mmc_cmd cmd;
 245         int err, retries = 5;
 246
 247         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 248         cmd.resp_type = MMC_RSP_R1;
 249         if (!mmc_host_is_spi(mmc))
 250                 cmd.cmdarg = mmc->rca << 16;
 251
 252         while (1) {
 253                 err = mmc_send_cmd(mmc, &cmd, NULL);
 254                 if (!err) {
 255                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 256                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 257                              MMC_STATE_PRG)
 258                                 break;
 259
 260                         if (cmd.response[0] & MMC_STATUS_MASK) {
 261 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 262                                 pr_err("Status Error: 0x%08X\n",
 263                                        cmd.response[0]);
 264 #endif
 265                                 return -ECOMM;
 266                         }
 267                 } else if (--retries < 0)
 268                         return err;
 269
 270                 if (timeout-- <= 0)
 271                         break;
 272
 273                 udelay(1000);
 274         }
 275
 276         mmc_trace_state(mmc, &cmd);
 277         if (timeout <= 0) {
 278 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 279                 pr_err("Timeout waiting card ready\n");
 280 #endif
 281                 return -ETIMEDOUT;
 282         }
 283
 284         return 0;
 285 }
 286
 287 int mmc_set_blocklen(struct mmc *mmc, int len)
 288 {
 289         struct mmc_cmd cmd;
 290         int err;
 291
 292         if (mmc->ddr_mode)
 293                 return 0;
 294
 295         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 296         cmd.resp_type = MMC_RSP_R1;
 297         cmd.cmdarg = len;
 298
 299         err = mmc_send_cmd(mmc, &cmd, NULL);
 300
 301 #ifdef CONFIG_MMC_QUIRKS
 302         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
 303                 int retries = 4;
 304                 /*
 305                  * It has been seen that SET_BLOCKLEN may fail on the first
 306                  * attempt, let's try a few more time
 307                  */
 308                 do {
 309                         err = mmc_send_cmd(mmc, &cmd, NULL);
 310                         if (!err)
 311                                 break;
 312                 } while (retries--);
 313         }
 314 #endif
 315
 316         return err;
 317 }
 318
 319 #ifdef MMC_SUPPORTS_TUNING
 320 static const u8 tuning_blk_pattern_4bit[] = {
 321         0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
 322         0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
 323         0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
 324         0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
 325         0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
 326         0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
 327         0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
 328         0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
 329 };
 330
 331 static const u8 tuning_blk_pattern_8bit[] = {
 332         0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
 333         0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
 334         0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
 335         0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
 336         0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
 337         0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
 338         0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
 339         0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
 340         0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
 341         0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
 342         0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
 343         0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
 344         0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
 345         0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
 346         0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
 347         0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
 348 };
 349
 350 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
 351 {
 352         struct mmc_cmd cmd;
 353         struct mmc_data data;
 354         const u8 *tuning_block_pattern;
 355         int size, err;
 356
 357         if (mmc->bus_width == 8) {
 358                 tuning_block_pattern = tuning_blk_pattern_8bit;
 359                 size = sizeof(tuning_blk_pattern_8bit);
 360         } else if (mmc->bus_width == 4) {
 361                 tuning_block_pattern = tuning_blk_pattern_4bit;
 362                 size = sizeof(tuning_blk_pattern_4bit);
 363         } else {
 364                 return -EINVAL;
 365         }
 366
 367         ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
 368
 369         cmd.cmdidx = opcode;
 370         cmd.cmdarg = 0;
 371         cmd.resp_type = MMC_RSP_R1;
 372
 373         data.dest = (void *)data_buf;
 374         data.blocks = 1;
 375         data.blocksize = size;
 376         data.flags = MMC_DATA_READ;
 377
 378         err = mmc_send_cmd(mmc, &cmd, &data);
 379         if (err)
 380                 return err;
 381
 382         if (memcmp(data_buf, tuning_block_pattern, size))
 383                 return -EIO;
 384
 385         return 0;
 386 }
 387 #endif
 388
 389 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 390                            lbaint_t blkcnt)
 391 {
 392         struct mmc_cmd cmd;
 393         struct mmc_data data;
 394
 395         if (blkcnt > 1)
 396                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 397         else
 398                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 399
 400         if (mmc->high_capacity)
 401                 cmd.cmdarg = start;
 402         else
 403                 cmd.cmdarg = start * mmc->read_bl_len;
 404
 405         cmd.resp_type = MMC_RSP_R1;
 406
 407         data.dest = dst;
 408         data.blocks = blkcnt;
 409         data.blocksize = mmc->read_bl_len;
 410         data.flags = MMC_DATA_READ;
 411
 412         if (mmc_send_cmd(mmc, &cmd, &data))
 413                 return 0;
 414
 415         if (blkcnt > 1) {
 416                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 417                 cmd.cmdarg = 0;
 418                 cmd.resp_type = MMC_RSP_R1b;
 419                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 420 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 421                         pr_err("mmc fail to send stop cmd\n");
 422 #endif
 423                         return 0;
 424                 }
 425         }
 426
 427         return blkcnt;
 428 }
 429
 430 #if CONFIG_IS_ENABLED(BLK)
 431 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 432 #else
 433 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 434                 void *dst)
 435 #endif
 436 {
 437 #if CONFIG_IS_ENABLED(BLK)
 438         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 439 #endif
 440         int dev_num = block_dev->devnum;
 441         int err;
 442         lbaint_t cur, blocks_todo = blkcnt;
 443
 444         if (blkcnt == 0)
 445                 return 0;
 446
 447         struct mmc *mmc = find_mmc_device(dev_num);
 448         if (!mmc)
 449                 return 0;
 450
 451         if (CONFIG_IS_ENABLED(MMC_TINY))
 452                 err = mmc_switch_part(mmc, block_dev->hwpart);
 453         else
 454                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 455
 456         if (err < 0)
 457                 return 0;
 458
 459         if ((start + blkcnt) > block_dev->lba) {
 460 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 461                 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 462                        start + blkcnt, block_dev->lba);
 463 #endif
 464                 return 0;
 465         }
 466
 467         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 468                 debug("%s: Failed to set blocklen\n", __func__);
 469                 return 0;
 470         }
 471
 472         do {
 473                 cur = (blocks_todo > mmc->cfg->b_max) ?
 474                         mmc->cfg->b_max : blocks_todo;
 475                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 476                         debug("%s: Failed to read blocks\n", __func__);
 477                         return 0;
 478                 }
 479                 blocks_todo -= cur;
 480                 start += cur;
 481                 dst += cur * mmc->read_bl_len;
 482         } while (blocks_todo > 0);
 483
 484         return blkcnt;
 485 }
 486
 487 static int mmc_go_idle(struct mmc *mmc)
 488 {
 489         struct mmc_cmd cmd;
 490         int err;
 491
 492         udelay(1000);
 493
 494         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 495         cmd.cmdarg = 0;
 496         cmd.resp_type = MMC_RSP_NONE;
 497
 498         err = mmc_send_cmd(mmc, &cmd, NULL);
 499
 500         if (err)
 501                 return err;
 502
 503         udelay(2000);
 504
 505         return 0;
 506 }
 507
 508 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 509 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
 510 {
 511         struct mmc_cmd cmd;
 512         int err = 0;
 513
 514         /*
 515          * Send CMD11 only if the request is to switch the card to
 516          * 1.8V signalling.
 517          */
 518         if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
 519                 return mmc_set_signal_voltage(mmc, signal_voltage);
 520
 521         cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
 522         cmd.cmdarg = 0;
 523         cmd.resp_type = MMC_RSP_R1;
 524
 525         err = mmc_send_cmd(mmc, &cmd, NULL);
 526         if (err)
 527                 return err;
 528
 529         if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
 530                 return -EIO;
 531
 532         /*
 533          * The card should drive cmd and dat[0:3] low immediately
 534          * after the response of cmd11, but wait 100 us to be sure
 535          */
 536         err = mmc_wait_dat0(mmc, 0, 100);
 537         if (err == -ENOSYS)
 538                 udelay(100);
 539         else if (err)
 540                 return -ETIMEDOUT;
 541
 542         /*
 543          * During a signal voltage level switch, the clock must be gated
 544          * for 5 ms according to the SD spec
 545          */
 546         mmc_set_clock(mmc, mmc->clock, true);
 547
 548         err = mmc_set_signal_voltage(mmc, signal_voltage);
 549         if (err)
 550                 return err;
 551
 552         /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
 553         mdelay(10);
 554         mmc_set_clock(mmc, mmc->clock, false);
 555
 556         /*
 557          * Failure to switch is indicated by the card holding
 558          * dat[0:3] low. Wait for at least 1 ms according to spec
 559          */
 560         err = mmc_wait_dat0(mmc, 1, 1000);
 561         if (err == -ENOSYS)
 562                 udelay(1000);
 563         else if (err)
 564                 return -ETIMEDOUT;
 565
 566         return 0;
 567 }
 568 #endif
 569
 570 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
 571 {
 572         int timeout = 1000;
 573         int err;
 574         struct mmc_cmd cmd;
 575
 576         while (1) {
 577                 cmd.cmdidx = MMC_CMD_APP_CMD;
 578                 cmd.resp_type = MMC_RSP_R1;
 579                 cmd.cmdarg = 0;
 580
 581                 err = mmc_send_cmd(mmc, &cmd, NULL);
 582
 583                 if (err)
 584                         return err;
 585
 586                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 587                 cmd.resp_type = MMC_RSP_R3;
 588
 589                 /*
 590                  * Most cards do not answer if some reserved bits
 591                  * in the ocr are set. However, Some controller
 592                  * can set bit 7 (reserved for low voltages), but
 593                  * how to manage low voltages SD card is not yet
 594                  * specified.
 595                  */
 596                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 597                         (mmc->cfg->voltages & 0xff8000);
 598
 599                 if (mmc->version == SD_VERSION_2)
 600                         cmd.cmdarg |= OCR_HCS;
 601
 602                 if (uhs_en)
 603                         cmd.cmdarg |= OCR_S18R;
 604
 605                 err = mmc_send_cmd(mmc, &cmd, NULL);
 606
 607                 if (err)
 608                         return err;
 609
 610                 if (cmd.response[0] & OCR_BUSY)
 611                         break;
 612
 613                 if (timeout-- <= 0)
 614                         return -EOPNOTSUPP;
 615
 616                 udelay(1000);
 617         }
 618
 619         if (mmc->version != SD_VERSION_2)
 620                 mmc->version = SD_VERSION_1_0;
 621
 622         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 623                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 624                 cmd.resp_type = MMC_RSP_R3;
 625                 cmd.cmdarg = 0;
 626
 627                 err = mmc_send_cmd(mmc, &cmd, NULL);
 628
 629                 if (err)
 630                         return err;
 631         }
 632
 633         mmc->ocr = cmd.response[0];
 634
 635 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 636         if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
 637             == 0x41000000) {
 638                 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
 639                 if (err)
 640                         return err;
 641         }
 642 #endif
 643
 644         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 645         mmc->rca = 0;
 646
 647         return 0;
 648 }
 649
 650 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 651 {
 652         struct mmc_cmd cmd;
 653         int err;
 654
 655         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 656         cmd.resp_type = MMC_RSP_R3;
 657         cmd.cmdarg = 0;
 658         if (use_arg && !mmc_host_is_spi(mmc))
 659                 cmd.cmdarg = OCR_HCS |
 660                         (mmc->cfg->voltages &
 661                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 662                         (mmc->ocr & OCR_ACCESS_MODE);
 663
 664         err = mmc_send_cmd(mmc, &cmd, NULL);
 665         if (err)
 666                 return err;
 667         mmc->ocr = cmd.response[0];
 668         return 0;
 669 }
 670
 671 static int mmc_send_op_cond(struct mmc *mmc)
 672 {
 673         int err, i;
 674
 675         /* Some cards seem to need this */
 676         mmc_go_idle(mmc);
 677
 678         /* Asking to the card its capabilities */
 679         for (i = 0; i < 2; i++) {
 680                 err = mmc_send_op_cond_iter(mmc, i != 0);
 681                 if (err)
 682                         return err;
 683
 684                 /* exit if not busy (flag seems to be inverted) */
 685                 if (mmc->ocr & OCR_BUSY)
 686                         break;
 687         }
 688         mmc->op_cond_pending = 1;
 689         return 0;
 690 }
 691
 692 static int mmc_complete_op_cond(struct mmc *mmc)
 693 {
 694         struct mmc_cmd cmd;
 695         int timeout = 1000;
 696         uint start;
 697         int err;
 698
 699         mmc->op_cond_pending = 0;
 700         if (!(mmc->ocr & OCR_BUSY)) {
 701                 /* Some cards seem to need this */
 702                 mmc_go_idle(mmc);
 703
 704                 start = get_timer(0);
 705                 while (1) {
 706                         err = mmc_send_op_cond_iter(mmc, 1);
 707                         if (err)
 708                                 return err;
 709                         if (mmc->ocr & OCR_BUSY)
 710                                 break;
 711                         if (get_timer(start) > timeout)
 712                                 return -EOPNOTSUPP;
 713                         udelay(100);
 714                 }
 715         }
 716
 717         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 718                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 719                 cmd.resp_type = MMC_RSP_R3;
 720                 cmd.cmdarg = 0;
 721
 722                 err = mmc_send_cmd(mmc, &cmd, NULL);
 723
 724                 if (err)
 725                         return err;
 726
 727                 mmc->ocr = cmd.response[0];
 728         }
 729
 730         mmc->version = MMC_VERSION_UNKNOWN;
 731
 732         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 733         mmc->rca = 1;
 734
 735         return 0;
 736 }
 737
 738
 739 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 740 {
 741         struct mmc_cmd cmd;
 742         struct mmc_data data;
 743         int err;
 744
 745         /* Get the Card Status Register */
 746         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 747         cmd.resp_type = MMC_RSP_R1;
 748         cmd.cmdarg = 0;
 749
 750         data.dest = (char *)ext_csd;
 751         data.blocks = 1;
 752         data.blocksize = MMC_MAX_BLOCK_LEN;
 753         data.flags = MMC_DATA_READ;
 754
 755         err = mmc_send_cmd(mmc, &cmd, &data);
 756
 757         return err;
 758 }
 759
 760 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 761 {
 762         struct mmc_cmd cmd;
 763         int timeout = 1000;
 764         int retries = 3;
 765         int ret;
 766
 767         cmd.cmdidx = MMC_CMD_SWITCH;
 768         cmd.resp_type = MMC_RSP_R1b;
 769         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 770                                  (index << 16) |
 771                                  (value << 8);
 772
 773         while (retries > 0) {
 774                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 775
 776                 /* Waiting for the ready status */
 777                 if (!ret) {
 778                         ret = mmc_send_status(mmc, timeout);
 779                         return ret;
 780                 }
 781
 782                 retries--;
 783         }
 784
 785         return ret;
 786
 787 }
 788
 789 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
 790 {
 791         int err;
 792         int speed_bits;
 793
 794         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 795
 796         switch (mode) {
 797         case MMC_HS:
 798         case MMC_HS_52:
 799         case MMC_DDR_52:
 800                 speed_bits = EXT_CSD_TIMING_HS;
 801                 break;
 802         case MMC_HS_200:
 803                 speed_bits = EXT_CSD_TIMING_HS200;
 804                 break;
 805         case MMC_LEGACY:
 806                 speed_bits = EXT_CSD_TIMING_LEGACY;
 807                 break;
 808         default:
 809                 return -EINVAL;
 810         }
 811         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 812                          speed_bits);
 813         if (err)
 814                 return err;
 815
 816         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 817                 /* Now check to see that it worked */
 818                 err = mmc_send_ext_csd(mmc, test_csd);
 819                 if (err)
 820                         return err;
 821
 822                 /* No high-speed support */
 823                 if (!test_csd[EXT_CSD_HS_TIMING])
 824                         return -ENOTSUPP;
 825         }
 826
 827         return 0;
 828 }
 829
 830 static int mmc_get_capabilities(struct mmc *mmc)
 831 {
 832         u8 *ext_csd = mmc->ext_csd;
 833         char cardtype;
 834
 835         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
 836
 837         if (mmc_host_is_spi(mmc))
 838                 return 0;
 839
 840         /* Only version 4 supports high-speed */
 841         if (mmc->version < MMC_VERSION_4)
 842                 return 0;
 843
 844         if (!ext_csd) {
 845                 pr_err("No ext_csd found!\n"); /* this should enver happen */
 846                 return -ENOTSUPP;
 847         }
 848
 849         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 850
 851         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f;
 852         mmc->cardtype = cardtype;
 853
 854         if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
 855                         EXT_CSD_CARD_TYPE_HS200_1_8V)) {
 856                 mmc->card_caps |= MMC_MODE_HS200;
 857         }
 858         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 859                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 860                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 861                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 862         }
 863         if (cardtype & EXT_CSD_CARD_TYPE_26)
 864                 mmc->card_caps |= MMC_MODE_HS;
 865
 866         return 0;
 867 }
 868
 869 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 870 {
 871         switch (part_num) {
 872         case 0:
 873                 mmc->capacity = mmc->capacity_user;
 874                 break;
 875         case 1:
 876         case 2:
 877                 mmc->capacity = mmc->capacity_boot;
 878                 break;
 879         case 3:
 880                 mmc->capacity = mmc->capacity_rpmb;
 881                 break;
 882         case 4:
 883         case 5:
 884         case 6:
 885         case 7:
 886                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 887                 break;
 888         default:
 889                 return -1;
 890         }
 891
 892         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 893
 894         return 0;
 895 }
 896
 897 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 898 static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num)
 899 {
 900         int forbidden = 0;
 901         bool change = false;
 902
 903         if (part_num & PART_ACCESS_MASK)
 904                 forbidden = MMC_CAP(MMC_HS_200);
 905
 906         if (MMC_CAP(mmc->selected_mode) & forbidden) {
 907                 debug("selected mode (%s) is forbidden for part %d\n",
 908                       mmc_mode_name(mmc->selected_mode), part_num);
 909                 change = true;
 910         } else if (mmc->selected_mode != mmc->best_mode) {
 911                 debug("selected mode is not optimal\n");
 912                 change = true;
 913         }
 914
 915         if (change)
 916                 return mmc_select_mode_and_width(mmc,
 917                                                  mmc->card_caps & ~forbidden);
 918
 919         return 0;
 920 }
 921 #else
 922 static inline int mmc_boot_part_access_chk(struct mmc *mmc,
 923                                            unsigned int part_num)
 924 {
 925         return 0;
 926 }
 927 #endif
 928
 929 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 930 {
 931         int ret;
 932
 933         ret = mmc_boot_part_access_chk(mmc, part_num);
 934         if (ret)
 935                 return ret;
 936
 937         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 938                          (mmc->part_config & ~PART_ACCESS_MASK)
 939                          | (part_num & PART_ACCESS_MASK));
 940
 941         /*
 942          * Set the capacity if the switch succeeded or was intended
 943          * to return to representing the raw device.
 944          */
 945         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 946                 ret = mmc_set_capacity(mmc, part_num);
 947                 mmc_get_blk_desc(mmc)->hwpart = part_num;
 948         }
 949
 950         return ret;
 951 }
 952
 953 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
 954 int mmc_hwpart_config(struct mmc *mmc,
 955                       const struct mmc_hwpart_conf *conf,
 956                       enum mmc_hwpart_conf_mode mode)
 957 {
 958         u8 part_attrs = 0;
 959         u32 enh_size_mult;
 960         u32 enh_start_addr;
 961         u32 gp_size_mult[4];
 962         u32 max_enh_size_mult;
 963         u32 tot_enh_size_mult = 0;
 964         u8 wr_rel_set;
 965         int i, pidx, err;
 966         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 967
 968         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 969                 return -EINVAL;
 970
 971         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 972                 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
 973                 return -EMEDIUMTYPE;
 974         }
 975
 976         if (!(mmc->part_support & PART_SUPPORT)) {
 977                 pr_err("Card does not support partitioning\n");
 978                 return -EMEDIUMTYPE;
 979         }
 980
 981         if (!mmc->hc_wp_grp_size) {
 982                 pr_err("Card does not define HC WP group size\n");
 983                 return -EMEDIUMTYPE;
 984         }
 985
 986         /* check partition alignment and total enhanced size */
 987         if (conf->user.enh_size) {
 988                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 989                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 990                         pr_err("User data enhanced area not HC WP group "
 991                                "size aligned\n");
 992                         return -EINVAL;
 993                 }
 994                 part_attrs |= EXT_CSD_ENH_USR;
 995                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 996                 if (mmc->high_capacity) {
 997                         enh_start_addr = conf->user.enh_start;
 998                 } else {
 999                         enh_start_addr = (conf->user.enh_start << 9);
1000                 }
1001         } else {
1002                 enh_size_mult = 0;
1003                 enh_start_addr = 0;
1004         }
1005         tot_enh_size_mult += enh_size_mult;
1006
1007         for (pidx = 0; pidx < 4; pidx++) {
1008                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
1009                         pr_err("GP%i partition not HC WP group size "
1010                                "aligned\n", pidx+1);
1011                         return -EINVAL;
1012                 }
1013                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1014                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1015                         part_attrs |= EXT_CSD_ENH_GP(pidx);
1016                         tot_enh_size_mult += gp_size_mult[pidx];
1017                 }
1018         }
1019
1020         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1021                 pr_err("Card does not support enhanced attribute\n");
1022                 return -EMEDIUMTYPE;
1023         }
1024
1025         err = mmc_send_ext_csd(mmc, ext_csd);
1026         if (err)
1027                 return err;
1028
1029         max_enh_size_mult =
1030                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1031                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1032                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1033         if (tot_enh_size_mult > max_enh_size_mult) {
1034                 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1035                        tot_enh_size_mult, max_enh_size_mult);
1036                 return -EMEDIUMTYPE;
1037         }
1038
1039         /* The default value of EXT_CSD_WR_REL_SET is device
1040          * dependent, the values can only be changed if the
1041          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1042          * changed only once and before partitioning is completed. */
1043         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1044         if (conf->user.wr_rel_change) {
1045                 if (conf->user.wr_rel_set)
1046                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1047                 else
1048                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1049         }
1050         for (pidx = 0; pidx < 4; pidx++) {
1051                 if (conf->gp_part[pidx].wr_rel_change) {
1052                         if (conf->gp_part[pidx].wr_rel_set)
1053                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1054                         else
1055                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1056                 }
1057         }
1058
1059         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1060             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1061                 puts("Card does not support host controlled partition write "
1062                      "reliability settings\n");
1063                 return -EMEDIUMTYPE;
1064         }
1065
1066         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1067             EXT_CSD_PARTITION_SETTING_COMPLETED) {
1068                 pr_err("Card already partitioned\n");
1069                 return -EPERM;
1070         }
1071
1072         if (mode == MMC_HWPART_CONF_CHECK)
1073                 return 0;
1074
1075         /* Partitioning requires high-capacity size definitions */
1076         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1077                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1078                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1079
1080                 if (err)
1081                         return err;
1082
1083                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1084
1085                 /* update erase group size to be high-capacity */
1086                 mmc->erase_grp_size =
1087                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1088
1089         }
1090
1091         /* all OK, write the configuration */
1092         for (i = 0; i < 4; i++) {
1093                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1094                                  EXT_CSD_ENH_START_ADDR+i,
1095                                  (enh_start_addr >> (i*8)) & 0xFF);
1096                 if (err)
1097                         return err;
1098         }
1099         for (i = 0; i < 3; i++) {
1100                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1101                                  EXT_CSD_ENH_SIZE_MULT+i,
1102                                  (enh_size_mult >> (i*8)) & 0xFF);
1103                 if (err)
1104                         return err;
1105         }
1106         for (pidx = 0; pidx < 4; pidx++) {
1107                 for (i = 0; i < 3; i++) {
1108                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1109                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1110                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1111                         if (err)
1112                                 return err;
1113                 }
1114         }
1115         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1116                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1117         if (err)
1118                 return err;
1119
1120         if (mode == MMC_HWPART_CONF_SET)
1121                 return 0;
1122
1123         /* The WR_REL_SET is a write-once register but shall be
1124          * written before setting PART_SETTING_COMPLETED. As it is
1125          * write-once we can only write it when completing the
1126          * partitioning. */
1127         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1128                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1129                                  EXT_CSD_WR_REL_SET, wr_rel_set);
1130                 if (err)
1131                         return err;
1132         }
1133
1134         /* Setting PART_SETTING_COMPLETED confirms the partition
1135          * configuration but it only becomes effective after power
1136          * cycle, so we do not adjust the partition related settings
1137          * in the mmc struct. */
1138
1139         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1140                          EXT_CSD_PARTITION_SETTING,
1141                          EXT_CSD_PARTITION_SETTING_COMPLETED);
1142         if (err)
1143                 return err;
1144
1145         return 0;
1146 }
1147 #endif
1148
1149 #if !CONFIG_IS_ENABLED(DM_MMC)
1150 int mmc_getcd(struct mmc *mmc)
1151 {
1152         int cd;
1153
1154         cd = board_mmc_getcd(mmc);
1155
1156         if (cd < 0) {
1157                 if (mmc->cfg->ops->getcd)
1158                         cd = mmc->cfg->ops->getcd(mmc);
1159                 else
1160                         cd = 1;
1161         }
1162
1163         return cd;
1164 }
1165 #endif
1166
1167 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1168 {
1169         struct mmc_cmd cmd;
1170         struct mmc_data data;
1171
1172         /* Switch the frequency */
1173         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1174         cmd.resp_type = MMC_RSP_R1;
1175         cmd.cmdarg = (mode << 31) | 0xffffff;
1176         cmd.cmdarg &= ~(0xf << (group * 4));
1177         cmd.cmdarg |= value << (group * 4);
1178
1179         data.dest = (char *)resp;
1180         data.blocksize = 64;
1181         data.blocks = 1;
1182         data.flags = MMC_DATA_READ;
1183
1184         return mmc_send_cmd(mmc, &cmd, &data);
1185 }
1186
1187
1188 static int sd_get_capabilities(struct mmc *mmc)
1189 {
1190         int err;
1191         struct mmc_cmd cmd;
1192         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1193         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1194         struct mmc_data data;
1195         int timeout;
1196 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1197         u32 sd3_bus_mode;
1198 #endif
1199
1200         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY);
1201
1202         if (mmc_host_is_spi(mmc))
1203                 return 0;
1204
1205         /* Read the SCR to find out if this card supports higher speeds */
1206         cmd.cmdidx = MMC_CMD_APP_CMD;
1207         cmd.resp_type = MMC_RSP_R1;
1208         cmd.cmdarg = mmc->rca << 16;
1209
1210         err = mmc_send_cmd(mmc, &cmd, NULL);
1211
1212         if (err)
1213                 return err;
1214
1215         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1216         cmd.resp_type = MMC_RSP_R1;
1217         cmd.cmdarg = 0;
1218
1219         timeout = 3;
1220
1221 retry_scr:
1222         data.dest = (char *)scr;
1223         data.blocksize = 8;
1224         data.blocks = 1;
1225         data.flags = MMC_DATA_READ;
1226
1227         err = mmc_send_cmd(mmc, &cmd, &data);
1228
1229         if (err) {
1230                 if (timeout--)
1231                         goto retry_scr;
1232
1233                 return err;
1234         }
1235
1236         mmc->scr[0] = __be32_to_cpu(scr[0]);
1237         mmc->scr[1] = __be32_to_cpu(scr[1]);
1238
1239         switch ((mmc->scr[0] >> 24) & 0xf) {
1240         case 0:
1241                 mmc->version = SD_VERSION_1_0;
1242                 break;
1243         case 1:
1244                 mmc->version = SD_VERSION_1_10;
1245                 break;
1246         case 2:
1247                 mmc->version = SD_VERSION_2;
1248                 if ((mmc->scr[0] >> 15) & 0x1)
1249                         mmc->version = SD_VERSION_3;
1250                 break;
1251         default:
1252                 mmc->version = SD_VERSION_1_0;
1253                 break;
1254         }
1255
1256         if (mmc->scr[0] & SD_DATA_4BIT)
1257                 mmc->card_caps |= MMC_MODE_4BIT;
1258
1259         /* Version 1.0 doesn't support switching */
1260         if (mmc->version == SD_VERSION_1_0)
1261                 return 0;
1262
1263         timeout = 4;
1264         while (timeout--) {
1265                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1266                                 (u8 *)switch_status);
1267
1268                 if (err)
1269                         return err;
1270
1271                 /* The high-speed function is busy.  Try again */
1272                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1273                         break;
1274         }
1275
1276         /* If high-speed isn't supported, we return */
1277         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1278                 mmc->card_caps |= MMC_CAP(SD_HS);
1279
1280 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1281         /* Version before 3.0 don't support UHS modes */
1282         if (mmc->version < SD_VERSION_3)
1283                 return 0;
1284
1285         sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1286         if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1287                 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1288         if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1289                 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1290         if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1291                 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1292         if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1293                 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1294         if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1295                 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1296 #endif
1297
1298         return 0;
1299 }
1300
1301 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1302 {
1303         int err;
1304
1305         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1306         int speed;
1307
1308         switch (mode) {
1309         case SD_LEGACY:
1310         case UHS_SDR12:
1311                 speed = UHS_SDR12_BUS_SPEED;
1312                 break;
1313         case SD_HS:
1314         case UHS_SDR25:
1315                 speed = UHS_SDR25_BUS_SPEED;
1316                 break;
1317         case UHS_SDR50:
1318                 speed = UHS_SDR50_BUS_SPEED;
1319                 break;
1320         case UHS_DDR50:
1321                 speed = UHS_DDR50_BUS_SPEED;
1322                 break;
1323         case UHS_SDR104:
1324                 speed = UHS_SDR104_BUS_SPEED;
1325                 break;
1326         default:
1327                 return -EINVAL;
1328         }
1329
1330         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1331         if (err)
1332                 return err;
1333
1334         if ((__be32_to_cpu(switch_status[4]) >> 24) != speed)
1335                 return -ENOTSUPP;
1336
1337         return 0;
1338 }
1339
1340 int sd_select_bus_width(struct mmc *mmc, int w)
1341 {
1342         int err;
1343         struct mmc_cmd cmd;
1344
1345         if ((w != 4) && (w != 1))
1346                 return -EINVAL;
1347
1348         cmd.cmdidx = MMC_CMD_APP_CMD;
1349         cmd.resp_type = MMC_RSP_R1;
1350         cmd.cmdarg = mmc->rca << 16;
1351
1352         err = mmc_send_cmd(mmc, &cmd, NULL);
1353         if (err)
1354                 return err;
1355
1356         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1357         cmd.resp_type = MMC_RSP_R1;
1358         if (w == 4)
1359                 cmd.cmdarg = 2;
1360         else if (w == 1)
1361                 cmd.cmdarg = 0;
1362         err = mmc_send_cmd(mmc, &cmd, NULL);
1363         if (err)
1364                 return err;
1365
1366         return 0;
1367 }
1368
1369 static int sd_read_ssr(struct mmc *mmc)
1370 {
1371         int err, i;
1372         struct mmc_cmd cmd;
1373         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1374         struct mmc_data data;
1375         int timeout = 3;
1376         unsigned int au, eo, et, es;
1377
1378         cmd.cmdidx = MMC_CMD_APP_CMD;
1379         cmd.resp_type = MMC_RSP_R1;
1380         cmd.cmdarg = mmc->rca << 16;
1381
1382         err = mmc_send_cmd(mmc, &cmd, NULL);
1383         if (err)
1384                 return err;
1385
1386         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1387         cmd.resp_type = MMC_RSP_R1;
1388         cmd.cmdarg = 0;
1389
1390 retry_ssr:
1391         data.dest = (char *)ssr;
1392         data.blocksize = 64;
1393         data.blocks = 1;
1394         data.flags = MMC_DATA_READ;
1395
1396         err = mmc_send_cmd(mmc, &cmd, &data);
1397         if (err) {
1398                 if (timeout--)
1399                         goto retry_ssr;
1400
1401                 return err;
1402         }
1403
1404         for (i = 0; i < 16; i++)
1405                 ssr[i] = be32_to_cpu(ssr[i]);
1406
1407         au = (ssr[2] >> 12) & 0xF;
1408         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1409                 mmc->ssr.au = sd_au_size[au];
1410                 es = (ssr[3] >> 24) & 0xFF;
1411                 es |= (ssr[2] & 0xFF) << 8;
1412                 et = (ssr[3] >> 18) & 0x3F;
1413                 if (es && et) {
1414                         eo = (ssr[3] >> 16) & 0x3;
1415                         mmc->ssr.erase_timeout = (et * 1000) / es;
1416                         mmc->ssr.erase_offset = eo * 1000;
1417                 }
1418         } else {
1419                 debug("Invalid Allocation Unit Size.\n");
1420         }
1421
1422         return 0;
1423 }
1424
1425 /* frequency bases */
1426 /* divided by 10 to be nice to platforms without floating point */
1427 static const int fbase[] = {
1428         10000,
1429         100000,
1430         1000000,
1431         10000000,
1432 };
1433
1434 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1435  * to platforms without floating point.
1436  */
1437 static const u8 multipliers[] = {
1438         0,      /* reserved */
1439         10,
1440         12,
1441         13,
1442         15,
1443         20,
1444         25,
1445         30,
1446         35,
1447         40,
1448         45,
1449         50,
1450         55,
1451         60,
1452         70,
1453         80,
1454 };
1455
1456 static inline int bus_width(uint cap)
1457 {
1458         if (cap == MMC_MODE_8BIT)
1459                 return 8;
1460         if (cap == MMC_MODE_4BIT)
1461                 return 4;
1462         if (cap == MMC_MODE_1BIT)
1463                 return 1;
1464         pr_warn("invalid bus witdh capability 0x%x\n", cap);
1465         return 0;
1466 }
1467
1468 #if !CONFIG_IS_ENABLED(DM_MMC)
1469 #ifdef MMC_SUPPORTS_TUNING
1470 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1471 {
1472         return -ENOTSUPP;
1473 }
1474 #endif
1475
1476 static void mmc_send_init_stream(struct mmc *mmc)
1477 {
1478 }
1479
1480 static int mmc_set_ios(struct mmc *mmc)
1481 {
1482         int ret = 0;
1483
1484         if (mmc->cfg->ops->set_ios)
1485                 ret = mmc->cfg->ops->set_ios(mmc);
1486
1487         return ret;
1488 }
1489 #endif
1490
1491 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1492 {
1493         if (clock > mmc->cfg->f_max)
1494                 clock = mmc->cfg->f_max;
1495
1496         if (clock < mmc->cfg->f_min)
1497                 clock = mmc->cfg->f_min;
1498
1499         mmc->clock = clock;
1500         mmc->clk_disable = disable;
1501
1502         return mmc_set_ios(mmc);
1503 }
1504
1505 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1506 {
1507         mmc->bus_width = width;
1508
1509         return mmc_set_ios(mmc);
1510 }
1511
1512 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1513 /*
1514  * helper function to display the capabilities in a human
1515  * friendly manner. The capabilities include bus width and
1516  * supported modes.
1517  */
1518 void mmc_dump_capabilities(const char *text, uint caps)
1519 {
1520         enum bus_mode mode;
1521
1522         printf("%s: widths [", text);
1523         if (caps & MMC_MODE_8BIT)
1524                 printf("8, ");
1525         if (caps & MMC_MODE_4BIT)
1526                 printf("4, ");
1527         if (caps & MMC_MODE_1BIT)
1528                 printf("1, ");
1529         printf("\b\b] modes [");
1530         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1531                 if (MMC_CAP(mode) & caps)
1532                         printf("%s, ", mmc_mode_name(mode));
1533         printf("\b\b]\n");
1534 }
1535 #endif
1536
1537 struct mode_width_tuning {
1538         enum bus_mode mode;
1539         uint widths;
1540 #ifdef MMC_SUPPORTS_TUNING
1541         uint tuning;
1542 #endif
1543 };
1544
1545 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1546 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1547 {
1548         switch (voltage) {
1549         case MMC_SIGNAL_VOLTAGE_000: return 0;
1550         case MMC_SIGNAL_VOLTAGE_330: return 3300;
1551         case MMC_SIGNAL_VOLTAGE_180: return 1800;
1552         case MMC_SIGNAL_VOLTAGE_120: return 1200;
1553         }
1554         return -EINVAL;
1555 }
1556
1557 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1558 {
1559         int err;
1560
1561         if (mmc->signal_voltage == signal_voltage)
1562                 return 0;
1563
1564         mmc->signal_voltage = signal_voltage;
1565         err = mmc_set_ios(mmc);
1566         if (err)
1567                 debug("unable to set voltage (err %d)\n", err);
1568
1569         return err;
1570 }
1571 #else
1572 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1573 {
1574         return 0;
1575 }
1576 #endif
1577
1578 static const struct mode_width_tuning sd_modes_by_pref[] = {
1579 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1580 #ifdef MMC_SUPPORTS_TUNING
1581         {
1582                 .mode = UHS_SDR104,
1583                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1584                 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1585         },
1586 #endif
1587         {
1588                 .mode = UHS_SDR50,
1589                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1590         },
1591         {
1592                 .mode = UHS_DDR50,
1593                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1594         },
1595         {
1596                 .mode = UHS_SDR25,
1597                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1598         },
1599 #endif
1600         {
1601                 .mode = SD_HS,
1602                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1603         },
1604 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1605         {
1606                 .mode = UHS_SDR12,
1607                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1608         },
1609 #endif
1610         {
1611                 .mode = SD_LEGACY,
1612                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1613         }
1614 };
1615
1616 #define for_each_sd_mode_by_pref(caps, mwt) \
1617         for (mwt = sd_modes_by_pref;\
1618              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1619              mwt++) \
1620                 if (caps & MMC_CAP(mwt->mode))
1621
1622 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1623 {
1624         int err;
1625         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1626         const struct mode_width_tuning *mwt;
1627 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1628         bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1629 #else
1630         bool uhs_en = false;
1631 #endif
1632         uint caps;
1633
1634 #ifdef DEBUG
1635         mmc_dump_capabilities("sd card", card_caps);
1636         mmc_dump_capabilities("host", mmc->host_caps);
1637 #endif
1638
1639         /* Restrict card's capabilities by what the host can do */
1640         caps = card_caps & mmc->host_caps;
1641
1642         if (!uhs_en)
1643                 caps &= ~UHS_CAPS;
1644
1645         for_each_sd_mode_by_pref(caps, mwt) {
1646                 uint *w;
1647
1648                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1649                         if (*w & caps & mwt->widths) {
1650                                 debug("trying mode %s width %d (at %d MHz)\n",
1651                                       mmc_mode_name(mwt->mode),
1652                                       bus_width(*w),
1653                                       mmc_mode2freq(mmc, mwt->mode) / 1000000);
1654
1655                                 /* configure the bus width (card + host) */
1656                                 err = sd_select_bus_width(mmc, bus_width(*w));
1657                                 if (err)
1658                                         goto error;
1659                                 mmc_set_bus_width(mmc, bus_width(*w));
1660
1661                                 /* configure the bus mode (card) */
1662                                 err = sd_set_card_speed(mmc, mwt->mode);
1663                                 if (err)
1664                                         goto error;
1665
1666                                 /* configure the bus mode (host) */
1667                                 mmc_select_mode(mmc, mwt->mode);
1668                                 mmc_set_clock(mmc, mmc->tran_speed, false);
1669
1670 #ifdef MMC_SUPPORTS_TUNING
1671                                 /* execute tuning if needed */
1672                                 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1673                                         err = mmc_execute_tuning(mmc,
1674                                                                  mwt->tuning);
1675                                         if (err) {
1676                                                 debug("tuning failed\n");
1677                                                 goto error;
1678                                         }
1679                                 }
1680 #endif
1681
1682                                 err = sd_read_ssr(mmc);
1683                                 if (!err)
1684                                         return 0;
1685
1686                                 pr_warn("bad ssr\n");
1687
1688 error:
1689                                 /* revert to a safer bus speed */
1690                                 mmc_select_mode(mmc, SD_LEGACY);
1691                                 mmc_set_clock(mmc, mmc->tran_speed, false);
1692                         }
1693                 }
1694         }
1695
1696         printf("unable to select a mode\n");
1697         return -ENOTSUPP;
1698 }
1699
1700 /*
1701  * read the compare the part of ext csd that is constant.
1702  * This can be used to check that the transfer is working
1703  * as expected.
1704  */
1705 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1706 {
1707         int err;
1708         const u8 *ext_csd = mmc->ext_csd;
1709         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1710
1711         if (mmc->version < MMC_VERSION_4)
1712                 return 0;
1713
1714         err = mmc_send_ext_csd(mmc, test_csd);
1715         if (err)
1716                 return err;
1717
1718         /* Only compare read only fields */
1719         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1720                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1721             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1722                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1723             ext_csd[EXT_CSD_REV]
1724                 == test_csd[EXT_CSD_REV] &&
1725             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1726                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1727             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1728                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1729                 return 0;
1730
1731         return -EBADMSG;
1732 }
1733
1734 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1735 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1736                                   uint32_t allowed_mask)
1737 {
1738         u32 card_mask = 0;
1739
1740         switch (mode) {
1741         case MMC_HS_200:
1742                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V)
1743                         card_mask |= MMC_SIGNAL_VOLTAGE_180;
1744                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V)
1745                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1746                 break;
1747         case MMC_DDR_52:
1748                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1749                         card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1750                                      MMC_SIGNAL_VOLTAGE_180;
1751                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1752                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1753                 break;
1754         default:
1755                 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1756                 break;
1757         }
1758
1759         while (card_mask & allowed_mask) {
1760                 enum mmc_voltage best_match;
1761
1762                 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1763                 if (!mmc_set_signal_voltage(mmc,  best_match))
1764                         return 0;
1765
1766                 allowed_mask &= ~best_match;
1767         }
1768
1769         return -ENOTSUPP;
1770 }
1771 #else
1772 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1773                                          uint32_t allowed_mask)
1774 {
1775         return 0;
1776 }
1777 #endif
1778
1779 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1780 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1781         {
1782                 .mode = MMC_HS_200,
1783                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1784                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1785         },
1786 #endif
1787         {
1788                 .mode = MMC_DDR_52,
1789                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1790         },
1791         {
1792                 .mode = MMC_HS_52,
1793                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1794         },
1795         {
1796                 .mode = MMC_HS,
1797                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1798         },
1799         {
1800                 .mode = MMC_LEGACY,
1801                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1802         }
1803 };
1804
1805 #define for_each_mmc_mode_by_pref(caps, mwt) \
1806         for (mwt = mmc_modes_by_pref;\
1807             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1808             mwt++) \
1809                 if (caps & MMC_CAP(mwt->mode))
1810
1811 static const struct ext_csd_bus_width {
1812         uint cap;
1813         bool is_ddr;
1814         uint ext_csd_bits;
1815 } ext_csd_bus_width[] = {
1816         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1817         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1818         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1819         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1820         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1821 };
1822
1823 #define for_each_supported_width(caps, ddr, ecbv) \
1824         for (ecbv = ext_csd_bus_width;\
1825             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1826             ecbv++) \
1827                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1828
1829 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
1830 {
1831         int err;
1832         const struct mode_width_tuning *mwt;
1833         const struct ext_csd_bus_width *ecbw;
1834
1835 #ifdef DEBUG
1836         mmc_dump_capabilities("mmc", card_caps);
1837         mmc_dump_capabilities("host", mmc->host_caps);
1838 #endif
1839
1840         /* Restrict card's capabilities by what the host can do */
1841         card_caps &= mmc->host_caps;
1842
1843         /* Only version 4 of MMC supports wider bus widths */
1844         if (mmc->version < MMC_VERSION_4)
1845                 return 0;
1846
1847         if (!mmc->ext_csd) {
1848                 debug("No ext_csd found!\n"); /* this should enver happen */
1849                 return -ENOTSUPP;
1850         }
1851
1852         mmc_set_clock(mmc, mmc->legacy_speed, false);
1853
1854         for_each_mmc_mode_by_pref(card_caps, mwt) {
1855                 for_each_supported_width(card_caps & mwt->widths,
1856                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
1857                         enum mmc_voltage old_voltage;
1858                         debug("trying mode %s width %d (at %d MHz)\n",
1859                               mmc_mode_name(mwt->mode),
1860                               bus_width(ecbw->cap),
1861                               mmc_mode2freq(mmc, mwt->mode) / 1000000);
1862                         old_voltage = mmc->signal_voltage;
1863                         err = mmc_set_lowest_voltage(mmc, mwt->mode,
1864                                                      MMC_ALL_SIGNAL_VOLTAGE);
1865                         if (err)
1866                                 continue;
1867
1868                         /* configure the bus width (card + host) */
1869                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1870                                     EXT_CSD_BUS_WIDTH,
1871                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
1872                         if (err)
1873                                 goto error;
1874                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
1875
1876                         /* configure the bus speed (card) */
1877                         err = mmc_set_card_speed(mmc, mwt->mode);
1878                         if (err)
1879                                 goto error;
1880
1881                         /*
1882                          * configure the bus width AND the ddr mode (card)
1883                          * The host side will be taken care of in the next step
1884                          */
1885                         if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
1886                                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1887                                                  EXT_CSD_BUS_WIDTH,
1888                                                  ecbw->ext_csd_bits);
1889                                 if (err)
1890                                         goto error;
1891                         }
1892
1893                         /* configure the bus mode (host) */
1894                         mmc_select_mode(mmc, mwt->mode);
1895                         mmc_set_clock(mmc, mmc->tran_speed, false);
1896 #ifdef MMC_SUPPORTS_TUNING
1897
1898                         /* execute tuning if needed */
1899                         if (mwt->tuning) {
1900                                 err = mmc_execute_tuning(mmc, mwt->tuning);
1901                                 if (err) {
1902                                         debug("tuning failed\n");
1903                                         goto error;
1904                                 }
1905                         }
1906 #endif
1907
1908                         /* do a transfer to check the configuration */
1909                         err = mmc_read_and_compare_ext_csd(mmc);
1910                         if (!err)
1911                                 return 0;
1912 error:
1913                         mmc_set_signal_voltage(mmc, old_voltage);
1914                         /* if an error occured, revert to a safer bus mode */
1915                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1916                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
1917                         mmc_select_mode(mmc, MMC_LEGACY);
1918                         mmc_set_bus_width(mmc, 1);
1919                 }
1920         }
1921
1922         pr_err("unable to select a mode\n");
1923
1924         return -ENOTSUPP;
1925 }
1926
1927 static int mmc_startup_v4(struct mmc *mmc)
1928 {
1929         int err, i;
1930         u64 capacity;
1931         bool has_parts = false;
1932         bool part_completed;
1933         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1934
1935         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
1936                 return 0;
1937
1938         /* check  ext_csd version and capacity */
1939         err = mmc_send_ext_csd(mmc, ext_csd);
1940         if (err)
1941                 goto error;
1942
1943         /* store the ext csd for future reference */
1944         if (!mmc->ext_csd)
1945                 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
1946         if (!mmc->ext_csd)
1947                 return -ENOMEM;
1948         memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
1949
1950         if (ext_csd[EXT_CSD_REV] >= 2) {
1951                 /*
1952                  * According to the JEDEC Standard, the value of
1953                  * ext_csd's capacity is valid if the value is more
1954                  * than 2GB
1955                  */
1956                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1957                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1958                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1959                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1960                 capacity *= MMC_MAX_BLOCK_LEN;
1961                 if ((capacity >> 20) > 2 * 1024)
1962                         mmc->capacity_user = capacity;
1963         }
1964
1965         switch (ext_csd[EXT_CSD_REV]) {
1966         case 1:
1967                 mmc->version = MMC_VERSION_4_1;
1968                 break;
1969         case 2:
1970                 mmc->version = MMC_VERSION_4_2;
1971                 break;
1972         case 3:
1973                 mmc->version = MMC_VERSION_4_3;
1974                 break;
1975         case 5:
1976                 mmc->version = MMC_VERSION_4_41;
1977                 break;
1978         case 6:
1979                 mmc->version = MMC_VERSION_4_5;
1980                 break;
1981         case 7:
1982                 mmc->version = MMC_VERSION_5_0;
1983                 break;
1984         case 8:
1985                 mmc->version = MMC_VERSION_5_1;
1986                 break;
1987         }
1988
1989         /* The partition data may be non-zero but it is only
1990          * effective if PARTITION_SETTING_COMPLETED is set in
1991          * EXT_CSD, so ignore any data if this bit is not set,
1992          * except for enabling the high-capacity group size
1993          * definition (see below).
1994          */
1995         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1996                             EXT_CSD_PARTITION_SETTING_COMPLETED);
1997
1998         /* store the partition info of emmc */
1999         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2000         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2001             ext_csd[EXT_CSD_BOOT_MULT])
2002                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2003         if (part_completed &&
2004             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2005                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2006
2007         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2008
2009         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2010
2011         for (i = 0; i < 4; i++) {
2012                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2013                 uint mult = (ext_csd[idx + 2] << 16) +
2014                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
2015                 if (mult)
2016                         has_parts = true;
2017                 if (!part_completed)
2018                         continue;
2019                 mmc->capacity_gp[i] = mult;
2020                 mmc->capacity_gp[i] *=
2021                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2022                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2023                 mmc->capacity_gp[i] <<= 19;
2024         }
2025
2026         if (part_completed) {
2027                 mmc->enh_user_size =
2028                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2029                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2030                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
2031                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2032                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2033                 mmc->enh_user_size <<= 19;
2034                 mmc->enh_user_start =
2035                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2036                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2037                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2038                         ext_csd[EXT_CSD_ENH_START_ADDR];
2039                 if (mmc->high_capacity)
2040                         mmc->enh_user_start <<= 9;
2041         }
2042
2043         /*
2044          * Host needs to enable ERASE_GRP_DEF bit if device is
2045          * partitioned. This bit will be lost every time after a reset
2046          * or power off. This will affect erase size.
2047          */
2048         if (part_completed)
2049                 has_parts = true;
2050         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2051             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2052                 has_parts = true;
2053         if (has_parts) {
2054                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2055                                  EXT_CSD_ERASE_GROUP_DEF, 1);
2056
2057                 if (err)
2058                         goto error;
2059
2060                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2061         }
2062
2063         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2064                 /* Read out group size from ext_csd */
2065                 mmc->erase_grp_size =
2066                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2067                 /*
2068                  * if high capacity and partition setting completed
2069                  * SEC_COUNT is valid even if it is smaller than 2 GiB
2070                  * JEDEC Standard JESD84-B45, 6.2.4
2071                  */
2072                 if (mmc->high_capacity && part_completed) {
2073                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2074                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2075                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2076                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2077                         capacity *= MMC_MAX_BLOCK_LEN;
2078                         mmc->capacity_user = capacity;
2079                 }
2080         } else {
2081                 /* Calculate the group size from the csd value. */
2082                 int erase_gsz, erase_gmul;
2083
2084                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2085                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2086                 mmc->erase_grp_size = (erase_gsz + 1)
2087                         * (erase_gmul + 1);
2088         }
2089
2090         mmc->hc_wp_grp_size = 1024
2091                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2092                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2093
2094         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2095
2096         return 0;
2097 error:
2098         if (mmc->ext_csd) {
2099                 free(mmc->ext_csd);
2100                 mmc->ext_csd = NULL;
2101         }
2102         return err;
2103 }
2104
2105 static int mmc_startup(struct mmc *mmc)
2106 {
2107         int err, i;
2108         uint mult, freq;
2109         u64 cmult, csize;
2110         struct mmc_cmd cmd;
2111         struct blk_desc *bdesc;
2112
2113 #ifdef CONFIG_MMC_SPI_CRC_ON
2114         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2115                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2116                 cmd.resp_type = MMC_RSP_R1;
2117                 cmd.cmdarg = 1;
2118                 err = mmc_send_cmd(mmc, &cmd, NULL);
2119                 if (err)
2120                         return err;
2121         }
2122 #endif
2123
2124         /* Put the Card in Identify Mode */
2125         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2126                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2127         cmd.resp_type = MMC_RSP_R2;
2128         cmd.cmdarg = 0;
2129
2130         err = mmc_send_cmd(mmc, &cmd, NULL);
2131
2132 #ifdef CONFIG_MMC_QUIRKS
2133         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2134                 int retries = 4;
2135                 /*
2136                  * It has been seen that SEND_CID may fail on the first
2137                  * attempt, let's try a few more time
2138                  */
2139                 do {
2140                         err = mmc_send_cmd(mmc, &cmd, NULL);
2141                         if (!err)
2142                                 break;
2143                 } while (retries--);
2144         }
2145 #endif
2146
2147         if (err)
2148                 return err;
2149
2150         memcpy(mmc->cid, cmd.response, 16);
2151
2152         /*
2153          * For MMC cards, set the Relative Address.
2154          * For SD cards, get the Relatvie Address.
2155          * This also puts the cards into Standby State
2156          */
2157         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2158                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2159                 cmd.cmdarg = mmc->rca << 16;
2160                 cmd.resp_type = MMC_RSP_R6;
2161
2162                 err = mmc_send_cmd(mmc, &cmd, NULL);
2163
2164                 if (err)
2165                         return err;
2166
2167                 if (IS_SD(mmc))
2168                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2169         }
2170
2171         /* Get the Card-Specific Data */
2172         cmd.cmdidx = MMC_CMD_SEND_CSD;
2173         cmd.resp_type = MMC_RSP_R2;
2174         cmd.cmdarg = mmc->rca << 16;
2175
2176         err = mmc_send_cmd(mmc, &cmd, NULL);
2177
2178         if (err)
2179                 return err;
2180
2181         mmc->csd[0] = cmd.response[0];
2182         mmc->csd[1] = cmd.response[1];
2183         mmc->csd[2] = cmd.response[2];
2184         mmc->csd[3] = cmd.response[3];
2185
2186         if (mmc->version == MMC_VERSION_UNKNOWN) {
2187                 int version = (cmd.response[0] >> 26) & 0xf;
2188
2189                 switch (version) {
2190                 case 0:
2191                         mmc->version = MMC_VERSION_1_2;
2192                         break;
2193                 case 1:
2194                         mmc->version = MMC_VERSION_1_4;
2195                         break;
2196                 case 2:
2197                         mmc->version = MMC_VERSION_2_2;
2198                         break;
2199                 case 3:
2200                         mmc->version = MMC_VERSION_3;
2201                         break;
2202                 case 4:
2203                         mmc->version = MMC_VERSION_4;
2204                         break;
2205                 default:
2206                         mmc->version = MMC_VERSION_1_2;
2207                         break;
2208                 }
2209         }
2210
2211         /* divide frequency by 10, since the mults are 10x bigger */
2212         freq = fbase[(cmd.response[0] & 0x7)];
2213         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2214
2215         mmc->legacy_speed = freq * mult;
2216         mmc_select_mode(mmc, MMC_LEGACY);
2217
2218         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2219         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2220
2221         if (IS_SD(mmc))
2222                 mmc->write_bl_len = mmc->read_bl_len;
2223         else
2224                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2225
2226         if (mmc->high_capacity) {
2227                 csize = (mmc->csd[1] & 0x3f) << 16
2228                         | (mmc->csd[2] & 0xffff0000) >> 16;
2229                 cmult = 8;
2230         } else {
2231                 csize = (mmc->csd[1] & 0x3ff) << 2
2232                         | (mmc->csd[2] & 0xc0000000) >> 30;
2233                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2234         }
2235
2236         mmc->capacity_user = (csize + 1) << (cmult + 2);
2237         mmc->capacity_user *= mmc->read_bl_len;
2238         mmc->capacity_boot = 0;
2239         mmc->capacity_rpmb = 0;
2240         for (i = 0; i < 4; i++)
2241                 mmc->capacity_gp[i] = 0;
2242
2243         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2244                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2245
2246         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2247                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2248
2249         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2250                 cmd.cmdidx = MMC_CMD_SET_DSR;
2251                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2252                 cmd.resp_type = MMC_RSP_NONE;
2253                 if (mmc_send_cmd(mmc, &cmd, NULL))
2254                         pr_warn("MMC: SET_DSR failed\n");
2255         }
2256
2257         /* Select the card, and put it into Transfer Mode */
2258         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2259                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2260                 cmd.resp_type = MMC_RSP_R1;
2261                 cmd.cmdarg = mmc->rca << 16;
2262                 err = mmc_send_cmd(mmc, &cmd, NULL);
2263
2264                 if (err)
2265                         return err;
2266         }
2267
2268         /*
2269          * For SD, its erase group is always one sector
2270          */
2271         mmc->erase_grp_size = 1;
2272         mmc->part_config = MMCPART_NOAVAILABLE;
2273
2274         err = mmc_startup_v4(mmc);
2275         if (err)
2276                 return err;
2277
2278         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2279         if (err)
2280                 return err;
2281
2282         if (IS_SD(mmc)) {
2283                 err = sd_get_capabilities(mmc);
2284                 if (err)
2285                         return err;
2286                 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2287         } else {
2288                 err = mmc_get_capabilities(mmc);
2289                 if (err)
2290                         return err;
2291                 mmc_select_mode_and_width(mmc, mmc->card_caps);
2292         }
2293
2294         if (err)
2295                 return err;
2296
2297         mmc->best_mode = mmc->selected_mode;
2298
2299         /* Fix the block length for DDR mode */
2300         if (mmc->ddr_mode) {
2301                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2302                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2303         }
2304
2305         /* fill in device description */
2306         bdesc = mmc_get_blk_desc(mmc);
2307         bdesc->lun = 0;
2308         bdesc->hwpart = 0;
2309         bdesc->type = 0;
2310         bdesc->blksz = mmc->read_bl_len;
2311         bdesc->log2blksz = LOG2(bdesc->blksz);
2312         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2313 #if !defined(CONFIG_SPL_BUILD) || \
2314                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2315                 !defined(CONFIG_USE_TINY_PRINTF))
2316         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2317                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2318                 (mmc->cid[3] >> 16) & 0xffff);
2319         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2320                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2321                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2322                 (mmc->cid[2] >> 24) & 0xff);
2323         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2324                 (mmc->cid[2] >> 16) & 0xf);
2325 #else
2326         bdesc->vendor[0] = 0;
2327         bdesc->product[0] = 0;
2328         bdesc->revision[0] = 0;
2329 #endif
2330 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
2331         part_init(bdesc);
2332 #endif
2333
2334         return 0;
2335 }
2336
2337 static int mmc_send_if_cond(struct mmc *mmc)
2338 {
2339         struct mmc_cmd cmd;
2340         int err;
2341
2342         cmd.cmdidx = SD_CMD_SEND_IF_COND;
2343         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2344         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2345         cmd.resp_type = MMC_RSP_R7;
2346
2347         err = mmc_send_cmd(mmc, &cmd, NULL);
2348
2349         if (err)
2350                 return err;
2351
2352         if ((cmd.response[0] & 0xff) != 0xaa)
2353                 return -EOPNOTSUPP;
2354         else
2355                 mmc->version = SD_VERSION_2;
2356
2357         return 0;
2358 }
2359
2360 #if !CONFIG_IS_ENABLED(DM_MMC)
2361 /* board-specific MMC power initializations. */
2362 __weak void board_mmc_power_init(void)
2363 {
2364 }
2365 #endif
2366
2367 static int mmc_power_init(struct mmc *mmc)
2368 {
2369 #if CONFIG_IS_ENABLED(DM_MMC)
2370 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2371         int ret;
2372
2373         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2374                                           &mmc->vmmc_supply);
2375         if (ret)
2376                 debug("%s: No vmmc supply\n", mmc->dev->name);
2377
2378         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2379                                           &mmc->vqmmc_supply);
2380         if (ret)
2381                 debug("%s: No vqmmc supply\n", mmc->dev->name);
2382 #endif
2383 #else /* !CONFIG_DM_MMC */
2384         /*
2385          * Driver model should use a regulator, as above, rather than calling
2386          * out to board code.
2387          */
2388         board_mmc_power_init();
2389 #endif
2390         return 0;
2391 }
2392
2393 /*
2394  * put the host in the initial state:
2395  * - turn on Vdd (card power supply)
2396  * - configure the bus width and clock to minimal values
2397  */
2398 static void mmc_set_initial_state(struct mmc *mmc)
2399 {
2400         int err;
2401
2402         /* First try to set 3.3V. If it fails set to 1.8V */
2403         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2404         if (err != 0)
2405                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2406         if (err != 0)
2407                 pr_warn("mmc: failed to set signal voltage\n");
2408
2409         mmc_select_mode(mmc, MMC_LEGACY);
2410         mmc_set_bus_width(mmc, 1);
2411         mmc_set_clock(mmc, 0, false);
2412 }
2413
2414 static int mmc_power_on(struct mmc *mmc)
2415 {
2416 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2417         if (mmc->vmmc_supply) {
2418                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2419
2420                 if (ret) {
2421                         puts("Error enabling VMMC supply\n");
2422                         return ret;
2423                 }
2424         }
2425 #endif
2426         return 0;
2427 }
2428
2429 static int mmc_power_off(struct mmc *mmc)
2430 {
2431         mmc_set_clock(mmc, 1, true);
2432 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2433         if (mmc->vmmc_supply) {
2434                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2435
2436                 if (ret) {
2437                         debug("Error disabling VMMC supply\n");
2438                         return ret;
2439                 }
2440         }
2441 #endif
2442         return 0;
2443 }
2444
2445 static int mmc_power_cycle(struct mmc *mmc)
2446 {
2447         int ret;
2448
2449         ret = mmc_power_off(mmc);
2450         if (ret)
2451                 return ret;
2452         /*
2453          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2454          * to be on the safer side.
2455          */
2456         udelay(2000);
2457         return mmc_power_on(mmc);
2458 }
2459
2460 int mmc_start_init(struct mmc *mmc)
2461 {
2462         bool no_card;
2463         bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2464         int err;
2465
2466         /*
2467          * all hosts are capable of 1 bit bus-width and able to use the legacy
2468          * timings.
2469          */
2470         mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) |
2471                          MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2472
2473         /* we pretend there's no card when init is NULL */
2474         no_card = mmc_getcd(mmc) == 0;
2475 #if !CONFIG_IS_ENABLED(DM_MMC)
2476         no_card = no_card || (mmc->cfg->ops->init == NULL);
2477 #endif
2478         if (no_card) {
2479                 mmc->has_init = 0;
2480 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2481                 printf("MMC: no card present\n");
2482 #endif
2483                 return -ENOMEDIUM;
2484         }
2485
2486         if (mmc->has_init)
2487                 return 0;
2488
2489 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2490         mmc_adapter_card_type_ident();
2491 #endif
2492         err = mmc_power_init(mmc);
2493         if (err)
2494                 return err;
2495
2496 #ifdef CONFIG_MMC_QUIRKS
2497         mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2498                       MMC_QUIRK_RETRY_SEND_CID;
2499 #endif
2500
2501         err = mmc_power_cycle(mmc);
2502         if (err) {
2503                 /*
2504                  * if power cycling is not supported, we should not try
2505                  * to use the UHS modes, because we wouldn't be able to
2506                  * recover from an error during the UHS initialization.
2507                  */
2508                 debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2509                 uhs_en = false;
2510                 mmc->host_caps &= ~UHS_CAPS;
2511                 err = mmc_power_on(mmc);
2512         }
2513         if (err)
2514                 return err;
2515
2516 #if CONFIG_IS_ENABLED(DM_MMC)
2517         /* The device has already been probed ready for use */
2518 #else
2519         /* made sure it's not NULL earlier */
2520         err = mmc->cfg->ops->init(mmc);
2521         if (err)
2522                 return err;
2523 #endif
2524         mmc->ddr_mode = 0;
2525
2526 retry:
2527         mmc_set_initial_state(mmc);
2528         mmc_send_init_stream(mmc);
2529
2530         /* Reset the Card */
2531         err = mmc_go_idle(mmc);
2532
2533         if (err)
2534                 return err;
2535
2536         /* The internal partition reset to user partition(0) at every CMD0*/
2537         mmc_get_blk_desc(mmc)->hwpart = 0;
2538
2539         /* Test for SD version 2 */
2540         err = mmc_send_if_cond(mmc);
2541
2542         /* Now try to get the SD card's operating condition */
2543         err = sd_send_op_cond(mmc, uhs_en);
2544         if (err && uhs_en) {
2545                 uhs_en = false;
2546                 mmc_power_cycle(mmc);
2547                 goto retry;
2548         }
2549
2550         /* If the command timed out, we check for an MMC card */
2551         if (err == -ETIMEDOUT) {
2552                 err = mmc_send_op_cond(mmc);
2553
2554                 if (err) {
2555 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2556                         pr_err("Card did not respond to voltage select!\n");
2557 #endif
2558                         return -EOPNOTSUPP;
2559                 }
2560         }
2561
2562         if (!err)
2563                 mmc->init_in_progress = 1;
2564
2565         return err;
2566 }
2567
2568 static int mmc_complete_init(struct mmc *mmc)
2569 {
2570         int err = 0;
2571
2572         mmc->init_in_progress = 0;
2573         if (mmc->op_cond_pending)
2574                 err = mmc_complete_op_cond(mmc);
2575
2576         if (!err)
2577                 err = mmc_startup(mmc);
2578         if (err)
2579                 mmc->has_init = 0;
2580         else
2581                 mmc->has_init = 1;
2582         return err;
2583 }
2584
2585 int mmc_init(struct mmc *mmc)
2586 {
2587         int err = 0;
2588         __maybe_unused unsigned start;
2589 #if CONFIG_IS_ENABLED(DM_MMC)
2590         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2591
2592         upriv->mmc = mmc;
2593 #endif
2594         if (mmc->has_init)
2595                 return 0;
2596
2597         start = get_timer(0);
2598
2599         if (!mmc->init_in_progress)
2600                 err = mmc_start_init(mmc);
2601
2602         if (!err)
2603                 err = mmc_complete_init(mmc);
2604         if (err)
2605                 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
2606
2607         return err;
2608 }
2609
2610 int mmc_set_dsr(struct mmc *mmc, u16 val)
2611 {
2612         mmc->dsr = val;
2613         return 0;
2614 }
2615
2616 /* CPU-specific MMC initializations */
2617 __weak int cpu_mmc_init(bd_t *bis)
2618 {
2619         return -1;
2620 }
2621
2622 /* board-specific MMC initializations. */
2623 __weak int board_mmc_init(bd_t *bis)
2624 {
2625         return -1;
2626 }
2627
2628 void mmc_set_preinit(struct mmc *mmc, int preinit)
2629 {
2630         mmc->preinit = preinit;
2631 }
2632
2633 #if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
2634 static int mmc_probe(bd_t *bis)
2635 {
2636         return 0;
2637 }
2638 #elif CONFIG_IS_ENABLED(DM_MMC)
2639 static int mmc_probe(bd_t *bis)
2640 {
2641         int ret, i;
2642         struct uclass *uc;
2643         struct udevice *dev;
2644
2645         ret = uclass_get(UCLASS_MMC, &uc);
2646         if (ret)
2647                 return ret;
2648
2649         /*
2650          * Try to add them in sequence order. Really with driver model we
2651          * should allow holes, but the current MMC list does not allow that.
2652          * So if we request 0, 1, 3 we will get 0, 1, 2.
2653          */
2654         for (i = 0; ; i++) {
2655                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2656                 if (ret == -ENODEV)
2657                         break;
2658         }
2659         uclass_foreach_dev(dev, uc) {
2660                 ret = device_probe(dev);
2661                 if (ret)
2662                         pr_err("%s - probe failed: %d\n", dev->name, ret);
2663         }
2664
2665         return 0;
2666 }
2667 #else
2668 static int mmc_probe(bd_t *bis)
2669 {
2670         if (board_mmc_init(bis) < 0)
2671                 cpu_mmc_init(bis);
2672
2673         return 0;
2674 }
2675 #endif
2676
2677 int mmc_initialize(bd_t *bis)
2678 {
2679         static int initialized = 0;
2680         int ret;
2681         if (initialized)        /* Avoid initializing mmc multiple times */
2682                 return 0;
2683         initialized = 1;
2684
2685 #if !CONFIG_IS_ENABLED(BLK)
2686 #if !CONFIG_IS_ENABLED(MMC_TINY)
2687         mmc_list_init();
2688 #endif
2689 #endif
2690         ret = mmc_probe(bis);
2691         if (ret)
2692                 return ret;
2693
2694 #ifndef CONFIG_SPL_BUILD
2695         print_mmc_devices(',');
2696 #endif
2697
2698         mmc_do_preinit();
2699         return 0;
2700 }
2701
2702 #ifdef CONFIG_CMD_BKOPS_ENABLE
2703 int mmc_set_bkops_enable(struct mmc *mmc)
2704 {
2705         int err;
2706         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2707
2708         err = mmc_send_ext_csd(mmc, ext_csd);
2709         if (err) {
2710                 puts("Could not get ext_csd register values\n");
2711                 return err;
2712         }
2713
2714         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2715                 puts("Background operations not supported on device\n");
2716                 return -EMEDIUMTYPE;
2717         }
2718
2719         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2720                 puts("Background operations already enabled\n");
2721                 return 0;
2722         }
2723
2724         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2725         if (err) {
2726                 puts("Failed to enable manual background operations\n");
2727                 return err;
2728         }
2729
2730         puts("Enabled manual background operations\n");
2731
2732         return 0;
2733 }
2734 #endif