2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <dm/device-internal.h>
20 #include <linux/list.h>
22 #include "mmc_private.h"
24 static struct list_head mmc_devices;
25 static int cur_dev_num = -1;
27 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
29 return &mmc->block_dev;
32 __weak int board_mmc_getwp(struct mmc *mmc)
37 int mmc_getwp(struct mmc *mmc)
41 wp = board_mmc_getwp(mmc);
44 if (mmc->cfg->ops->getwp)
45 wp = mmc->cfg->ops->getwp(mmc);
53 __weak int board_mmc_getcd(struct mmc *mmc)
58 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
62 #ifdef CONFIG_MMC_TRACE
66 printf("CMD_SEND:%d\n", cmd->cmdidx);
67 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
68 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
70 printf("\t\tRET\t\t\t %d\n", ret);
72 switch (cmd->resp_type) {
74 printf("\t\tMMC_RSP_NONE\n");
77 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
81 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
85 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
87 printf("\t\t \t\t 0x%08X \n",
89 printf("\t\t \t\t 0x%08X \n",
91 printf("\t\t \t\t 0x%08X \n",
94 printf("\t\t\t\t\tDUMPING DATA\n");
95 for (i = 0; i < 4; i++) {
97 printf("\t\t\t\t\t%03d - ", i*4);
98 ptr = (u8 *)&cmd->response[i];
100 for (j = 0; j < 4; j++)
101 printf("%02X ", *ptr--);
106 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
110 printf("\t\tERROR MMC rsp not supported\n");
115 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
120 int mmc_send_status(struct mmc *mmc, int timeout)
123 int err, retries = 5;
124 #ifdef CONFIG_MMC_TRACE
128 cmd.cmdidx = MMC_CMD_SEND_STATUS;
129 cmd.resp_type = MMC_RSP_R1;
130 if (!mmc_host_is_spi(mmc))
131 cmd.cmdarg = mmc->rca << 16;
134 err = mmc_send_cmd(mmc, &cmd, NULL);
136 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
137 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
140 else if (cmd.response[0] & MMC_STATUS_MASK) {
141 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
142 printf("Status Error: 0x%08X\n",
147 } else if (--retries < 0)
156 #ifdef CONFIG_MMC_TRACE
157 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
158 printf("CURR STATE:%d\n", status);
161 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
162 printf("Timeout waiting card ready\n");
166 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
172 int mmc_set_blocklen(struct mmc *mmc, int len)
179 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
180 cmd.resp_type = MMC_RSP_R1;
183 return mmc_send_cmd(mmc, &cmd, NULL);
186 struct mmc *find_mmc_device(int dev_num)
189 struct list_head *entry;
191 list_for_each(entry, &mmc_devices) {
192 m = list_entry(entry, struct mmc, link);
194 if (m->block_dev.devnum == dev_num)
198 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
199 printf("MMC Device %d not found\n", dev_num);
205 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
209 struct mmc_data data;
212 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
214 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
216 if (mmc->high_capacity)
219 cmd.cmdarg = start * mmc->read_bl_len;
221 cmd.resp_type = MMC_RSP_R1;
224 data.blocks = blkcnt;
225 data.blocksize = mmc->read_bl_len;
226 data.flags = MMC_DATA_READ;
228 if (mmc_send_cmd(mmc, &cmd, &data))
232 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
234 cmd.resp_type = MMC_RSP_R1b;
235 if (mmc_send_cmd(mmc, &cmd, NULL)) {
236 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
237 printf("mmc fail to send stop cmd\n");
246 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
247 lbaint_t blkcnt, void *dst)
249 int dev_num = block_dev->devnum;
251 lbaint_t cur, blocks_todo = blkcnt;
256 struct mmc *mmc = find_mmc_device(dev_num);
260 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
264 if ((start + blkcnt) > mmc->block_dev.lba) {
265 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
266 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
267 start + blkcnt, mmc->block_dev.lba);
272 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
273 debug("%s: Failed to set blocklen\n", __func__);
278 cur = (blocks_todo > mmc->cfg->b_max) ?
279 mmc->cfg->b_max : blocks_todo;
280 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
281 debug("%s: Failed to read blocks\n", __func__);
286 dst += cur * mmc->read_bl_len;
287 } while (blocks_todo > 0);
292 static int mmc_go_idle(struct mmc *mmc)
299 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
301 cmd.resp_type = MMC_RSP_NONE;
303 err = mmc_send_cmd(mmc, &cmd, NULL);
313 static int sd_send_op_cond(struct mmc *mmc)
320 cmd.cmdidx = MMC_CMD_APP_CMD;
321 cmd.resp_type = MMC_RSP_R1;
324 err = mmc_send_cmd(mmc, &cmd, NULL);
329 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
330 cmd.resp_type = MMC_RSP_R3;
333 * Most cards do not answer if some reserved bits
334 * in the ocr are set. However, Some controller
335 * can set bit 7 (reserved for low voltages), but
336 * how to manage low voltages SD card is not yet
339 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
340 (mmc->cfg->voltages & 0xff8000);
342 if (mmc->version == SD_VERSION_2)
343 cmd.cmdarg |= OCR_HCS;
345 err = mmc_send_cmd(mmc, &cmd, NULL);
350 if (cmd.response[0] & OCR_BUSY)
359 if (mmc->version != SD_VERSION_2)
360 mmc->version = SD_VERSION_1_0;
362 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
363 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
364 cmd.resp_type = MMC_RSP_R3;
367 err = mmc_send_cmd(mmc, &cmd, NULL);
373 mmc->ocr = cmd.response[0];
375 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
381 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
386 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
387 cmd.resp_type = MMC_RSP_R3;
389 if (use_arg && !mmc_host_is_spi(mmc))
390 cmd.cmdarg = OCR_HCS |
391 (mmc->cfg->voltages &
392 (mmc->ocr & OCR_VOLTAGE_MASK)) |
393 (mmc->ocr & OCR_ACCESS_MODE);
395 err = mmc_send_cmd(mmc, &cmd, NULL);
398 mmc->ocr = cmd.response[0];
402 static int mmc_send_op_cond(struct mmc *mmc)
406 /* Some cards seem to need this */
409 /* Asking to the card its capabilities */
410 for (i = 0; i < 2; i++) {
411 err = mmc_send_op_cond_iter(mmc, i != 0);
415 /* exit if not busy (flag seems to be inverted) */
416 if (mmc->ocr & OCR_BUSY)
419 mmc->op_cond_pending = 1;
423 static int mmc_complete_op_cond(struct mmc *mmc)
430 mmc->op_cond_pending = 0;
431 if (!(mmc->ocr & OCR_BUSY)) {
432 start = get_timer(0);
434 err = mmc_send_op_cond_iter(mmc, 1);
437 if (mmc->ocr & OCR_BUSY)
439 if (get_timer(start) > timeout)
445 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
446 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
447 cmd.resp_type = MMC_RSP_R3;
450 err = mmc_send_cmd(mmc, &cmd, NULL);
455 mmc->ocr = cmd.response[0];
458 mmc->version = MMC_VERSION_UNKNOWN;
460 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
467 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
470 struct mmc_data data;
473 /* Get the Card Status Register */
474 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
475 cmd.resp_type = MMC_RSP_R1;
478 data.dest = (char *)ext_csd;
480 data.blocksize = MMC_MAX_BLOCK_LEN;
481 data.flags = MMC_DATA_READ;
483 err = mmc_send_cmd(mmc, &cmd, &data);
489 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
495 cmd.cmdidx = MMC_CMD_SWITCH;
496 cmd.resp_type = MMC_RSP_R1b;
497 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
501 ret = mmc_send_cmd(mmc, &cmd, NULL);
503 /* Waiting for the ready status */
505 ret = mmc_send_status(mmc, timeout);
511 static int mmc_change_freq(struct mmc *mmc)
513 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
519 if (mmc_host_is_spi(mmc))
522 /* Only version 4 supports high-speed */
523 if (mmc->version < MMC_VERSION_4)
526 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
528 err = mmc_send_ext_csd(mmc, ext_csd);
533 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
535 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
538 return err == SWITCH_ERR ? 0 : err;
540 /* Now check to see that it worked */
541 err = mmc_send_ext_csd(mmc, ext_csd);
546 /* No high-speed support */
547 if (!ext_csd[EXT_CSD_HS_TIMING])
550 /* High Speed is set, there are two types: 52MHz and 26MHz */
551 if (cardtype & EXT_CSD_CARD_TYPE_52) {
552 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
553 mmc->card_caps |= MMC_MODE_DDR_52MHz;
554 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
556 mmc->card_caps |= MMC_MODE_HS;
562 static int mmc_set_capacity(struct mmc *mmc, int part_num)
566 mmc->capacity = mmc->capacity_user;
570 mmc->capacity = mmc->capacity_boot;
573 mmc->capacity = mmc->capacity_rpmb;
579 mmc->capacity = mmc->capacity_gp[part_num - 4];
585 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
590 int mmc_switch_part(int dev_num, unsigned int part_num)
592 struct mmc *mmc = find_mmc_device(dev_num);
598 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
599 (mmc->part_config & ~PART_ACCESS_MASK)
600 | (part_num & PART_ACCESS_MASK));
603 * Set the capacity if the switch succeeded or was intended
604 * to return to representing the raw device.
606 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
607 ret = mmc_set_capacity(mmc, part_num);
608 mmc->block_dev.hwpart = part_num;
614 static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
616 struct mmc *mmc = find_mmc_device(desc->devnum);
622 if (mmc->block_dev.hwpart == hwpart)
625 if (mmc->part_config == MMCPART_NOAVAILABLE)
628 ret = mmc_switch_part(desc->devnum, hwpart);
635 int mmc_select_hwpart(int dev_num, int hwpart)
637 struct mmc *mmc = find_mmc_device(dev_num);
643 if (mmc->block_dev.hwpart == hwpart)
646 if (mmc->part_config == MMCPART_NOAVAILABLE)
649 ret = mmc_switch_part(dev_num, hwpart);
656 int mmc_hwpart_config(struct mmc *mmc,
657 const struct mmc_hwpart_conf *conf,
658 enum mmc_hwpart_conf_mode mode)
664 u32 max_enh_size_mult;
665 u32 tot_enh_size_mult = 0;
668 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
670 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
673 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
674 printf("eMMC >= 4.4 required for enhanced user data area\n");
678 if (!(mmc->part_support & PART_SUPPORT)) {
679 printf("Card does not support partitioning\n");
683 if (!mmc->hc_wp_grp_size) {
684 printf("Card does not define HC WP group size\n");
688 /* check partition alignment and total enhanced size */
689 if (conf->user.enh_size) {
690 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
691 conf->user.enh_start % mmc->hc_wp_grp_size) {
692 printf("User data enhanced area not HC WP group "
696 part_attrs |= EXT_CSD_ENH_USR;
697 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
698 if (mmc->high_capacity) {
699 enh_start_addr = conf->user.enh_start;
701 enh_start_addr = (conf->user.enh_start << 9);
707 tot_enh_size_mult += enh_size_mult;
709 for (pidx = 0; pidx < 4; pidx++) {
710 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
711 printf("GP%i partition not HC WP group size "
712 "aligned\n", pidx+1);
715 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
716 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
717 part_attrs |= EXT_CSD_ENH_GP(pidx);
718 tot_enh_size_mult += gp_size_mult[pidx];
722 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
723 printf("Card does not support enhanced attribute\n");
727 err = mmc_send_ext_csd(mmc, ext_csd);
732 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
733 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
734 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
735 if (tot_enh_size_mult > max_enh_size_mult) {
736 printf("Total enhanced size exceeds maximum (%u > %u)\n",
737 tot_enh_size_mult, max_enh_size_mult);
741 /* The default value of EXT_CSD_WR_REL_SET is device
742 * dependent, the values can only be changed if the
743 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
744 * changed only once and before partitioning is completed. */
745 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
746 if (conf->user.wr_rel_change) {
747 if (conf->user.wr_rel_set)
748 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
750 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
752 for (pidx = 0; pidx < 4; pidx++) {
753 if (conf->gp_part[pidx].wr_rel_change) {
754 if (conf->gp_part[pidx].wr_rel_set)
755 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
757 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
761 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
762 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
763 puts("Card does not support host controlled partition write "
764 "reliability settings\n");
768 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
769 EXT_CSD_PARTITION_SETTING_COMPLETED) {
770 printf("Card already partitioned\n");
774 if (mode == MMC_HWPART_CONF_CHECK)
777 /* Partitioning requires high-capacity size definitions */
778 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
779 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
780 EXT_CSD_ERASE_GROUP_DEF, 1);
785 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
787 /* update erase group size to be high-capacity */
788 mmc->erase_grp_size =
789 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
793 /* all OK, write the configuration */
794 for (i = 0; i < 4; i++) {
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_ENH_START_ADDR+i,
797 (enh_start_addr >> (i*8)) & 0xFF);
801 for (i = 0; i < 3; i++) {
802 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
803 EXT_CSD_ENH_SIZE_MULT+i,
804 (enh_size_mult >> (i*8)) & 0xFF);
808 for (pidx = 0; pidx < 4; pidx++) {
809 for (i = 0; i < 3; i++) {
810 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
811 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
812 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
817 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
818 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
822 if (mode == MMC_HWPART_CONF_SET)
825 /* The WR_REL_SET is a write-once register but shall be
826 * written before setting PART_SETTING_COMPLETED. As it is
827 * write-once we can only write it when completing the
829 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
830 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
831 EXT_CSD_WR_REL_SET, wr_rel_set);
836 /* Setting PART_SETTING_COMPLETED confirms the partition
837 * configuration but it only becomes effective after power
838 * cycle, so we do not adjust the partition related settings
839 * in the mmc struct. */
841 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
842 EXT_CSD_PARTITION_SETTING,
843 EXT_CSD_PARTITION_SETTING_COMPLETED);
850 int mmc_getcd(struct mmc *mmc)
854 cd = board_mmc_getcd(mmc);
857 if (mmc->cfg->ops->getcd)
858 cd = mmc->cfg->ops->getcd(mmc);
866 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
869 struct mmc_data data;
871 /* Switch the frequency */
872 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
873 cmd.resp_type = MMC_RSP_R1;
874 cmd.cmdarg = (mode << 31) | 0xffffff;
875 cmd.cmdarg &= ~(0xf << (group * 4));
876 cmd.cmdarg |= value << (group * 4);
878 data.dest = (char *)resp;
881 data.flags = MMC_DATA_READ;
883 return mmc_send_cmd(mmc, &cmd, &data);
887 static int sd_change_freq(struct mmc *mmc)
891 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
892 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
893 struct mmc_data data;
898 if (mmc_host_is_spi(mmc))
901 /* Read the SCR to find out if this card supports higher speeds */
902 cmd.cmdidx = MMC_CMD_APP_CMD;
903 cmd.resp_type = MMC_RSP_R1;
904 cmd.cmdarg = mmc->rca << 16;
906 err = mmc_send_cmd(mmc, &cmd, NULL);
911 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
912 cmd.resp_type = MMC_RSP_R1;
918 data.dest = (char *)scr;
921 data.flags = MMC_DATA_READ;
923 err = mmc_send_cmd(mmc, &cmd, &data);
932 mmc->scr[0] = __be32_to_cpu(scr[0]);
933 mmc->scr[1] = __be32_to_cpu(scr[1]);
935 switch ((mmc->scr[0] >> 24) & 0xf) {
937 mmc->version = SD_VERSION_1_0;
940 mmc->version = SD_VERSION_1_10;
943 mmc->version = SD_VERSION_2;
944 if ((mmc->scr[0] >> 15) & 0x1)
945 mmc->version = SD_VERSION_3;
948 mmc->version = SD_VERSION_1_0;
952 if (mmc->scr[0] & SD_DATA_4BIT)
953 mmc->card_caps |= MMC_MODE_4BIT;
955 /* Version 1.0 doesn't support switching */
956 if (mmc->version == SD_VERSION_1_0)
961 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
962 (u8 *)switch_status);
967 /* The high-speed function is busy. Try again */
968 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
972 /* If high-speed isn't supported, we return */
973 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
977 * If the host doesn't support SD_HIGHSPEED, do not switch card to
978 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
979 * This can avoid furthur problem when the card runs in different
980 * mode between the host.
982 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
983 (mmc->cfg->host_caps & MMC_MODE_HS)))
986 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
991 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
992 mmc->card_caps |= MMC_MODE_HS;
997 /* frequency bases */
998 /* divided by 10 to be nice to platforms without floating point */
999 static const int fbase[] = {
1006 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1007 * to platforms without floating point.
1009 static const int multipliers[] = {
1028 static void mmc_set_ios(struct mmc *mmc)
1030 if (mmc->cfg->ops->set_ios)
1031 mmc->cfg->ops->set_ios(mmc);
1034 void mmc_set_clock(struct mmc *mmc, uint clock)
1036 if (clock > mmc->cfg->f_max)
1037 clock = mmc->cfg->f_max;
1039 if (clock < mmc->cfg->f_min)
1040 clock = mmc->cfg->f_min;
1047 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1049 mmc->bus_width = width;
1054 static int mmc_startup(struct mmc *mmc)
1058 u64 cmult, csize, capacity;
1060 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1061 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1063 bool has_parts = false;
1064 bool part_completed;
1066 #ifdef CONFIG_MMC_SPI_CRC_ON
1067 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1068 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1069 cmd.resp_type = MMC_RSP_R1;
1071 err = mmc_send_cmd(mmc, &cmd, NULL);
1078 /* Put the Card in Identify Mode */
1079 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1080 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1081 cmd.resp_type = MMC_RSP_R2;
1084 err = mmc_send_cmd(mmc, &cmd, NULL);
1089 memcpy(mmc->cid, cmd.response, 16);
1092 * For MMC cards, set the Relative Address.
1093 * For SD cards, get the Relatvie Address.
1094 * This also puts the cards into Standby State
1096 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1097 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1098 cmd.cmdarg = mmc->rca << 16;
1099 cmd.resp_type = MMC_RSP_R6;
1101 err = mmc_send_cmd(mmc, &cmd, NULL);
1107 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1110 /* Get the Card-Specific Data */
1111 cmd.cmdidx = MMC_CMD_SEND_CSD;
1112 cmd.resp_type = MMC_RSP_R2;
1113 cmd.cmdarg = mmc->rca << 16;
1115 err = mmc_send_cmd(mmc, &cmd, NULL);
1117 /* Waiting for the ready status */
1118 mmc_send_status(mmc, timeout);
1123 mmc->csd[0] = cmd.response[0];
1124 mmc->csd[1] = cmd.response[1];
1125 mmc->csd[2] = cmd.response[2];
1126 mmc->csd[3] = cmd.response[3];
1128 if (mmc->version == MMC_VERSION_UNKNOWN) {
1129 int version = (cmd.response[0] >> 26) & 0xf;
1133 mmc->version = MMC_VERSION_1_2;
1136 mmc->version = MMC_VERSION_1_4;
1139 mmc->version = MMC_VERSION_2_2;
1142 mmc->version = MMC_VERSION_3;
1145 mmc->version = MMC_VERSION_4;
1148 mmc->version = MMC_VERSION_1_2;
1153 /* divide frequency by 10, since the mults are 10x bigger */
1154 freq = fbase[(cmd.response[0] & 0x7)];
1155 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1157 mmc->tran_speed = freq * mult;
1159 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1160 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1163 mmc->write_bl_len = mmc->read_bl_len;
1165 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1167 if (mmc->high_capacity) {
1168 csize = (mmc->csd[1] & 0x3f) << 16
1169 | (mmc->csd[2] & 0xffff0000) >> 16;
1172 csize = (mmc->csd[1] & 0x3ff) << 2
1173 | (mmc->csd[2] & 0xc0000000) >> 30;
1174 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1177 mmc->capacity_user = (csize + 1) << (cmult + 2);
1178 mmc->capacity_user *= mmc->read_bl_len;
1179 mmc->capacity_boot = 0;
1180 mmc->capacity_rpmb = 0;
1181 for (i = 0; i < 4; i++)
1182 mmc->capacity_gp[i] = 0;
1184 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1185 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1187 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1188 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1190 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1191 cmd.cmdidx = MMC_CMD_SET_DSR;
1192 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1193 cmd.resp_type = MMC_RSP_NONE;
1194 if (mmc_send_cmd(mmc, &cmd, NULL))
1195 printf("MMC: SET_DSR failed\n");
1198 /* Select the card, and put it into Transfer Mode */
1199 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1200 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1201 cmd.resp_type = MMC_RSP_R1;
1202 cmd.cmdarg = mmc->rca << 16;
1203 err = mmc_send_cmd(mmc, &cmd, NULL);
1210 * For SD, its erase group is always one sector
1212 mmc->erase_grp_size = 1;
1213 mmc->part_config = MMCPART_NOAVAILABLE;
1214 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1215 /* check ext_csd version and capacity */
1216 err = mmc_send_ext_csd(mmc, ext_csd);
1219 if (ext_csd[EXT_CSD_REV] >= 2) {
1221 * According to the JEDEC Standard, the value of
1222 * ext_csd's capacity is valid if the value is more
1225 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1226 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1227 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1228 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1229 capacity *= MMC_MAX_BLOCK_LEN;
1230 if ((capacity >> 20) > 2 * 1024)
1231 mmc->capacity_user = capacity;
1234 switch (ext_csd[EXT_CSD_REV]) {
1236 mmc->version = MMC_VERSION_4_1;
1239 mmc->version = MMC_VERSION_4_2;
1242 mmc->version = MMC_VERSION_4_3;
1245 mmc->version = MMC_VERSION_4_41;
1248 mmc->version = MMC_VERSION_4_5;
1251 mmc->version = MMC_VERSION_5_0;
1255 /* The partition data may be non-zero but it is only
1256 * effective if PARTITION_SETTING_COMPLETED is set in
1257 * EXT_CSD, so ignore any data if this bit is not set,
1258 * except for enabling the high-capacity group size
1259 * definition (see below). */
1260 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1261 EXT_CSD_PARTITION_SETTING_COMPLETED);
1263 /* store the partition info of emmc */
1264 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1265 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1266 ext_csd[EXT_CSD_BOOT_MULT])
1267 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1268 if (part_completed &&
1269 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1270 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1272 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1274 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1276 for (i = 0; i < 4; i++) {
1277 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1278 uint mult = (ext_csd[idx + 2] << 16) +
1279 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1282 if (!part_completed)
1284 mmc->capacity_gp[i] = mult;
1285 mmc->capacity_gp[i] *=
1286 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1287 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1288 mmc->capacity_gp[i] <<= 19;
1291 if (part_completed) {
1292 mmc->enh_user_size =
1293 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1294 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1295 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1296 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1297 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1298 mmc->enh_user_size <<= 19;
1299 mmc->enh_user_start =
1300 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1301 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1302 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1303 ext_csd[EXT_CSD_ENH_START_ADDR];
1304 if (mmc->high_capacity)
1305 mmc->enh_user_start <<= 9;
1309 * Host needs to enable ERASE_GRP_DEF bit if device is
1310 * partitioned. This bit will be lost every time after a reset
1311 * or power off. This will affect erase size.
1315 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1316 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1319 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1320 EXT_CSD_ERASE_GROUP_DEF, 1);
1325 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1328 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1329 /* Read out group size from ext_csd */
1330 mmc->erase_grp_size =
1331 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1333 * if high capacity and partition setting completed
1334 * SEC_COUNT is valid even if it is smaller than 2 GiB
1335 * JEDEC Standard JESD84-B45, 6.2.4
1337 if (mmc->high_capacity && part_completed) {
1338 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1339 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1340 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1341 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1342 capacity *= MMC_MAX_BLOCK_LEN;
1343 mmc->capacity_user = capacity;
1346 /* Calculate the group size from the csd value. */
1347 int erase_gsz, erase_gmul;
1348 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1349 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1350 mmc->erase_grp_size = (erase_gsz + 1)
1354 mmc->hc_wp_grp_size = 1024
1355 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1356 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1358 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1361 err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
1366 err = sd_change_freq(mmc);
1368 err = mmc_change_freq(mmc);
1373 /* Restrict card's capabilities by what the host can do */
1374 mmc->card_caps &= mmc->cfg->host_caps;
1377 if (mmc->card_caps & MMC_MODE_4BIT) {
1378 cmd.cmdidx = MMC_CMD_APP_CMD;
1379 cmd.resp_type = MMC_RSP_R1;
1380 cmd.cmdarg = mmc->rca << 16;
1382 err = mmc_send_cmd(mmc, &cmd, NULL);
1386 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1387 cmd.resp_type = MMC_RSP_R1;
1389 err = mmc_send_cmd(mmc, &cmd, NULL);
1393 mmc_set_bus_width(mmc, 4);
1396 if (mmc->card_caps & MMC_MODE_HS)
1397 mmc->tran_speed = 50000000;
1399 mmc->tran_speed = 25000000;
1400 } else if (mmc->version >= MMC_VERSION_4) {
1401 /* Only version 4 of MMC supports wider bus widths */
1404 /* An array of possible bus widths in order of preference */
1405 static unsigned ext_csd_bits[] = {
1406 EXT_CSD_DDR_BUS_WIDTH_8,
1407 EXT_CSD_DDR_BUS_WIDTH_4,
1408 EXT_CSD_BUS_WIDTH_8,
1409 EXT_CSD_BUS_WIDTH_4,
1410 EXT_CSD_BUS_WIDTH_1,
1413 /* An array to map CSD bus widths to host cap bits */
1414 static unsigned ext_to_hostcaps[] = {
1415 [EXT_CSD_DDR_BUS_WIDTH_4] =
1416 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1417 [EXT_CSD_DDR_BUS_WIDTH_8] =
1418 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1419 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1420 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1423 /* An array to map chosen bus width to an integer */
1424 static unsigned widths[] = {
1428 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1429 unsigned int extw = ext_csd_bits[idx];
1430 unsigned int caps = ext_to_hostcaps[extw];
1433 * If the bus width is still not changed,
1434 * don't try to set the default again.
1435 * Otherwise, recover from switch attempts
1436 * by switching to 1-bit bus width.
1438 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1439 mmc->bus_width == 1) {
1445 * Check to make sure the card and controller support
1446 * these capabilities
1448 if ((mmc->card_caps & caps) != caps)
1451 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1452 EXT_CSD_BUS_WIDTH, extw);
1457 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1458 mmc_set_bus_width(mmc, widths[idx]);
1460 err = mmc_send_ext_csd(mmc, test_csd);
1465 /* Only compare read only fields */
1466 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1467 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1468 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1469 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1470 ext_csd[EXT_CSD_REV]
1471 == test_csd[EXT_CSD_REV] &&
1472 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1473 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1474 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1475 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1484 if (mmc->card_caps & MMC_MODE_HS) {
1485 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1486 mmc->tran_speed = 52000000;
1488 mmc->tran_speed = 26000000;
1492 mmc_set_clock(mmc, mmc->tran_speed);
1494 /* Fix the block length for DDR mode */
1495 if (mmc->ddr_mode) {
1496 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1497 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1500 /* fill in device description */
1501 mmc->block_dev.lun = 0;
1502 mmc->block_dev.hwpart = 0;
1503 mmc->block_dev.type = 0;
1504 mmc->block_dev.blksz = mmc->read_bl_len;
1505 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1506 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1507 #if !defined(CONFIG_SPL_BUILD) || \
1508 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1509 !defined(CONFIG_USE_TINY_PRINTF))
1510 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1511 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1512 (mmc->cid[3] >> 16) & 0xffff);
1513 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1514 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1515 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1516 (mmc->cid[2] >> 24) & 0xff);
1517 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1518 (mmc->cid[2] >> 16) & 0xf);
1520 mmc->block_dev.vendor[0] = 0;
1521 mmc->block_dev.product[0] = 0;
1522 mmc->block_dev.revision[0] = 0;
1524 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1525 part_init(&mmc->block_dev);
1531 static int mmc_send_if_cond(struct mmc *mmc)
1536 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1537 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1538 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1539 cmd.resp_type = MMC_RSP_R7;
1541 err = mmc_send_cmd(mmc, &cmd, NULL);
1546 if ((cmd.response[0] & 0xff) != 0xaa)
1547 return UNUSABLE_ERR;
1549 mmc->version = SD_VERSION_2;
1554 /* not used any more */
1555 int __deprecated mmc_register(struct mmc *mmc)
1557 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1558 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1563 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1567 /* quick validation */
1568 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1569 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1572 mmc = calloc(1, sizeof(*mmc));
1579 /* the following chunk was mmc_register() */
1581 /* Setup dsr related values */
1583 mmc->dsr = 0xffffffff;
1584 /* Setup the universal parts of the block interface just once */
1585 mmc->block_dev.if_type = IF_TYPE_MMC;
1586 mmc->block_dev.devnum = cur_dev_num++;
1587 mmc->block_dev.removable = 1;
1588 mmc->block_dev.block_read = mmc_bread;
1589 mmc->block_dev.block_write = mmc_bwrite;
1590 mmc->block_dev.block_erase = mmc_berase;
1592 /* setup initial part type */
1593 mmc->block_dev.part_type = mmc->cfg->part_type;
1595 INIT_LIST_HEAD(&mmc->link);
1597 list_add_tail(&mmc->link, &mmc_devices);
1602 void mmc_destroy(struct mmc *mmc)
1604 /* only freeing memory for now */
1608 static int mmc_get_dev(int dev, struct blk_desc **descp)
1610 struct mmc *mmc = find_mmc_device(dev);
1615 ret = mmc_init(mmc);
1619 *descp = &mmc->block_dev;
1624 /* board-specific MMC power initializations. */
1625 __weak void board_mmc_power_init(void)
1629 int mmc_start_init(struct mmc *mmc)
1633 /* we pretend there's no card when init is NULL */
1634 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1636 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1637 printf("MMC: no card present\n");
1645 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1646 mmc_adapter_card_type_ident();
1648 board_mmc_power_init();
1650 /* made sure it's not NULL earlier */
1651 err = mmc->cfg->ops->init(mmc);
1657 mmc_set_bus_width(mmc, 1);
1658 mmc_set_clock(mmc, 1);
1660 /* Reset the Card */
1661 err = mmc_go_idle(mmc);
1666 /* The internal partition reset to user partition(0) at every CMD0*/
1667 mmc->block_dev.hwpart = 0;
1669 /* Test for SD version 2 */
1670 err = mmc_send_if_cond(mmc);
1672 /* Now try to get the SD card's operating condition */
1673 err = sd_send_op_cond(mmc);
1675 /* If the command timed out, we check for an MMC card */
1676 if (err == TIMEOUT) {
1677 err = mmc_send_op_cond(mmc);
1680 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1681 printf("Card did not respond to voltage select!\n");
1683 return UNUSABLE_ERR;
1688 mmc->init_in_progress = 1;
1693 static int mmc_complete_init(struct mmc *mmc)
1697 mmc->init_in_progress = 0;
1698 if (mmc->op_cond_pending)
1699 err = mmc_complete_op_cond(mmc);
1702 err = mmc_startup(mmc);
1710 int mmc_init(struct mmc *mmc)
1718 start = get_timer(0);
1720 if (!mmc->init_in_progress)
1721 err = mmc_start_init(mmc);
1724 err = mmc_complete_init(mmc);
1725 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1729 int mmc_set_dsr(struct mmc *mmc, u16 val)
1735 /* CPU-specific MMC initializations */
1736 __weak int cpu_mmc_init(bd_t *bis)
1741 /* board-specific MMC initializations. */
1742 __weak int board_mmc_init(bd_t *bis)
1747 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1749 void print_mmc_devices(char separator)
1752 struct list_head *entry;
1755 list_for_each(entry, &mmc_devices) {
1756 m = list_entry(entry, struct mmc, link);
1759 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1763 printf("%s: %d", m->cfg->name, m->block_dev.devnum);
1765 printf(" (%s)", mmc_type);
1767 if (entry->next != &mmc_devices) {
1768 printf("%c", separator);
1769 if (separator != '\n')
1778 void print_mmc_devices(char separator) { }
1781 int get_mmc_num(void)
1786 void mmc_set_preinit(struct mmc *mmc, int preinit)
1788 mmc->preinit = preinit;
1791 static void do_preinit(void)
1794 struct list_head *entry;
1796 list_for_each(entry, &mmc_devices) {
1797 m = list_entry(entry, struct mmc, link);
1799 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1800 mmc_set_preinit(m, 1);
1807 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1808 static int mmc_probe(bd_t *bis)
1812 #elif defined(CONFIG_DM_MMC)
1813 static int mmc_probe(bd_t *bis)
1817 struct udevice *dev;
1819 ret = uclass_get(UCLASS_MMC, &uc);
1824 * Try to add them in sequence order. Really with driver model we
1825 * should allow holes, but the current MMC list does not allow that.
1826 * So if we request 0, 1, 3 we will get 0, 1, 2.
1828 for (i = 0; ; i++) {
1829 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1833 uclass_foreach_dev(dev, uc) {
1834 ret = device_probe(dev);
1836 printf("%s - probe failed: %d\n", dev->name, ret);
1842 static int mmc_probe(bd_t *bis)
1844 if (board_mmc_init(bis) < 0)
1851 int mmc_initialize(bd_t *bis)
1853 static int initialized = 0;
1855 if (initialized) /* Avoid initializing mmc multiple times */
1859 INIT_LIST_HEAD (&mmc_devices);
1862 ret = mmc_probe(bis);
1866 #ifndef CONFIG_SPL_BUILD
1867 print_mmc_devices(',');
1874 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1876 * This function changes the size of boot partition and the size of rpmb
1877 * partition present on EMMC devices.
1880 * struct *mmc: pointer for the mmc device strcuture
1881 * bootsize: size of boot partition
1882 * rpmbsize: size of rpmb partition
1884 * Returns 0 on success.
1887 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1888 unsigned long rpmbsize)
1893 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1894 cmd.cmdidx = MMC_CMD_RES_MAN;
1895 cmd.resp_type = MMC_RSP_R1b;
1896 cmd.cmdarg = MMC_CMD62_ARG1;
1898 err = mmc_send_cmd(mmc, &cmd, NULL);
1900 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1904 /* Boot partition changing mode */
1905 cmd.cmdidx = MMC_CMD_RES_MAN;
1906 cmd.resp_type = MMC_RSP_R1b;
1907 cmd.cmdarg = MMC_CMD62_ARG2;
1909 err = mmc_send_cmd(mmc, &cmd, NULL);
1911 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1914 /* boot partition size is multiple of 128KB */
1915 bootsize = (bootsize * 1024) / 128;
1917 /* Arg: boot partition size */
1918 cmd.cmdidx = MMC_CMD_RES_MAN;
1919 cmd.resp_type = MMC_RSP_R1b;
1920 cmd.cmdarg = bootsize;
1922 err = mmc_send_cmd(mmc, &cmd, NULL);
1924 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1927 /* RPMB partition size is multiple of 128KB */
1928 rpmbsize = (rpmbsize * 1024) / 128;
1929 /* Arg: RPMB partition size */
1930 cmd.cmdidx = MMC_CMD_RES_MAN;
1931 cmd.resp_type = MMC_RSP_R1b;
1932 cmd.cmdarg = rpmbsize;
1934 err = mmc_send_cmd(mmc, &cmd, NULL);
1936 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1943 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1944 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1947 * Returns 0 on success.
1949 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1953 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1954 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1955 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1956 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1964 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1965 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1968 * Returns 0 on success.
1970 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1974 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1975 EXT_CSD_BOOT_ACK(ack) |
1976 EXT_CSD_BOOT_PART_NUM(part_num) |
1977 EXT_CSD_PARTITION_ACCESS(access));
1985 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1986 * for enable. Note that this is a write-once field for non-zero values.
1988 * Returns 0 on success.
1990 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1992 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1997 U_BOOT_LEGACY_BLK(mmc) = {
1998 .if_typename = "mmc",
1999 .if_type = IF_TYPE_MMC,
2001 .get_dev = mmc_get_dev,
2002 .select_hwpart = mmc_select_hwpartp,