mmc: Move MMC boot code into its own file
[oweals/u-boot.git] / drivers / mmc / mmc.c
1 /*
2  * Copyright 2008, Freescale Semiconductor, Inc
3  * Andy Fleming
4  *
5  * Based vaguely on the Linux code
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #include <config.h>
11 #include <common.h>
12 #include <command.h>
13 #include <dm.h>
14 #include <dm/device-internal.h>
15 #include <errno.h>
16 #include <mmc.h>
17 #include <part.h>
18 #include <malloc.h>
19 #include <memalign.h>
20 #include <linux/list.h>
21 #include <div64.h>
22 #include "mmc_private.h"
23
24 __weak int board_mmc_getwp(struct mmc *mmc)
25 {
26         return -1;
27 }
28
29 int mmc_getwp(struct mmc *mmc)
30 {
31         int wp;
32
33         wp = board_mmc_getwp(mmc);
34
35         if (wp < 0) {
36                 if (mmc->cfg->ops->getwp)
37                         wp = mmc->cfg->ops->getwp(mmc);
38                 else
39                         wp = 0;
40         }
41
42         return wp;
43 }
44
45 __weak int board_mmc_getcd(struct mmc *mmc)
46 {
47         return -1;
48 }
49
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51 {
52         int ret;
53
54 #ifdef CONFIG_MMC_TRACE
55         int i;
56         u8 *ptr;
57
58         printf("CMD_SEND:%d\n", cmd->cmdidx);
59         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61         if (ret) {
62                 printf("\t\tRET\t\t\t %d\n", ret);
63         } else {
64                 switch (cmd->resp_type) {
65                 case MMC_RSP_NONE:
66                         printf("\t\tMMC_RSP_NONE\n");
67                         break;
68                 case MMC_RSP_R1:
69                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70                                 cmd->response[0]);
71                         break;
72                 case MMC_RSP_R1b:
73                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74                                 cmd->response[0]);
75                         break;
76                 case MMC_RSP_R2:
77                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
78                                 cmd->response[0]);
79                         printf("\t\t          \t\t 0x%08X \n",
80                                 cmd->response[1]);
81                         printf("\t\t          \t\t 0x%08X \n",
82                                 cmd->response[2]);
83                         printf("\t\t          \t\t 0x%08X \n",
84                                 cmd->response[3]);
85                         printf("\n");
86                         printf("\t\t\t\t\tDUMPING DATA\n");
87                         for (i = 0; i < 4; i++) {
88                                 int j;
89                                 printf("\t\t\t\t\t%03d - ", i*4);
90                                 ptr = (u8 *)&cmd->response[i];
91                                 ptr += 3;
92                                 for (j = 0; j < 4; j++)
93                                         printf("%02X ", *ptr--);
94                                 printf("\n");
95                         }
96                         break;
97                 case MMC_RSP_R3:
98                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99                                 cmd->response[0]);
100                         break;
101                 default:
102                         printf("\t\tERROR MMC rsp not supported\n");
103                         break;
104                 }
105         }
106 #else
107         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
108 #endif
109         return ret;
110 }
111
112 int mmc_send_status(struct mmc *mmc, int timeout)
113 {
114         struct mmc_cmd cmd;
115         int err, retries = 5;
116 #ifdef CONFIG_MMC_TRACE
117         int status;
118 #endif
119
120         cmd.cmdidx = MMC_CMD_SEND_STATUS;
121         cmd.resp_type = MMC_RSP_R1;
122         if (!mmc_host_is_spi(mmc))
123                 cmd.cmdarg = mmc->rca << 16;
124
125         while (1) {
126                 err = mmc_send_cmd(mmc, &cmd, NULL);
127                 if (!err) {
128                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
129                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
130                              MMC_STATE_PRG)
131                                 break;
132                         else if (cmd.response[0] & MMC_STATUS_MASK) {
133 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
134                                 printf("Status Error: 0x%08X\n",
135                                         cmd.response[0]);
136 #endif
137                                 return COMM_ERR;
138                         }
139                 } else if (--retries < 0)
140                         return err;
141
142                 if (timeout-- <= 0)
143                         break;
144
145                 udelay(1000);
146         }
147
148 #ifdef CONFIG_MMC_TRACE
149         status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150         printf("CURR STATE:%d\n", status);
151 #endif
152         if (timeout <= 0) {
153 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
154                 printf("Timeout waiting card ready\n");
155 #endif
156                 return TIMEOUT;
157         }
158
159         return 0;
160 }
161
162 int mmc_set_blocklen(struct mmc *mmc, int len)
163 {
164         struct mmc_cmd cmd;
165
166         if (mmc->ddr_mode)
167                 return 0;
168
169         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
170         cmd.resp_type = MMC_RSP_R1;
171         cmd.cmdarg = len;
172
173         return mmc_send_cmd(mmc, &cmd, NULL);
174 }
175
176 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
177                            lbaint_t blkcnt)
178 {
179         struct mmc_cmd cmd;
180         struct mmc_data data;
181
182         if (blkcnt > 1)
183                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
184         else
185                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
186
187         if (mmc->high_capacity)
188                 cmd.cmdarg = start;
189         else
190                 cmd.cmdarg = start * mmc->read_bl_len;
191
192         cmd.resp_type = MMC_RSP_R1;
193
194         data.dest = dst;
195         data.blocks = blkcnt;
196         data.blocksize = mmc->read_bl_len;
197         data.flags = MMC_DATA_READ;
198
199         if (mmc_send_cmd(mmc, &cmd, &data))
200                 return 0;
201
202         if (blkcnt > 1) {
203                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
204                 cmd.cmdarg = 0;
205                 cmd.resp_type = MMC_RSP_R1b;
206                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
207 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
208                         printf("mmc fail to send stop cmd\n");
209 #endif
210                         return 0;
211                 }
212         }
213
214         return blkcnt;
215 }
216
217 #ifdef CONFIG_BLK
218 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
219 #else
220 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
221                 void *dst)
222 #endif
223 {
224 #ifdef CONFIG_BLK
225         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
226 #endif
227         int dev_num = block_dev->devnum;
228         int err;
229         lbaint_t cur, blocks_todo = blkcnt;
230
231         if (blkcnt == 0)
232                 return 0;
233
234         struct mmc *mmc = find_mmc_device(dev_num);
235         if (!mmc)
236                 return 0;
237
238         err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
239         if (err < 0)
240                 return 0;
241
242         if ((start + blkcnt) > block_dev->lba) {
243 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
244                 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
245                         start + blkcnt, block_dev->lba);
246 #endif
247                 return 0;
248         }
249
250         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
251                 debug("%s: Failed to set blocklen\n", __func__);
252                 return 0;
253         }
254
255         do {
256                 cur = (blocks_todo > mmc->cfg->b_max) ?
257                         mmc->cfg->b_max : blocks_todo;
258                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
259                         debug("%s: Failed to read blocks\n", __func__);
260                         return 0;
261                 }
262                 blocks_todo -= cur;
263                 start += cur;
264                 dst += cur * mmc->read_bl_len;
265         } while (blocks_todo > 0);
266
267         return blkcnt;
268 }
269
270 static int mmc_go_idle(struct mmc *mmc)
271 {
272         struct mmc_cmd cmd;
273         int err;
274
275         udelay(1000);
276
277         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
278         cmd.cmdarg = 0;
279         cmd.resp_type = MMC_RSP_NONE;
280
281         err = mmc_send_cmd(mmc, &cmd, NULL);
282
283         if (err)
284                 return err;
285
286         udelay(2000);
287
288         return 0;
289 }
290
291 static int sd_send_op_cond(struct mmc *mmc)
292 {
293         int timeout = 1000;
294         int err;
295         struct mmc_cmd cmd;
296
297         while (1) {
298                 cmd.cmdidx = MMC_CMD_APP_CMD;
299                 cmd.resp_type = MMC_RSP_R1;
300                 cmd.cmdarg = 0;
301
302                 err = mmc_send_cmd(mmc, &cmd, NULL);
303
304                 if (err)
305                         return err;
306
307                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
308                 cmd.resp_type = MMC_RSP_R3;
309
310                 /*
311                  * Most cards do not answer if some reserved bits
312                  * in the ocr are set. However, Some controller
313                  * can set bit 7 (reserved for low voltages), but
314                  * how to manage low voltages SD card is not yet
315                  * specified.
316                  */
317                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
318                         (mmc->cfg->voltages & 0xff8000);
319
320                 if (mmc->version == SD_VERSION_2)
321                         cmd.cmdarg |= OCR_HCS;
322
323                 err = mmc_send_cmd(mmc, &cmd, NULL);
324
325                 if (err)
326                         return err;
327
328                 if (cmd.response[0] & OCR_BUSY)
329                         break;
330
331                 if (timeout-- <= 0)
332                         return UNUSABLE_ERR;
333
334                 udelay(1000);
335         }
336
337         if (mmc->version != SD_VERSION_2)
338                 mmc->version = SD_VERSION_1_0;
339
340         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
341                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
342                 cmd.resp_type = MMC_RSP_R3;
343                 cmd.cmdarg = 0;
344
345                 err = mmc_send_cmd(mmc, &cmd, NULL);
346
347                 if (err)
348                         return err;
349         }
350
351         mmc->ocr = cmd.response[0];
352
353         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
354         mmc->rca = 0;
355
356         return 0;
357 }
358
359 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
360 {
361         struct mmc_cmd cmd;
362         int err;
363
364         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
365         cmd.resp_type = MMC_RSP_R3;
366         cmd.cmdarg = 0;
367         if (use_arg && !mmc_host_is_spi(mmc))
368                 cmd.cmdarg = OCR_HCS |
369                         (mmc->cfg->voltages &
370                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
371                         (mmc->ocr & OCR_ACCESS_MODE);
372
373         err = mmc_send_cmd(mmc, &cmd, NULL);
374         if (err)
375                 return err;
376         mmc->ocr = cmd.response[0];
377         return 0;
378 }
379
380 static int mmc_send_op_cond(struct mmc *mmc)
381 {
382         int err, i;
383
384         /* Some cards seem to need this */
385         mmc_go_idle(mmc);
386
387         /* Asking to the card its capabilities */
388         for (i = 0; i < 2; i++) {
389                 err = mmc_send_op_cond_iter(mmc, i != 0);
390                 if (err)
391                         return err;
392
393                 /* exit if not busy (flag seems to be inverted) */
394                 if (mmc->ocr & OCR_BUSY)
395                         break;
396         }
397         mmc->op_cond_pending = 1;
398         return 0;
399 }
400
401 static int mmc_complete_op_cond(struct mmc *mmc)
402 {
403         struct mmc_cmd cmd;
404         int timeout = 1000;
405         uint start;
406         int err;
407
408         mmc->op_cond_pending = 0;
409         if (!(mmc->ocr & OCR_BUSY)) {
410                 start = get_timer(0);
411                 while (1) {
412                         err = mmc_send_op_cond_iter(mmc, 1);
413                         if (err)
414                                 return err;
415                         if (mmc->ocr & OCR_BUSY)
416                                 break;
417                         if (get_timer(start) > timeout)
418                                 return UNUSABLE_ERR;
419                         udelay(100);
420                 }
421         }
422
423         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
424                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
425                 cmd.resp_type = MMC_RSP_R3;
426                 cmd.cmdarg = 0;
427
428                 err = mmc_send_cmd(mmc, &cmd, NULL);
429
430                 if (err)
431                         return err;
432
433                 mmc->ocr = cmd.response[0];
434         }
435
436         mmc->version = MMC_VERSION_UNKNOWN;
437
438         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
439         mmc->rca = 1;
440
441         return 0;
442 }
443
444
445 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
446 {
447         struct mmc_cmd cmd;
448         struct mmc_data data;
449         int err;
450
451         /* Get the Card Status Register */
452         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
453         cmd.resp_type = MMC_RSP_R1;
454         cmd.cmdarg = 0;
455
456         data.dest = (char *)ext_csd;
457         data.blocks = 1;
458         data.blocksize = MMC_MAX_BLOCK_LEN;
459         data.flags = MMC_DATA_READ;
460
461         err = mmc_send_cmd(mmc, &cmd, &data);
462
463         return err;
464 }
465
466 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
467 {
468         struct mmc_cmd cmd;
469         int timeout = 1000;
470         int ret;
471
472         cmd.cmdidx = MMC_CMD_SWITCH;
473         cmd.resp_type = MMC_RSP_R1b;
474         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
475                                  (index << 16) |
476                                  (value << 8);
477
478         ret = mmc_send_cmd(mmc, &cmd, NULL);
479
480         /* Waiting for the ready status */
481         if (!ret)
482                 ret = mmc_send_status(mmc, timeout);
483
484         return ret;
485
486 }
487
488 static int mmc_change_freq(struct mmc *mmc)
489 {
490         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
491         char cardtype;
492         int err;
493
494         mmc->card_caps = 0;
495
496         if (mmc_host_is_spi(mmc))
497                 return 0;
498
499         /* Only version 4 supports high-speed */
500         if (mmc->version < MMC_VERSION_4)
501                 return 0;
502
503         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
504
505         err = mmc_send_ext_csd(mmc, ext_csd);
506
507         if (err)
508                 return err;
509
510         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
511
512         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
513
514         if (err)
515                 return err;
516
517         /* Now check to see that it worked */
518         err = mmc_send_ext_csd(mmc, ext_csd);
519
520         if (err)
521                 return err;
522
523         /* No high-speed support */
524         if (!ext_csd[EXT_CSD_HS_TIMING])
525                 return 0;
526
527         /* High Speed is set, there are two types: 52MHz and 26MHz */
528         if (cardtype & EXT_CSD_CARD_TYPE_52) {
529                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
530                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
531                 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
532         } else {
533                 mmc->card_caps |= MMC_MODE_HS;
534         }
535
536         return 0;
537 }
538
539 static int mmc_set_capacity(struct mmc *mmc, int part_num)
540 {
541         switch (part_num) {
542         case 0:
543                 mmc->capacity = mmc->capacity_user;
544                 break;
545         case 1:
546         case 2:
547                 mmc->capacity = mmc->capacity_boot;
548                 break;
549         case 3:
550                 mmc->capacity = mmc->capacity_rpmb;
551                 break;
552         case 4:
553         case 5:
554         case 6:
555         case 7:
556                 mmc->capacity = mmc->capacity_gp[part_num - 4];
557                 break;
558         default:
559                 return -1;
560         }
561
562         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
563
564         return 0;
565 }
566
567 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
568 {
569         int ret;
570
571         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
572                          (mmc->part_config & ~PART_ACCESS_MASK)
573                          | (part_num & PART_ACCESS_MASK));
574
575         /*
576          * Set the capacity if the switch succeeded or was intended
577          * to return to representing the raw device.
578          */
579         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
580                 ret = mmc_set_capacity(mmc, part_num);
581                 mmc_get_blk_desc(mmc)->hwpart = part_num;
582         }
583
584         return ret;
585 }
586
587 int mmc_hwpart_config(struct mmc *mmc,
588                       const struct mmc_hwpart_conf *conf,
589                       enum mmc_hwpart_conf_mode mode)
590 {
591         u8 part_attrs = 0;
592         u32 enh_size_mult;
593         u32 enh_start_addr;
594         u32 gp_size_mult[4];
595         u32 max_enh_size_mult;
596         u32 tot_enh_size_mult = 0;
597         u8 wr_rel_set;
598         int i, pidx, err;
599         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
600
601         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
602                 return -EINVAL;
603
604         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
605                 printf("eMMC >= 4.4 required for enhanced user data area\n");
606                 return -EMEDIUMTYPE;
607         }
608
609         if (!(mmc->part_support & PART_SUPPORT)) {
610                 printf("Card does not support partitioning\n");
611                 return -EMEDIUMTYPE;
612         }
613
614         if (!mmc->hc_wp_grp_size) {
615                 printf("Card does not define HC WP group size\n");
616                 return -EMEDIUMTYPE;
617         }
618
619         /* check partition alignment and total enhanced size */
620         if (conf->user.enh_size) {
621                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
622                     conf->user.enh_start % mmc->hc_wp_grp_size) {
623                         printf("User data enhanced area not HC WP group "
624                                "size aligned\n");
625                         return -EINVAL;
626                 }
627                 part_attrs |= EXT_CSD_ENH_USR;
628                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
629                 if (mmc->high_capacity) {
630                         enh_start_addr = conf->user.enh_start;
631                 } else {
632                         enh_start_addr = (conf->user.enh_start << 9);
633                 }
634         } else {
635                 enh_size_mult = 0;
636                 enh_start_addr = 0;
637         }
638         tot_enh_size_mult += enh_size_mult;
639
640         for (pidx = 0; pidx < 4; pidx++) {
641                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
642                         printf("GP%i partition not HC WP group size "
643                                "aligned\n", pidx+1);
644                         return -EINVAL;
645                 }
646                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
647                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
648                         part_attrs |= EXT_CSD_ENH_GP(pidx);
649                         tot_enh_size_mult += gp_size_mult[pidx];
650                 }
651         }
652
653         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
654                 printf("Card does not support enhanced attribute\n");
655                 return -EMEDIUMTYPE;
656         }
657
658         err = mmc_send_ext_csd(mmc, ext_csd);
659         if (err)
660                 return err;
661
662         max_enh_size_mult =
663                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
664                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
665                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
666         if (tot_enh_size_mult > max_enh_size_mult) {
667                 printf("Total enhanced size exceeds maximum (%u > %u)\n",
668                        tot_enh_size_mult, max_enh_size_mult);
669                 return -EMEDIUMTYPE;
670         }
671
672         /* The default value of EXT_CSD_WR_REL_SET is device
673          * dependent, the values can only be changed if the
674          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
675          * changed only once and before partitioning is completed. */
676         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
677         if (conf->user.wr_rel_change) {
678                 if (conf->user.wr_rel_set)
679                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
680                 else
681                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
682         }
683         for (pidx = 0; pidx < 4; pidx++) {
684                 if (conf->gp_part[pidx].wr_rel_change) {
685                         if (conf->gp_part[pidx].wr_rel_set)
686                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
687                         else
688                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
689                 }
690         }
691
692         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
693             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
694                 puts("Card does not support host controlled partition write "
695                      "reliability settings\n");
696                 return -EMEDIUMTYPE;
697         }
698
699         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
700             EXT_CSD_PARTITION_SETTING_COMPLETED) {
701                 printf("Card already partitioned\n");
702                 return -EPERM;
703         }
704
705         if (mode == MMC_HWPART_CONF_CHECK)
706                 return 0;
707
708         /* Partitioning requires high-capacity size definitions */
709         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
710                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
711                                  EXT_CSD_ERASE_GROUP_DEF, 1);
712
713                 if (err)
714                         return err;
715
716                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
717
718                 /* update erase group size to be high-capacity */
719                 mmc->erase_grp_size =
720                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
721
722         }
723
724         /* all OK, write the configuration */
725         for (i = 0; i < 4; i++) {
726                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
727                                  EXT_CSD_ENH_START_ADDR+i,
728                                  (enh_start_addr >> (i*8)) & 0xFF);
729                 if (err)
730                         return err;
731         }
732         for (i = 0; i < 3; i++) {
733                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
734                                  EXT_CSD_ENH_SIZE_MULT+i,
735                                  (enh_size_mult >> (i*8)) & 0xFF);
736                 if (err)
737                         return err;
738         }
739         for (pidx = 0; pidx < 4; pidx++) {
740                 for (i = 0; i < 3; i++) {
741                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
742                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
743                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
744                         if (err)
745                                 return err;
746                 }
747         }
748         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
749                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
750         if (err)
751                 return err;
752
753         if (mode == MMC_HWPART_CONF_SET)
754                 return 0;
755
756         /* The WR_REL_SET is a write-once register but shall be
757          * written before setting PART_SETTING_COMPLETED. As it is
758          * write-once we can only write it when completing the
759          * partitioning. */
760         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
761                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
762                                  EXT_CSD_WR_REL_SET, wr_rel_set);
763                 if (err)
764                         return err;
765         }
766
767         /* Setting PART_SETTING_COMPLETED confirms the partition
768          * configuration but it only becomes effective after power
769          * cycle, so we do not adjust the partition related settings
770          * in the mmc struct. */
771
772         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
773                          EXT_CSD_PARTITION_SETTING,
774                          EXT_CSD_PARTITION_SETTING_COMPLETED);
775         if (err)
776                 return err;
777
778         return 0;
779 }
780
781 int mmc_getcd(struct mmc *mmc)
782 {
783         int cd;
784
785         cd = board_mmc_getcd(mmc);
786
787         if (cd < 0) {
788                 if (mmc->cfg->ops->getcd)
789                         cd = mmc->cfg->ops->getcd(mmc);
790                 else
791                         cd = 1;
792         }
793
794         return cd;
795 }
796
797 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
798 {
799         struct mmc_cmd cmd;
800         struct mmc_data data;
801
802         /* Switch the frequency */
803         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
804         cmd.resp_type = MMC_RSP_R1;
805         cmd.cmdarg = (mode << 31) | 0xffffff;
806         cmd.cmdarg &= ~(0xf << (group * 4));
807         cmd.cmdarg |= value << (group * 4);
808
809         data.dest = (char *)resp;
810         data.blocksize = 64;
811         data.blocks = 1;
812         data.flags = MMC_DATA_READ;
813
814         return mmc_send_cmd(mmc, &cmd, &data);
815 }
816
817
818 static int sd_change_freq(struct mmc *mmc)
819 {
820         int err;
821         struct mmc_cmd cmd;
822         ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
823         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
824         struct mmc_data data;
825         int timeout;
826
827         mmc->card_caps = 0;
828
829         if (mmc_host_is_spi(mmc))
830                 return 0;
831
832         /* Read the SCR to find out if this card supports higher speeds */
833         cmd.cmdidx = MMC_CMD_APP_CMD;
834         cmd.resp_type = MMC_RSP_R1;
835         cmd.cmdarg = mmc->rca << 16;
836
837         err = mmc_send_cmd(mmc, &cmd, NULL);
838
839         if (err)
840                 return err;
841
842         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
843         cmd.resp_type = MMC_RSP_R1;
844         cmd.cmdarg = 0;
845
846         timeout = 3;
847
848 retry_scr:
849         data.dest = (char *)scr;
850         data.blocksize = 8;
851         data.blocks = 1;
852         data.flags = MMC_DATA_READ;
853
854         err = mmc_send_cmd(mmc, &cmd, &data);
855
856         if (err) {
857                 if (timeout--)
858                         goto retry_scr;
859
860                 return err;
861         }
862
863         mmc->scr[0] = __be32_to_cpu(scr[0]);
864         mmc->scr[1] = __be32_to_cpu(scr[1]);
865
866         switch ((mmc->scr[0] >> 24) & 0xf) {
867         case 0:
868                 mmc->version = SD_VERSION_1_0;
869                 break;
870         case 1:
871                 mmc->version = SD_VERSION_1_10;
872                 break;
873         case 2:
874                 mmc->version = SD_VERSION_2;
875                 if ((mmc->scr[0] >> 15) & 0x1)
876                         mmc->version = SD_VERSION_3;
877                 break;
878         default:
879                 mmc->version = SD_VERSION_1_0;
880                 break;
881         }
882
883         if (mmc->scr[0] & SD_DATA_4BIT)
884                 mmc->card_caps |= MMC_MODE_4BIT;
885
886         /* Version 1.0 doesn't support switching */
887         if (mmc->version == SD_VERSION_1_0)
888                 return 0;
889
890         timeout = 4;
891         while (timeout--) {
892                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
893                                 (u8 *)switch_status);
894
895                 if (err)
896                         return err;
897
898                 /* The high-speed function is busy.  Try again */
899                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
900                         break;
901         }
902
903         /* If high-speed isn't supported, we return */
904         if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
905                 return 0;
906
907         /*
908          * If the host doesn't support SD_HIGHSPEED, do not switch card to
909          * HIGHSPEED mode even if the card support SD_HIGHSPPED.
910          * This can avoid furthur problem when the card runs in different
911          * mode between the host.
912          */
913         if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
914                 (mmc->cfg->host_caps & MMC_MODE_HS)))
915                 return 0;
916
917         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
918
919         if (err)
920                 return err;
921
922         if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
923                 mmc->card_caps |= MMC_MODE_HS;
924
925         return 0;
926 }
927
928 /* frequency bases */
929 /* divided by 10 to be nice to platforms without floating point */
930 static const int fbase[] = {
931         10000,
932         100000,
933         1000000,
934         10000000,
935 };
936
937 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
938  * to platforms without floating point.
939  */
940 static const u8 multipliers[] = {
941         0,      /* reserved */
942         10,
943         12,
944         13,
945         15,
946         20,
947         25,
948         30,
949         35,
950         40,
951         45,
952         50,
953         55,
954         60,
955         70,
956         80,
957 };
958
959 static void mmc_set_ios(struct mmc *mmc)
960 {
961         if (mmc->cfg->ops->set_ios)
962                 mmc->cfg->ops->set_ios(mmc);
963 }
964
965 void mmc_set_clock(struct mmc *mmc, uint clock)
966 {
967         if (clock > mmc->cfg->f_max)
968                 clock = mmc->cfg->f_max;
969
970         if (clock < mmc->cfg->f_min)
971                 clock = mmc->cfg->f_min;
972
973         mmc->clock = clock;
974
975         mmc_set_ios(mmc);
976 }
977
978 static void mmc_set_bus_width(struct mmc *mmc, uint width)
979 {
980         mmc->bus_width = width;
981
982         mmc_set_ios(mmc);
983 }
984
985 static int mmc_startup(struct mmc *mmc)
986 {
987         int err, i;
988         uint mult, freq;
989         u64 cmult, csize, capacity;
990         struct mmc_cmd cmd;
991         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
992         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
993         int timeout = 1000;
994         bool has_parts = false;
995         bool part_completed;
996         struct blk_desc *bdesc;
997
998 #ifdef CONFIG_MMC_SPI_CRC_ON
999         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1000                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1001                 cmd.resp_type = MMC_RSP_R1;
1002                 cmd.cmdarg = 1;
1003                 err = mmc_send_cmd(mmc, &cmd, NULL);
1004
1005                 if (err)
1006                         return err;
1007         }
1008 #endif
1009
1010         /* Put the Card in Identify Mode */
1011         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1012                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1013         cmd.resp_type = MMC_RSP_R2;
1014         cmd.cmdarg = 0;
1015
1016         err = mmc_send_cmd(mmc, &cmd, NULL);
1017
1018         if (err)
1019                 return err;
1020
1021         memcpy(mmc->cid, cmd.response, 16);
1022
1023         /*
1024          * For MMC cards, set the Relative Address.
1025          * For SD cards, get the Relatvie Address.
1026          * This also puts the cards into Standby State
1027          */
1028         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1029                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1030                 cmd.cmdarg = mmc->rca << 16;
1031                 cmd.resp_type = MMC_RSP_R6;
1032
1033                 err = mmc_send_cmd(mmc, &cmd, NULL);
1034
1035                 if (err)
1036                         return err;
1037
1038                 if (IS_SD(mmc))
1039                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1040         }
1041
1042         /* Get the Card-Specific Data */
1043         cmd.cmdidx = MMC_CMD_SEND_CSD;
1044         cmd.resp_type = MMC_RSP_R2;
1045         cmd.cmdarg = mmc->rca << 16;
1046
1047         err = mmc_send_cmd(mmc, &cmd, NULL);
1048
1049         /* Waiting for the ready status */
1050         mmc_send_status(mmc, timeout);
1051
1052         if (err)
1053                 return err;
1054
1055         mmc->csd[0] = cmd.response[0];
1056         mmc->csd[1] = cmd.response[1];
1057         mmc->csd[2] = cmd.response[2];
1058         mmc->csd[3] = cmd.response[3];
1059
1060         if (mmc->version == MMC_VERSION_UNKNOWN) {
1061                 int version = (cmd.response[0] >> 26) & 0xf;
1062
1063                 switch (version) {
1064                 case 0:
1065                         mmc->version = MMC_VERSION_1_2;
1066                         break;
1067                 case 1:
1068                         mmc->version = MMC_VERSION_1_4;
1069                         break;
1070                 case 2:
1071                         mmc->version = MMC_VERSION_2_2;
1072                         break;
1073                 case 3:
1074                         mmc->version = MMC_VERSION_3;
1075                         break;
1076                 case 4:
1077                         mmc->version = MMC_VERSION_4;
1078                         break;
1079                 default:
1080                         mmc->version = MMC_VERSION_1_2;
1081                         break;
1082                 }
1083         }
1084
1085         /* divide frequency by 10, since the mults are 10x bigger */
1086         freq = fbase[(cmd.response[0] & 0x7)];
1087         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1088
1089         mmc->tran_speed = freq * mult;
1090
1091         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1092         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1093
1094         if (IS_SD(mmc))
1095                 mmc->write_bl_len = mmc->read_bl_len;
1096         else
1097                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1098
1099         if (mmc->high_capacity) {
1100                 csize = (mmc->csd[1] & 0x3f) << 16
1101                         | (mmc->csd[2] & 0xffff0000) >> 16;
1102                 cmult = 8;
1103         } else {
1104                 csize = (mmc->csd[1] & 0x3ff) << 2
1105                         | (mmc->csd[2] & 0xc0000000) >> 30;
1106                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1107         }
1108
1109         mmc->capacity_user = (csize + 1) << (cmult + 2);
1110         mmc->capacity_user *= mmc->read_bl_len;
1111         mmc->capacity_boot = 0;
1112         mmc->capacity_rpmb = 0;
1113         for (i = 0; i < 4; i++)
1114                 mmc->capacity_gp[i] = 0;
1115
1116         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1117                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1118
1119         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1120                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1121
1122         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1123                 cmd.cmdidx = MMC_CMD_SET_DSR;
1124                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1125                 cmd.resp_type = MMC_RSP_NONE;
1126                 if (mmc_send_cmd(mmc, &cmd, NULL))
1127                         printf("MMC: SET_DSR failed\n");
1128         }
1129
1130         /* Select the card, and put it into Transfer Mode */
1131         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1132                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1133                 cmd.resp_type = MMC_RSP_R1;
1134                 cmd.cmdarg = mmc->rca << 16;
1135                 err = mmc_send_cmd(mmc, &cmd, NULL);
1136
1137                 if (err)
1138                         return err;
1139         }
1140
1141         /*
1142          * For SD, its erase group is always one sector
1143          */
1144         mmc->erase_grp_size = 1;
1145         mmc->part_config = MMCPART_NOAVAILABLE;
1146         if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1147                 /* check  ext_csd version and capacity */
1148                 err = mmc_send_ext_csd(mmc, ext_csd);
1149                 if (err)
1150                         return err;
1151                 if (ext_csd[EXT_CSD_REV] >= 2) {
1152                         /*
1153                          * According to the JEDEC Standard, the value of
1154                          * ext_csd's capacity is valid if the value is more
1155                          * than 2GB
1156                          */
1157                         capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1158                                         | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1159                                         | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1160                                         | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1161                         capacity *= MMC_MAX_BLOCK_LEN;
1162                         if ((capacity >> 20) > 2 * 1024)
1163                                 mmc->capacity_user = capacity;
1164                 }
1165
1166                 switch (ext_csd[EXT_CSD_REV]) {
1167                 case 1:
1168                         mmc->version = MMC_VERSION_4_1;
1169                         break;
1170                 case 2:
1171                         mmc->version = MMC_VERSION_4_2;
1172                         break;
1173                 case 3:
1174                         mmc->version = MMC_VERSION_4_3;
1175                         break;
1176                 case 5:
1177                         mmc->version = MMC_VERSION_4_41;
1178                         break;
1179                 case 6:
1180                         mmc->version = MMC_VERSION_4_5;
1181                         break;
1182                 case 7:
1183                         mmc->version = MMC_VERSION_5_0;
1184                         break;
1185                 case 8:
1186                         mmc->version = MMC_VERSION_5_1;
1187                         break;
1188                 }
1189
1190                 /* The partition data may be non-zero but it is only
1191                  * effective if PARTITION_SETTING_COMPLETED is set in
1192                  * EXT_CSD, so ignore any data if this bit is not set,
1193                  * except for enabling the high-capacity group size
1194                  * definition (see below). */
1195                 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1196                                     EXT_CSD_PARTITION_SETTING_COMPLETED);
1197
1198                 /* store the partition info of emmc */
1199                 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1200                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1201                     ext_csd[EXT_CSD_BOOT_MULT])
1202                         mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1203                 if (part_completed &&
1204                     (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1205                         mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1206
1207                 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1208
1209                 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1210
1211                 for (i = 0; i < 4; i++) {
1212                         int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1213                         uint mult = (ext_csd[idx + 2] << 16) +
1214                                 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1215                         if (mult)
1216                                 has_parts = true;
1217                         if (!part_completed)
1218                                 continue;
1219                         mmc->capacity_gp[i] = mult;
1220                         mmc->capacity_gp[i] *=
1221                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1222                         mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1223                         mmc->capacity_gp[i] <<= 19;
1224                 }
1225
1226                 if (part_completed) {
1227                         mmc->enh_user_size =
1228                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1229                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1230                                 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1231                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1232                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1233                         mmc->enh_user_size <<= 19;
1234                         mmc->enh_user_start =
1235                                 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1236                                 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1237                                 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1238                                 ext_csd[EXT_CSD_ENH_START_ADDR];
1239                         if (mmc->high_capacity)
1240                                 mmc->enh_user_start <<= 9;
1241                 }
1242
1243                 /*
1244                  * Host needs to enable ERASE_GRP_DEF bit if device is
1245                  * partitioned. This bit will be lost every time after a reset
1246                  * or power off. This will affect erase size.
1247                  */
1248                 if (part_completed)
1249                         has_parts = true;
1250                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1251                     (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1252                         has_parts = true;
1253                 if (has_parts) {
1254                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1255                                 EXT_CSD_ERASE_GROUP_DEF, 1);
1256
1257                         if (err)
1258                                 return err;
1259                         else
1260                                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1261                 }
1262
1263                 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1264                         /* Read out group size from ext_csd */
1265                         mmc->erase_grp_size =
1266                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1267                         /*
1268                          * if high capacity and partition setting completed
1269                          * SEC_COUNT is valid even if it is smaller than 2 GiB
1270                          * JEDEC Standard JESD84-B45, 6.2.4
1271                          */
1272                         if (mmc->high_capacity && part_completed) {
1273                                 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1274                                         (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1275                                         (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1276                                         (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1277                                 capacity *= MMC_MAX_BLOCK_LEN;
1278                                 mmc->capacity_user = capacity;
1279                         }
1280                 } else {
1281                         /* Calculate the group size from the csd value. */
1282                         int erase_gsz, erase_gmul;
1283                         erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1284                         erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1285                         mmc->erase_grp_size = (erase_gsz + 1)
1286                                 * (erase_gmul + 1);
1287                 }
1288
1289                 mmc->hc_wp_grp_size = 1024
1290                         * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1291                         * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1292
1293                 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1294         }
1295
1296         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1297         if (err)
1298                 return err;
1299
1300         if (IS_SD(mmc))
1301                 err = sd_change_freq(mmc);
1302         else
1303                 err = mmc_change_freq(mmc);
1304
1305         if (err)
1306                 return err;
1307
1308         /* Restrict card's capabilities by what the host can do */
1309         mmc->card_caps &= mmc->cfg->host_caps;
1310
1311         if (IS_SD(mmc)) {
1312                 if (mmc->card_caps & MMC_MODE_4BIT) {
1313                         cmd.cmdidx = MMC_CMD_APP_CMD;
1314                         cmd.resp_type = MMC_RSP_R1;
1315                         cmd.cmdarg = mmc->rca << 16;
1316
1317                         err = mmc_send_cmd(mmc, &cmd, NULL);
1318                         if (err)
1319                                 return err;
1320
1321                         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1322                         cmd.resp_type = MMC_RSP_R1;
1323                         cmd.cmdarg = 2;
1324                         err = mmc_send_cmd(mmc, &cmd, NULL);
1325                         if (err)
1326                                 return err;
1327
1328                         mmc_set_bus_width(mmc, 4);
1329                 }
1330
1331                 if (mmc->card_caps & MMC_MODE_HS)
1332                         mmc->tran_speed = 50000000;
1333                 else
1334                         mmc->tran_speed = 25000000;
1335         } else if (mmc->version >= MMC_VERSION_4) {
1336                 /* Only version 4 of MMC supports wider bus widths */
1337                 int idx;
1338
1339                 /* An array of possible bus widths in order of preference */
1340                 static unsigned ext_csd_bits[] = {
1341                         EXT_CSD_DDR_BUS_WIDTH_8,
1342                         EXT_CSD_DDR_BUS_WIDTH_4,
1343                         EXT_CSD_BUS_WIDTH_8,
1344                         EXT_CSD_BUS_WIDTH_4,
1345                         EXT_CSD_BUS_WIDTH_1,
1346                 };
1347
1348                 /* An array to map CSD bus widths to host cap bits */
1349                 static unsigned ext_to_hostcaps[] = {
1350                         [EXT_CSD_DDR_BUS_WIDTH_4] =
1351                                 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1352                         [EXT_CSD_DDR_BUS_WIDTH_8] =
1353                                 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1354                         [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1355                         [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1356                 };
1357
1358                 /* An array to map chosen bus width to an integer */
1359                 static unsigned widths[] = {
1360                         8, 4, 8, 4, 1,
1361                 };
1362
1363                 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1364                         unsigned int extw = ext_csd_bits[idx];
1365                         unsigned int caps = ext_to_hostcaps[extw];
1366
1367                         /*
1368                          * If the bus width is still not changed,
1369                          * don't try to set the default again.
1370                          * Otherwise, recover from switch attempts
1371                          * by switching to 1-bit bus width.
1372                          */
1373                         if (extw == EXT_CSD_BUS_WIDTH_1 &&
1374                                         mmc->bus_width == 1) {
1375                                 err = 0;
1376                                 break;
1377                         }
1378
1379                         /*
1380                          * Check to make sure the card and controller support
1381                          * these capabilities
1382                          */
1383                         if ((mmc->card_caps & caps) != caps)
1384                                 continue;
1385
1386                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1387                                         EXT_CSD_BUS_WIDTH, extw);
1388
1389                         if (err)
1390                                 continue;
1391
1392                         mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1393                         mmc_set_bus_width(mmc, widths[idx]);
1394
1395                         err = mmc_send_ext_csd(mmc, test_csd);
1396
1397                         if (err)
1398                                 continue;
1399
1400                         /* Only compare read only fields */
1401                         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1402                                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1403                             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1404                                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1405                             ext_csd[EXT_CSD_REV]
1406                                 == test_csd[EXT_CSD_REV] &&
1407                             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1408                                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1409                             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1410                                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1411                                 break;
1412                         else
1413                                 err = SWITCH_ERR;
1414                 }
1415
1416                 if (err)
1417                         return err;
1418
1419                 if (mmc->card_caps & MMC_MODE_HS) {
1420                         if (mmc->card_caps & MMC_MODE_HS_52MHz)
1421                                 mmc->tran_speed = 52000000;
1422                         else
1423                                 mmc->tran_speed = 26000000;
1424                 }
1425         }
1426
1427         mmc_set_clock(mmc, mmc->tran_speed);
1428
1429         /* Fix the block length for DDR mode */
1430         if (mmc->ddr_mode) {
1431                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1432                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1433         }
1434
1435         /* fill in device description */
1436         bdesc = mmc_get_blk_desc(mmc);
1437         bdesc->lun = 0;
1438         bdesc->hwpart = 0;
1439         bdesc->type = 0;
1440         bdesc->blksz = mmc->read_bl_len;
1441         bdesc->log2blksz = LOG2(bdesc->blksz);
1442         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1443 #if !defined(CONFIG_SPL_BUILD) || \
1444                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1445                 !defined(CONFIG_USE_TINY_PRINTF))
1446         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1447                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1448                 (mmc->cid[3] >> 16) & 0xffff);
1449         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1450                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1451                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1452                 (mmc->cid[2] >> 24) & 0xff);
1453         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1454                 (mmc->cid[2] >> 16) & 0xf);
1455 #else
1456         bdesc->vendor[0] = 0;
1457         bdesc->product[0] = 0;
1458         bdesc->revision[0] = 0;
1459 #endif
1460 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1461         part_init(bdesc);
1462 #endif
1463
1464         return 0;
1465 }
1466
1467 static int mmc_send_if_cond(struct mmc *mmc)
1468 {
1469         struct mmc_cmd cmd;
1470         int err;
1471
1472         cmd.cmdidx = SD_CMD_SEND_IF_COND;
1473         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1474         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1475         cmd.resp_type = MMC_RSP_R7;
1476
1477         err = mmc_send_cmd(mmc, &cmd, NULL);
1478
1479         if (err)
1480                 return err;
1481
1482         if ((cmd.response[0] & 0xff) != 0xaa)
1483                 return UNUSABLE_ERR;
1484         else
1485                 mmc->version = SD_VERSION_2;
1486
1487         return 0;
1488 }
1489
1490 /* board-specific MMC power initializations. */
1491 __weak void board_mmc_power_init(void)
1492 {
1493 }
1494
1495 int mmc_start_init(struct mmc *mmc)
1496 {
1497         int err;
1498
1499         /* we pretend there's no card when init is NULL */
1500         if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1501                 mmc->has_init = 0;
1502 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1503                 printf("MMC: no card present\n");
1504 #endif
1505                 return NO_CARD_ERR;
1506         }
1507
1508         if (mmc->has_init)
1509                 return 0;
1510
1511 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1512         mmc_adapter_card_type_ident();
1513 #endif
1514         board_mmc_power_init();
1515
1516         /* made sure it's not NULL earlier */
1517         err = mmc->cfg->ops->init(mmc);
1518
1519         if (err)
1520                 return err;
1521
1522         mmc->ddr_mode = 0;
1523         mmc_set_bus_width(mmc, 1);
1524         mmc_set_clock(mmc, 1);
1525
1526         /* Reset the Card */
1527         err = mmc_go_idle(mmc);
1528
1529         if (err)
1530                 return err;
1531
1532         /* The internal partition reset to user partition(0) at every CMD0*/
1533         mmc_get_blk_desc(mmc)->hwpart = 0;
1534
1535         /* Test for SD version 2 */
1536         err = mmc_send_if_cond(mmc);
1537
1538         /* Now try to get the SD card's operating condition */
1539         err = sd_send_op_cond(mmc);
1540
1541         /* If the command timed out, we check for an MMC card */
1542         if (err == TIMEOUT) {
1543                 err = mmc_send_op_cond(mmc);
1544
1545                 if (err) {
1546 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1547                         printf("Card did not respond to voltage select!\n");
1548 #endif
1549                         return UNUSABLE_ERR;
1550                 }
1551         }
1552
1553         if (!err)
1554                 mmc->init_in_progress = 1;
1555
1556         return err;
1557 }
1558
1559 static int mmc_complete_init(struct mmc *mmc)
1560 {
1561         int err = 0;
1562
1563         mmc->init_in_progress = 0;
1564         if (mmc->op_cond_pending)
1565                 err = mmc_complete_op_cond(mmc);
1566
1567         if (!err)
1568                 err = mmc_startup(mmc);
1569         if (err)
1570                 mmc->has_init = 0;
1571         else
1572                 mmc->has_init = 1;
1573         return err;
1574 }
1575
1576 int mmc_init(struct mmc *mmc)
1577 {
1578         int err = 0;
1579         unsigned start;
1580 #ifdef CONFIG_DM_MMC
1581         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
1582
1583         upriv->mmc = mmc;
1584 #endif
1585         if (mmc->has_init)
1586                 return 0;
1587
1588         start = get_timer(0);
1589
1590         if (!mmc->init_in_progress)
1591                 err = mmc_start_init(mmc);
1592
1593         if (!err)
1594                 err = mmc_complete_init(mmc);
1595         debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1596         return err;
1597 }
1598
1599 int mmc_set_dsr(struct mmc *mmc, u16 val)
1600 {
1601         mmc->dsr = val;
1602         return 0;
1603 }
1604
1605 /* CPU-specific MMC initializations */
1606 __weak int cpu_mmc_init(bd_t *bis)
1607 {
1608         return -1;
1609 }
1610
1611 /* board-specific MMC initializations. */
1612 __weak int board_mmc_init(bd_t *bis)
1613 {
1614         return -1;
1615 }
1616
1617 void mmc_set_preinit(struct mmc *mmc, int preinit)
1618 {
1619         mmc->preinit = preinit;
1620 }
1621
1622 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1623 static int mmc_probe(bd_t *bis)
1624 {
1625         return 0;
1626 }
1627 #elif defined(CONFIG_DM_MMC)
1628 static int mmc_probe(bd_t *bis)
1629 {
1630         int ret, i;
1631         struct uclass *uc;
1632         struct udevice *dev;
1633
1634         ret = uclass_get(UCLASS_MMC, &uc);
1635         if (ret)
1636                 return ret;
1637
1638         /*
1639          * Try to add them in sequence order. Really with driver model we
1640          * should allow holes, but the current MMC list does not allow that.
1641          * So if we request 0, 1, 3 we will get 0, 1, 2.
1642          */
1643         for (i = 0; ; i++) {
1644                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1645                 if (ret == -ENODEV)
1646                         break;
1647         }
1648         uclass_foreach_dev(dev, uc) {
1649                 ret = device_probe(dev);
1650                 if (ret)
1651                         printf("%s - probe failed: %d\n", dev->name, ret);
1652         }
1653
1654         return 0;
1655 }
1656 #else
1657 static int mmc_probe(bd_t *bis)
1658 {
1659         if (board_mmc_init(bis) < 0)
1660                 cpu_mmc_init(bis);
1661
1662         return 0;
1663 }
1664 #endif
1665
1666 int mmc_initialize(bd_t *bis)
1667 {
1668         static int initialized = 0;
1669         int ret;
1670         if (initialized)        /* Avoid initializing mmc multiple times */
1671                 return 0;
1672         initialized = 1;
1673
1674 #ifndef CONFIG_BLK
1675         mmc_list_init();
1676 #endif
1677         ret = mmc_probe(bis);
1678         if (ret)
1679                 return ret;
1680
1681 #ifndef CONFIG_SPL_BUILD
1682         print_mmc_devices(',');
1683 #endif
1684
1685         mmc_do_preinit();
1686         return 0;
1687 }