1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2018 Cisco Systems, Inc.
5 * Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
9 #include <mach/sdhci.h>
14 * The BCMSTB SDHCI has a quirk in that its actual maximum frequency
15 * capability is 100 MHz. The divisor that is eventually written to
16 * SDHCI_CLOCK_CONTROL is calculated based on what the MMC device
17 * reports, and relative to this maximum frequency.
19 * This define used to be set to 52000000 (52 MHz), the desired
20 * maximum frequency, but that would result in the communication
21 * actually running at 100 MHz (seemingly without issue), which is
24 * Now, by setting this to 0 (auto-detect), 100 MHz will be read from
25 * the capabilities register, and the resulting divisor will be
26 * doubled, meaning that the clock control register will be set to the
27 * in-spec 52 MHz value.
29 #define BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY 0
31 * When the minimum clock frequency is set to 0 (auto-detect), U-Boot
32 * sets it to 100 MHz divided by SDHCI_MAX_DIV_SPEC_300, or 48,875 Hz,
33 * which results in the controller timing out when trying to
34 * communicate with the MMC device. Hard-code this value to 400000
35 * (400 kHz) to prevent this.
37 #define BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY 400000
39 static char *BCMSTB_SDHCI_NAME = "bcmstb-sdhci";
42 * This driver has only been tested with eMMC devices; SD devices may
45 int bcmstb_sdhci_init(phys_addr_t regbase)
47 struct sdhci_host *host = NULL;
49 host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
51 printf("%s: Failed to allocate memory\n", __func__);
54 memset(host, 0, sizeof(*host));
56 host->name = BCMSTB_SDHCI_NAME;
57 host->ioaddr = (void *)regbase;
60 host->cfg.part_type = PART_TYPE_DOS;
62 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
64 return add_sdhci(host,
65 BCMSTB_SDHCI_MAXIMUM_CLOCK_FREQUENCY,
66 BCMSTB_SDHCI_MINIMUM_CLOCK_FREQUENCY);