1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016, NVIDIA CORPORATION.
12 #include <asm/arch-tegra/bpmp_abi.h>
13 #include <asm/arch-tegra/ivc.h>
15 #define BPMP_IVC_FRAME_COUNT 1
16 #define BPMP_IVC_FRAME_SIZE 128
18 #define BPMP_FLAG_DO_ACK BIT(0)
19 #define BPMP_FLAG_RING_DOORBELL BIT(1)
21 DECLARE_GLOBAL_DATA_PTR;
23 struct tegra186_bpmp {
24 struct mbox_chan mbox;
28 static int tegra186_bpmp_call(struct udevice *dev, int mrq, void *tx_msg,
29 int tx_size, void *rx_msg, int rx_size)
31 struct tegra186_bpmp *priv = dev_get_priv(dev);
34 struct mrq_request *req;
35 struct mrq_response *resp;
38 debug("%s(dev=%p, mrq=%u, tx_msg=%p, tx_size=%d, rx_msg=%p, rx_size=%d) (priv=%p)\n",
39 __func__, dev, mrq, tx_msg, tx_size, rx_msg, rx_size, priv);
41 if ((tx_size > BPMP_IVC_FRAME_SIZE) || (rx_size > BPMP_IVC_FRAME_SIZE))
44 ret = tegra_ivc_write_get_next_frame(&priv->ivc, &ivc_frame);
46 pr_err("tegra_ivc_write_get_next_frame() failed: %d\n", ret);
52 req->flags = BPMP_FLAG_DO_ACK | BPMP_FLAG_RING_DOORBELL;
53 memcpy(req + 1, tx_msg, tx_size);
55 ret = tegra_ivc_write_advance(&priv->ivc);
57 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
61 start_time = timer_get_us();
63 ret = tegra_ivc_channel_notified(&priv->ivc);
65 pr_err("tegra_ivc_channel_notified() failed: %d\n", ret);
69 ret = tegra_ivc_read_get_next_frame(&priv->ivc, &ivc_frame);
73 /* Timeout 20ms; roughly 10x current max observed duration */
74 if ((timer_get_us() - start_time) > 20 * 1000) {
75 pr_err("tegra_ivc_read_get_next_frame() timed out (%d)\n",
83 if (!err && rx_msg && rx_size)
84 memcpy(rx_msg, resp + 1, rx_size);
86 ret = tegra_ivc_read_advance(&priv->ivc);
88 pr_err("tegra_ivc_write_advance() failed: %d\n", ret);
93 pr_err("BPMP responded with error %d\n", err);
94 /* err isn't a U-Boot error code, so don't that */
102 * The BPMP exposes multiple different services. We create a sub-device for
103 * each separate type of service, since each device must be of the appropriate
106 static int tegra186_bpmp_bind(struct udevice *dev)
109 struct udevice *child;
111 debug("%s(dev=%p)\n", __func__, dev);
113 ret = device_bind_driver_to_node(dev, "tegra186_clk", "tegra186_clk",
114 dev_ofnode(dev), &child);
118 ret = device_bind_driver_to_node(dev, "tegra186_reset",
119 "tegra186_reset", dev_ofnode(dev),
124 ret = device_bind_driver_to_node(dev, "tegra186_power_domain",
125 "tegra186_power_domain",
126 dev_ofnode(dev), &child);
130 ret = dm_scan_fdt_dev(dev);
137 static ulong tegra186_bpmp_get_shmem(struct udevice *dev, int index)
140 struct fdtdec_phandle_args args;
143 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
144 "shmem", NULL, 0, index, &args);
146 pr_err("fdtdec_parse_phandle_with_args() failed: %d\n", ret);
150 reg = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, args.node,
151 "reg", 0, NULL, true);
152 if (reg == FDT_ADDR_T_NONE) {
153 pr_err("fdtdec_get_addr_size_auto_noparent() failed\n");
160 static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc)
162 struct tegra186_bpmp *priv =
163 container_of(ivc, struct tegra186_bpmp, ivc);
166 ret = mbox_send(&priv->mbox, NULL);
168 pr_err("mbox_send() failed: %d\n", ret);
171 static int tegra186_bpmp_probe(struct udevice *dev)
173 struct tegra186_bpmp *priv = dev_get_priv(dev);
175 ulong tx_base, rx_base, start_time;
177 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
179 ret = mbox_get_by_index(dev, 0, &priv->mbox);
181 pr_err("mbox_get_by_index() failed: %d\n", ret);
185 tx_base = tegra186_bpmp_get_shmem(dev, 0);
186 if (IS_ERR_VALUE(tx_base)) {
187 pr_err("tegra186_bpmp_get_shmem failed for tx_base\n");
190 rx_base = tegra186_bpmp_get_shmem(dev, 1);
191 if (IS_ERR_VALUE(rx_base)) {
192 pr_err("tegra186_bpmp_get_shmem failed for rx_base\n");
195 debug("shmem: rx=%lx, tx=%lx\n", rx_base, tx_base);
197 ret = tegra_ivc_init(&priv->ivc, rx_base, tx_base, BPMP_IVC_FRAME_COUNT,
198 BPMP_IVC_FRAME_SIZE, tegra186_bpmp_ivc_notify);
200 pr_err("tegra_ivc_init() failed: %d\n", ret);
204 tegra_ivc_channel_reset(&priv->ivc);
205 start_time = timer_get_us();
207 ret = tegra_ivc_channel_notified(&priv->ivc);
212 if ((timer_get_us() - start_time) > 100 * 1000) {
213 pr_err("Initial IVC reset timed out (%d)\n", ret);
222 mbox_free(&priv->mbox);
227 static int tegra186_bpmp_remove(struct udevice *dev)
229 struct tegra186_bpmp *priv = dev_get_priv(dev);
231 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
233 mbox_free(&priv->mbox);
238 static struct misc_ops tegra186_bpmp_ops = {
239 .call = tegra186_bpmp_call,
242 static const struct udevice_id tegra186_bpmp_ids[] = {
243 { .compatible = "nvidia,tegra186-bpmp" },
247 U_BOOT_DRIVER(tegra186_bpmp) = {
248 .name = "tegra186_bpmp",
250 .of_match = tegra186_bpmp_ids,
251 .bind = tegra186_bpmp_bind,
252 .probe = tegra186_bpmp_probe,
253 .remove = tegra186_bpmp_remove,
254 .ops = &tegra186_bpmp_ops,
255 .priv_auto_alloc_size = sizeof(struct tegra186_bpmp),