1 // SPDX-License-Identifier: GPL-2.0+
4 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
8 * Based on sc520cdp.c from rolo 1.6:
9 *----------------------------------------------------------------------
11 * Sysgo Real-Time Solutions GmbH
12 * Klein-Winternheim, Germany
13 *----------------------------------------------------------------------
23 /* ALI M5123 Logical device numbers:
36 ************************************************************
37 * Some access primitives for the ALi chip: *
38 ************************************************************
41 static void ali_write(u8 index, u8 value)
43 /* write an arbirary register */
44 outb(index, ALI_INDEX);
45 outb(value, ALI_DATA);
49 static int ali_read(u8 index)
51 outb(index, ALI_INDEX);
57 outb(0x51, ALI_INDEX); \
64 /* Select a logical device */
65 #define ALI_SELDEV(dev) \
69 void ali512x_init(void)
73 ali_write(0x02, 0x01); /* soft reset */
74 ali_write(0x03, 0x03); /* disable access to CIOs */
75 ali_write(0x22, 0x00); /* disable direct powerdown */
76 ali_write(0x23, 0x00); /* disable auto powerdown */
77 ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
82 void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
87 ali_write(0x30, enabled?1:0);
89 ali_write(0x60, io >> 8);
90 ali_write(0x61, io & 0xff);
92 ali_write(0x74, dma_channel);
94 /* AT mode, no drive swap */
95 ali_write(0xf0, 0x08);
96 ali_write(0xf1, 0x00);
97 ali_write(0xf2, 0xff);
98 ali_write(0xf4, 0x00);
104 void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
109 ali_write(0x30, enabled?1:0);
111 ali_write(0x60, io >> 8);
112 ali_write(0x61, io & 0xff);
113 ali_write(0x70, irq);
114 ali_write(0x74, dma_channel);
116 /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
117 ali_write(0xf0, 0xbc);
118 /* 12 MHz, Burst DMA in ECP */
119 ali_write(0xf1, 0x05);
125 void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
128 ALI_SELDEV(index?5:4);
130 ali_write(0x30, enabled?1:0);
132 ali_write(0x60, io >> 8);
133 ali_write(0x61, io & 0xff);
134 ali_write(0x70, irq);
136 ali_write(0xf0, 0x00);
137 ali_write(0xf1, 0x00);
139 /* huh? write 0xf2 twice - a typo in rolo
140 * or some secret ali errata? Who knows?
143 ali_write(0xf2, 0x00);
145 ali_write(0xf2, 0x0c);
151 void ali512x_set_uart2_irda(int enabled)
156 ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
161 void ali512x_set_rtc(int enabled, u16 io, u8 irq)
166 ali_write(0x30, enabled?1:0);
168 ali_write(0x60, io >> 8);
169 ali_write(0x61, io & 0xff);
170 ali_write(0x70, irq);
172 ali_write(0xf0, 0x00);
177 void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
182 ali_write(0x30, enabled?1:0);
184 ali_write(0x70, kbc_irq);
185 ali_write(0x72, mouse_irq);
187 ali_write(0xf0, 0x00);
195 * (This descripotsion is base on several incompete sources
196 * since I have not been able to obtain any datasheet for the device
197 * there may be some mis-understandings burried in here.
198 * -- Daniel daniel@omicron.se)
200 * There are 22 CIO pins numbered
205 * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
209 * CIO Pin Function Decription
210 * =======================================================
211 * CIO10 IRQIN1 Interrupt input 1?
212 * CIO11 IRQIN2 Interrupt input 2?
213 * CIO12 IRRX IrDa Receive
214 * CIO13 IRTX IrDa Transmit
215 * CIO14 P21 KBC P21 fucntion
216 * CIO15 P20 KBC P21 fucntion
217 * CIO16 I2C_CLK I2C Clock
218 * CIO17 I2C_DAT I2C Data
227 * CIO30 KBC_CLK Keybaord Clock
228 * CIO31 CS0J General Chip Select decoder CS0J
229 * CIO32 CS1J General Chip Select decoder CS1J
230 * CIO33 ALT_KCLK Alternative Keyboard Clock
231 * CIO34 ALT_KDAT Alternative Keyboard Data
232 * CIO35 ALT_MCLK Alternative Mouse Clock
233 * CIO36 ALT_MDAT Alternative Mouse Data
234 * CIO37 ALT_KBC Alternative KBC select
236 * The CIO use an indirect address scheme.
238 * Reigster 3 in the SIO is used to select the index and data
239 * port addresses where the CIO I/O registers show up.
240 * The function selection registers are accessible under
243 * SIO reigster 3 (CIO Address Selection) bit definitions:
244 * bit 7 CIO index and data registers enabled
245 * bit 1-0 CIO indirect registers port address select
246 * 0 index = 0xE0 data = 0xE1
247 * 1 index = 0xE2 data = 0xE3
248 * 2 index = 0xE4 data = 0xE5
249 * 3 index = 0xEA data = 0xEB
251 * There are three CIO I/O register accessed via CIO index port and CIO data port
252 * 0x01 CIO 10-17 data
253 * 0x02 CIO 20-25 data (bits 7-6 unused)
254 * 0x03 CIO 30-37 data
257 * The pin function is accessed through normal
258 * SIO registers, each register have the same format:
261 * 0 Input/output 1=input
262 * 1 Polarity of signal 1=inverted
264 * 3 Function (normal or special) 1=special
295 #define ALI_CIO_PORT_SEL 0x83
296 #define ALI_CIO_INDEX 0xea
297 #define ALI_CIO_DATA 0xeb
299 void ali512x_set_cio(int enabled)
306 ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */
308 ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80);
313 ali_write(0x30, enabled?1:0);
315 /* set all pins to input to start with */
316 for (i=0xe0;i<0xee;i++) {
320 for (i=0xf5;i<0xfe;i++) {
328 void ali512x_cio_function(int pin, int special, int inv, int input)
333 /* valid pins are 10-17, 20-25 and 30-37 */
334 if (pin >= 10 && pin <= 17) {
336 } else if (pin >= 20 && pin <= 25) {
338 } else if (pin >= 30 && pin <= 37) {
361 ali_write(addr, data);
366 void ali512x_cio_out(int pin, int value)
376 outb(reg, ALI_CIO_INDEX); /* select I/O register */
377 data = inb(ALI_CIO_DATA);
383 outb(data, ALI_CIO_DATA);
386 int ali512x_cio_in(int pin)
392 /* valid pins are 10-17, 20-25 and 30-37 */
397 outb(reg, ALI_CIO_INDEX); /* select I/O register */
398 data = inb(ALI_CIO_DATA);