drivers/media/i2c/ov5645.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Driver for the OV5645 camera sensor.
   4  *
   5  * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
   6  * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
   7  * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
   8  *
   9  * Based on:
  10  * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
  11  *   https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
  12  *       media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
  13  * - the OV5640 driver posted on linux-media:
  14  *   https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
  15  */
  16
  17 /*
  18  */
  19
  20 #include <linux/bitops.h>
  21 #include <linux/clk.h>
  22 #include <linux/delay.h>
  23 #include <linux/device.h>
  24 #include <linux/gpio/consumer.h>
  25 #include <linux/i2c.h>
  26 #include <linux/init.h>
  27 #include <linux/module.h>
  28 #include <linux/of.h>
  29 #include <linux/of_graph.h>
  30 #include <linux/regulator/consumer.h>
  31 #include <linux/slab.h>
  32 #include <linux/types.h>
  33 #include <media/v4l2-ctrls.h>
  34 #include <media/v4l2-fwnode.h>
  35 #include <media/v4l2-subdev.h>
  36
  37 #define OV5645_VOLTAGE_ANALOG               2800000
  38 #define OV5645_VOLTAGE_DIGITAL_CORE         1500000
  39 #define OV5645_VOLTAGE_DIGITAL_IO           1800000
  40
  41 #define OV5645_SYSTEM_CTRL0             0x3008
  42 #define         OV5645_SYSTEM_CTRL0_START       0x02
  43 #define         OV5645_SYSTEM_CTRL0_STOP        0x42
  44 #define OV5645_CHIP_ID_HIGH             0x300a
  45 #define         OV5645_CHIP_ID_HIGH_BYTE        0x56
  46 #define OV5645_CHIP_ID_LOW              0x300b
  47 #define         OV5645_CHIP_ID_LOW_BYTE         0x45
  48 #define OV5645_IO_MIPI_CTRL00           0x300e
  49 #define OV5645_PAD_OUTPUT00             0x3019
  50 #define OV5645_AWB_MANUAL_CONTROL       0x3406
  51 #define         OV5645_AWB_MANUAL_ENABLE        BIT(0)
  52 #define OV5645_AEC_PK_MANUAL            0x3503
  53 #define         OV5645_AEC_MANUAL_ENABLE        BIT(0)
  54 #define         OV5645_AGC_MANUAL_ENABLE        BIT(1)
  55 #define OV5645_TIMING_TC_REG20          0x3820
  56 #define         OV5645_SENSOR_VFLIP             BIT(1)
  57 #define         OV5645_ISP_VFLIP                BIT(2)
  58 #define OV5645_TIMING_TC_REG21          0x3821
  59 #define         OV5645_SENSOR_MIRROR            BIT(1)
  60 #define OV5645_MIPI_CTRL00              0x4800
  61 #define OV5645_PRE_ISP_TEST_SETTING_1   0x503d
  62 #define         OV5645_TEST_PATTERN_MASK        0x3
  63 #define         OV5645_SET_TEST_PATTERN(x)      ((x) & OV5645_TEST_PATTERN_MASK)
  64 #define         OV5645_TEST_PATTERN_ENABLE      BIT(7)
  65 #define OV5645_SDE_SAT_U                0x5583
  66 #define OV5645_SDE_SAT_V                0x5584
  67
  68 struct reg_value {
  69         u16 reg;
  70         u8 val;
  71 };
  72
  73 struct ov5645_mode_info {
  74         u32 width;
  75         u32 height;
  76         const struct reg_value *data;
  77         u32 data_size;
  78         u32 pixel_clock;
  79         u32 link_freq;
  80 };
  81
  82 struct ov5645 {
  83         struct i2c_client *i2c_client;
  84         struct device *dev;
  85         struct v4l2_subdev sd;
  86         struct media_pad pad;
  87         struct v4l2_fwnode_endpoint ep;
  88         struct v4l2_mbus_framefmt fmt;
  89         struct v4l2_rect crop;
  90         struct clk *xclk;
  91
  92         struct regulator *io_regulator;
  93         struct regulator *core_regulator;
  94         struct regulator *analog_regulator;
  95
  96         const struct ov5645_mode_info *current_mode;
  97
  98         struct v4l2_ctrl_handler ctrls;
  99         struct v4l2_ctrl *pixel_clock;
 100         struct v4l2_ctrl *link_freq;
 101
 102         /* Cached register values */
 103         u8 aec_pk_manual;
 104         u8 timing_tc_reg20;
 105         u8 timing_tc_reg21;
 106
 107         struct mutex power_lock; /* lock to protect power state */
 108         int power_count;
 109
 110         struct gpio_desc *enable_gpio;
 111         struct gpio_desc *rst_gpio;
 112 };
 113
 114 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
 115 {
 116         return container_of(sd, struct ov5645, sd);
 117 }
 118
 119 static const struct reg_value ov5645_global_init_setting[] = {
 120         { 0x3103, 0x11 },
 121         { 0x3008, 0x82 },
 122         { 0x3008, 0x42 },
 123         { 0x3103, 0x03 },
 124         { 0x3503, 0x07 },
 125         { 0x3002, 0x1c },
 126         { 0x3006, 0xc3 },
 127         { 0x3017, 0x00 },
 128         { 0x3018, 0x00 },
 129         { 0x302e, 0x0b },
 130         { 0x3037, 0x13 },
 131         { 0x3108, 0x01 },
 132         { 0x3611, 0x06 },
 133         { 0x3500, 0x00 },
 134         { 0x3501, 0x01 },
 135         { 0x3502, 0x00 },
 136         { 0x350a, 0x00 },
 137         { 0x350b, 0x3f },
 138         { 0x3620, 0x33 },
 139         { 0x3621, 0xe0 },
 140         { 0x3622, 0x01 },
 141         { 0x3630, 0x2e },
 142         { 0x3631, 0x00 },
 143         { 0x3632, 0x32 },
 144         { 0x3633, 0x52 },
 145         { 0x3634, 0x70 },
 146         { 0x3635, 0x13 },
 147         { 0x3636, 0x03 },
 148         { 0x3703, 0x5a },
 149         { 0x3704, 0xa0 },
 150         { 0x3705, 0x1a },
 151         { 0x3709, 0x12 },
 152         { 0x370b, 0x61 },
 153         { 0x370f, 0x10 },
 154         { 0x3715, 0x78 },
 155         { 0x3717, 0x01 },
 156         { 0x371b, 0x20 },
 157         { 0x3731, 0x12 },
 158         { 0x3901, 0x0a },
 159         { 0x3905, 0x02 },
 160         { 0x3906, 0x10 },
 161         { 0x3719, 0x86 },
 162         { 0x3810, 0x00 },
 163         { 0x3811, 0x10 },
 164         { 0x3812, 0x00 },
 165         { 0x3821, 0x01 },
 166         { 0x3824, 0x01 },
 167         { 0x3826, 0x03 },
 168         { 0x3828, 0x08 },
 169         { 0x3a19, 0xf8 },
 170         { 0x3c01, 0x34 },
 171         { 0x3c04, 0x28 },
 172         { 0x3c05, 0x98 },
 173         { 0x3c07, 0x07 },
 174         { 0x3c09, 0xc2 },
 175         { 0x3c0a, 0x9c },
 176         { 0x3c0b, 0x40 },
 177         { 0x3c01, 0x34 },
 178         { 0x4001, 0x02 },
 179         { 0x4514, 0x00 },
 180         { 0x4520, 0xb0 },
 181         { 0x460b, 0x37 },
 182         { 0x460c, 0x20 },
 183         { 0x4818, 0x01 },
 184         { 0x481d, 0xf0 },
 185         { 0x481f, 0x50 },
 186         { 0x4823, 0x70 },
 187         { 0x4831, 0x14 },
 188         { 0x5000, 0xa7 },
 189         { 0x5001, 0x83 },
 190         { 0x501d, 0x00 },
 191         { 0x501f, 0x00 },
 192         { 0x503d, 0x00 },
 193         { 0x505c, 0x30 },
 194         { 0x5181, 0x59 },
 195         { 0x5183, 0x00 },
 196         { 0x5191, 0xf0 },
 197         { 0x5192, 0x03 },
 198         { 0x5684, 0x10 },
 199         { 0x5685, 0xa0 },
 200         { 0x5686, 0x0c },
 201         { 0x5687, 0x78 },
 202         { 0x5a00, 0x08 },
 203         { 0x5a21, 0x00 },
 204         { 0x5a24, 0x00 },
 205         { 0x3008, 0x02 },
 206         { 0x3503, 0x00 },
 207         { 0x5180, 0xff },
 208         { 0x5181, 0xf2 },
 209         { 0x5182, 0x00 },
 210         { 0x5183, 0x14 },
 211         { 0x5184, 0x25 },
 212         { 0x5185, 0x24 },
 213         { 0x5186, 0x09 },
 214         { 0x5187, 0x09 },
 215         { 0x5188, 0x0a },
 216         { 0x5189, 0x75 },
 217         { 0x518a, 0x52 },
 218         { 0x518b, 0xea },
 219         { 0x518c, 0xa8 },
 220         { 0x518d, 0x42 },
 221         { 0x518e, 0x38 },
 222         { 0x518f, 0x56 },
 223         { 0x5190, 0x42 },
 224         { 0x5191, 0xf8 },
 225         { 0x5192, 0x04 },
 226         { 0x5193, 0x70 },
 227         { 0x5194, 0xf0 },
 228         { 0x5195, 0xf0 },
 229         { 0x5196, 0x03 },
 230         { 0x5197, 0x01 },
 231         { 0x5198, 0x04 },
 232         { 0x5199, 0x12 },
 233         { 0x519a, 0x04 },
 234         { 0x519b, 0x00 },
 235         { 0x519c, 0x06 },
 236         { 0x519d, 0x82 },
 237         { 0x519e, 0x38 },
 238         { 0x5381, 0x1e },
 239         { 0x5382, 0x5b },
 240         { 0x5383, 0x08 },
 241         { 0x5384, 0x0a },
 242         { 0x5385, 0x7e },
 243         { 0x5386, 0x88 },
 244         { 0x5387, 0x7c },
 245         { 0x5388, 0x6c },
 246         { 0x5389, 0x10 },
 247         { 0x538a, 0x01 },
 248         { 0x538b, 0x98 },
 249         { 0x5300, 0x08 },
 250         { 0x5301, 0x30 },
 251         { 0x5302, 0x10 },
 252         { 0x5303, 0x00 },
 253         { 0x5304, 0x08 },
 254         { 0x5305, 0x30 },
 255         { 0x5306, 0x08 },
 256         { 0x5307, 0x16 },
 257         { 0x5309, 0x08 },
 258         { 0x530a, 0x30 },
 259         { 0x530b, 0x04 },
 260         { 0x530c, 0x06 },
 261         { 0x5480, 0x01 },
 262         { 0x5481, 0x08 },
 263         { 0x5482, 0x14 },
 264         { 0x5483, 0x28 },
 265         { 0x5484, 0x51 },
 266         { 0x5485, 0x65 },
 267         { 0x5486, 0x71 },
 268         { 0x5487, 0x7d },
 269         { 0x5488, 0x87 },
 270         { 0x5489, 0x91 },
 271         { 0x548a, 0x9a },
 272         { 0x548b, 0xaa },
 273         { 0x548c, 0xb8 },
 274         { 0x548d, 0xcd },
 275         { 0x548e, 0xdd },
 276         { 0x548f, 0xea },
 277         { 0x5490, 0x1d },
 278         { 0x5580, 0x02 },
 279         { 0x5583, 0x40 },
 280         { 0x5584, 0x10 },
 281         { 0x5589, 0x10 },
 282         { 0x558a, 0x00 },
 283         { 0x558b, 0xf8 },
 284         { 0x5800, 0x3f },
 285         { 0x5801, 0x16 },
 286         { 0x5802, 0x0e },
 287         { 0x5803, 0x0d },
 288         { 0x5804, 0x17 },
 289         { 0x5805, 0x3f },
 290         { 0x5806, 0x0b },
 291         { 0x5807, 0x06 },
 292         { 0x5808, 0x04 },
 293         { 0x5809, 0x04 },
 294         { 0x580a, 0x06 },
 295         { 0x580b, 0x0b },
 296         { 0x580c, 0x09 },
 297         { 0x580d, 0x03 },
 298         { 0x580e, 0x00 },
 299         { 0x580f, 0x00 },
 300         { 0x5810, 0x03 },
 301         { 0x5811, 0x08 },
 302         { 0x5812, 0x0a },
 303         { 0x5813, 0x03 },
 304         { 0x5814, 0x00 },
 305         { 0x5815, 0x00 },
 306         { 0x5816, 0x04 },
 307         { 0x5817, 0x09 },
 308         { 0x5818, 0x0f },
 309         { 0x5819, 0x08 },
 310         { 0x581a, 0x06 },
 311         { 0x581b, 0x06 },
 312         { 0x581c, 0x08 },
 313         { 0x581d, 0x0c },
 314         { 0x581e, 0x3f },
 315         { 0x581f, 0x1e },
 316         { 0x5820, 0x12 },
 317         { 0x5821, 0x13 },
 318         { 0x5822, 0x21 },
 319         { 0x5823, 0x3f },
 320         { 0x5824, 0x68 },
 321         { 0x5825, 0x28 },
 322         { 0x5826, 0x2c },
 323         { 0x5827, 0x28 },
 324         { 0x5828, 0x08 },
 325         { 0x5829, 0x48 },
 326         { 0x582a, 0x64 },
 327         { 0x582b, 0x62 },
 328         { 0x582c, 0x64 },
 329         { 0x582d, 0x28 },
 330         { 0x582e, 0x46 },
 331         { 0x582f, 0x62 },
 332         { 0x5830, 0x60 },
 333         { 0x5831, 0x62 },
 334         { 0x5832, 0x26 },
 335         { 0x5833, 0x48 },
 336         { 0x5834, 0x66 },
 337         { 0x5835, 0x44 },
 338         { 0x5836, 0x64 },
 339         { 0x5837, 0x28 },
 340         { 0x5838, 0x66 },
 341         { 0x5839, 0x48 },
 342         { 0x583a, 0x2c },
 343         { 0x583b, 0x28 },
 344         { 0x583c, 0x26 },
 345         { 0x583d, 0xae },
 346         { 0x5025, 0x00 },
 347         { 0x3a0f, 0x30 },
 348         { 0x3a10, 0x28 },
 349         { 0x3a1b, 0x30 },
 350         { 0x3a1e, 0x26 },
 351         { 0x3a11, 0x60 },
 352         { 0x3a1f, 0x14 },
 353         { 0x0601, 0x02 },
 354         { 0x3008, 0x42 },
 355         { 0x3008, 0x02 },
 356         { OV5645_IO_MIPI_CTRL00, 0x40 },
 357         { OV5645_MIPI_CTRL00, 0x24 },
 358         { OV5645_PAD_OUTPUT00, 0x70 }
 359 };
 360
 361 static const struct reg_value ov5645_setting_sxga[] = {
 362         { 0x3612, 0xa9 },
 363         { 0x3614, 0x50 },
 364         { 0x3618, 0x00 },
 365         { 0x3034, 0x18 },
 366         { 0x3035, 0x21 },
 367         { 0x3036, 0x70 },
 368         { 0x3600, 0x09 },
 369         { 0x3601, 0x43 },
 370         { 0x3708, 0x66 },
 371         { 0x370c, 0xc3 },
 372         { 0x3800, 0x00 },
 373         { 0x3801, 0x00 },
 374         { 0x3802, 0x00 },
 375         { 0x3803, 0x06 },
 376         { 0x3804, 0x0a },
 377         { 0x3805, 0x3f },
 378         { 0x3806, 0x07 },
 379         { 0x3807, 0x9d },
 380         { 0x3808, 0x05 },
 381         { 0x3809, 0x00 },
 382         { 0x380a, 0x03 },
 383         { 0x380b, 0xc0 },
 384         { 0x380c, 0x07 },
 385         { 0x380d, 0x68 },
 386         { 0x380e, 0x03 },
 387         { 0x380f, 0xd8 },
 388         { 0x3813, 0x06 },
 389         { 0x3814, 0x31 },
 390         { 0x3815, 0x31 },
 391         { 0x3820, 0x47 },
 392         { 0x3a02, 0x03 },
 393         { 0x3a03, 0xd8 },
 394         { 0x3a08, 0x01 },
 395         { 0x3a09, 0xf8 },
 396         { 0x3a0a, 0x01 },
 397         { 0x3a0b, 0xa4 },
 398         { 0x3a0e, 0x02 },
 399         { 0x3a0d, 0x02 },
 400         { 0x3a14, 0x03 },
 401         { 0x3a15, 0xd8 },
 402         { 0x3a18, 0x00 },
 403         { 0x4004, 0x02 },
 404         { 0x4005, 0x18 },
 405         { 0x4300, 0x32 },
 406         { 0x4202, 0x00 }
 407 };
 408
 409 static const struct reg_value ov5645_setting_1080p[] = {
 410         { 0x3612, 0xab },
 411         { 0x3614, 0x50 },
 412         { 0x3618, 0x04 },
 413         { 0x3034, 0x18 },
 414         { 0x3035, 0x11 },
 415         { 0x3036, 0x54 },
 416         { 0x3600, 0x08 },
 417         { 0x3601, 0x33 },
 418         { 0x3708, 0x63 },
 419         { 0x370c, 0xc0 },
 420         { 0x3800, 0x01 },
 421         { 0x3801, 0x50 },
 422         { 0x3802, 0x01 },
 423         { 0x3803, 0xb2 },
 424         { 0x3804, 0x08 },
 425         { 0x3805, 0xef },
 426         { 0x3806, 0x05 },
 427         { 0x3807, 0xf1 },
 428         { 0x3808, 0x07 },
 429         { 0x3809, 0x80 },
 430         { 0x380a, 0x04 },
 431         { 0x380b, 0x38 },
 432         { 0x380c, 0x09 },
 433         { 0x380d, 0xc4 },
 434         { 0x380e, 0x04 },
 435         { 0x380f, 0x60 },
 436         { 0x3813, 0x04 },
 437         { 0x3814, 0x11 },
 438         { 0x3815, 0x11 },
 439         { 0x3820, 0x47 },
 440         { 0x4514, 0x88 },
 441         { 0x3a02, 0x04 },
 442         { 0x3a03, 0x60 },
 443         { 0x3a08, 0x01 },
 444         { 0x3a09, 0x50 },
 445         { 0x3a0a, 0x01 },
 446         { 0x3a0b, 0x18 },
 447         { 0x3a0e, 0x03 },
 448         { 0x3a0d, 0x04 },
 449         { 0x3a14, 0x04 },
 450         { 0x3a15, 0x60 },
 451         { 0x3a18, 0x00 },
 452         { 0x4004, 0x06 },
 453         { 0x4005, 0x18 },
 454         { 0x4300, 0x32 },
 455         { 0x4202, 0x00 },
 456         { 0x4837, 0x0b }
 457 };
 458
 459 static const struct reg_value ov5645_setting_full[] = {
 460         { 0x3612, 0xab },
 461         { 0x3614, 0x50 },
 462         { 0x3618, 0x04 },
 463         { 0x3034, 0x18 },
 464         { 0x3035, 0x11 },
 465         { 0x3036, 0x54 },
 466         { 0x3600, 0x08 },
 467         { 0x3601, 0x33 },
 468         { 0x3708, 0x63 },
 469         { 0x370c, 0xc0 },
 470         { 0x3800, 0x00 },
 471         { 0x3801, 0x00 },
 472         { 0x3802, 0x00 },
 473         { 0x3803, 0x00 },
 474         { 0x3804, 0x0a },
 475         { 0x3805, 0x3f },
 476         { 0x3806, 0x07 },
 477         { 0x3807, 0x9f },
 478         { 0x3808, 0x0a },
 479         { 0x3809, 0x20 },
 480         { 0x380a, 0x07 },
 481         { 0x380b, 0x98 },
 482         { 0x380c, 0x0b },
 483         { 0x380d, 0x1c },
 484         { 0x380e, 0x07 },
 485         { 0x380f, 0xb0 },
 486         { 0x3813, 0x06 },
 487         { 0x3814, 0x11 },
 488         { 0x3815, 0x11 },
 489         { 0x3820, 0x47 },
 490         { 0x4514, 0x88 },
 491         { 0x3a02, 0x07 },
 492         { 0x3a03, 0xb0 },
 493         { 0x3a08, 0x01 },
 494         { 0x3a09, 0x27 },
 495         { 0x3a0a, 0x00 },
 496         { 0x3a0b, 0xf6 },
 497         { 0x3a0e, 0x06 },
 498         { 0x3a0d, 0x08 },
 499         { 0x3a14, 0x07 },
 500         { 0x3a15, 0xb0 },
 501         { 0x3a18, 0x01 },
 502         { 0x4004, 0x06 },
 503         { 0x4005, 0x18 },
 504         { 0x4300, 0x32 },
 505         { 0x4837, 0x0b },
 506         { 0x4202, 0x00 }
 507 };
 508
 509 static const s64 link_freq[] = {
 510         224000000,
 511         336000000
 512 };
 513
 514 static const struct ov5645_mode_info ov5645_mode_info_data[] = {
 515         {
 516                 .width = 1280,
 517                 .height = 960,
 518                 .data = ov5645_setting_sxga,
 519                 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
 520                 .pixel_clock = 112000000,
 521                 .link_freq = 0 /* an index in link_freq[] */
 522         },
 523         {
 524                 .width = 1920,
 525                 .height = 1080,
 526                 .data = ov5645_setting_1080p,
 527                 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
 528                 .pixel_clock = 168000000,
 529                 .link_freq = 1 /* an index in link_freq[] */
 530         },
 531         {
 532                 .width = 2592,
 533                 .height = 1944,
 534                 .data = ov5645_setting_full,
 535                 .data_size = ARRAY_SIZE(ov5645_setting_full),
 536                 .pixel_clock = 168000000,
 537                 .link_freq = 1 /* an index in link_freq[] */
 538         },
 539 };
 540
 541 static int ov5645_regulators_enable(struct ov5645 *ov5645)
 542 {
 543         int ret;
 544
 545         ret = regulator_enable(ov5645->io_regulator);
 546         if (ret < 0) {
 547                 dev_err(ov5645->dev, "set io voltage failed\n");
 548                 return ret;
 549         }
 550
 551         ret = regulator_enable(ov5645->analog_regulator);
 552         if (ret) {
 553                 dev_err(ov5645->dev, "set analog voltage failed\n");
 554                 goto err_disable_io;
 555         }
 556
 557         ret = regulator_enable(ov5645->core_regulator);
 558         if (ret) {
 559                 dev_err(ov5645->dev, "set core voltage failed\n");
 560                 goto err_disable_analog;
 561         }
 562
 563         return 0;
 564
 565 err_disable_analog:
 566         regulator_disable(ov5645->analog_regulator);
 567 err_disable_io:
 568         regulator_disable(ov5645->io_regulator);
 569
 570         return ret;
 571 }
 572
 573 static void ov5645_regulators_disable(struct ov5645 *ov5645)
 574 {
 575         int ret;
 576
 577         ret = regulator_disable(ov5645->core_regulator);
 578         if (ret < 0)
 579                 dev_err(ov5645->dev, "core regulator disable failed\n");
 580
 581         ret = regulator_disable(ov5645->analog_regulator);
 582         if (ret < 0)
 583                 dev_err(ov5645->dev, "analog regulator disable failed\n");
 584
 585         ret = regulator_disable(ov5645->io_regulator);
 586         if (ret < 0)
 587                 dev_err(ov5645->dev, "io regulator disable failed\n");
 588 }
 589
 590 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
 591 {
 592         u8 regbuf[3];
 593         int ret;
 594
 595         regbuf[0] = reg >> 8;
 596         regbuf[1] = reg & 0xff;
 597         regbuf[2] = val;
 598
 599         ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
 600         if (ret < 0) {
 601                 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
 602                         __func__, ret, reg, val);
 603                 return ret;
 604         }
 605
 606         return 0;
 607 }
 608
 609 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
 610 {
 611         u8 regbuf[2];
 612         int ret;
 613
 614         regbuf[0] = reg >> 8;
 615         regbuf[1] = reg & 0xff;
 616
 617         ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
 618         if (ret < 0) {
 619                 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
 620                         __func__, ret, reg);
 621                 return ret;
 622         }
 623
 624         ret = i2c_master_recv(ov5645->i2c_client, val, 1);
 625         if (ret < 0) {
 626                 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
 627                         __func__, ret, reg);
 628                 return ret;
 629         }
 630
 631         return 0;
 632 }
 633
 634 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
 635 {
 636         u8 val = ov5645->aec_pk_manual;
 637         int ret;
 638
 639         if (mode == V4L2_EXPOSURE_AUTO)
 640                 val &= ~OV5645_AEC_MANUAL_ENABLE;
 641         else /* V4L2_EXPOSURE_MANUAL */
 642                 val |= OV5645_AEC_MANUAL_ENABLE;
 643
 644         ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
 645         if (!ret)
 646                 ov5645->aec_pk_manual = val;
 647
 648         return ret;
 649 }
 650
 651 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
 652 {
 653         u8 val = ov5645->aec_pk_manual;
 654         int ret;
 655
 656         if (enable)
 657                 val &= ~OV5645_AGC_MANUAL_ENABLE;
 658         else
 659                 val |= OV5645_AGC_MANUAL_ENABLE;
 660
 661         ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
 662         if (!ret)
 663                 ov5645->aec_pk_manual = val;
 664
 665         return ret;
 666 }
 667
 668 static int ov5645_set_register_array(struct ov5645 *ov5645,
 669                                      const struct reg_value *settings,
 670                                      unsigned int num_settings)
 671 {
 672         unsigned int i;
 673         int ret;
 674
 675         for (i = 0; i < num_settings; ++i, ++settings) {
 676                 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
 677                 if (ret < 0)
 678                         return ret;
 679         }
 680
 681         return 0;
 682 }
 683
 684 static int ov5645_set_power_on(struct ov5645 *ov5645)
 685 {
 686         int ret;
 687
 688         ret = ov5645_regulators_enable(ov5645);
 689         if (ret < 0) {
 690                 return ret;
 691         }
 692
 693         ret = clk_prepare_enable(ov5645->xclk);
 694         if (ret < 0) {
 695                 dev_err(ov5645->dev, "clk prepare enable failed\n");
 696                 ov5645_regulators_disable(ov5645);
 697                 return ret;
 698         }
 699
 700         usleep_range(5000, 15000);
 701         gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
 702
 703         usleep_range(1000, 2000);
 704         gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
 705
 706         msleep(20);
 707
 708         return 0;
 709 }
 710
 711 static void ov5645_set_power_off(struct ov5645 *ov5645)
 712 {
 713         gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
 714         gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
 715         clk_disable_unprepare(ov5645->xclk);
 716         ov5645_regulators_disable(ov5645);
 717 }
 718
 719 static int ov5645_s_power(struct v4l2_subdev *sd, int on)
 720 {
 721         struct ov5645 *ov5645 = to_ov5645(sd);
 722         int ret = 0;
 723
 724         mutex_lock(&ov5645->power_lock);
 725
 726         /* If the power count is modified from 0 to != 0 or from != 0 to 0,
 727          * update the power state.
 728          */
 729         if (ov5645->power_count == !on) {
 730                 if (on) {
 731                         ret = ov5645_set_power_on(ov5645);
 732                         if (ret < 0)
 733                                 goto exit;
 734
 735                         ret = ov5645_set_register_array(ov5645,
 736                                         ov5645_global_init_setting,
 737                                         ARRAY_SIZE(ov5645_global_init_setting));
 738                         if (ret < 0) {
 739                                 dev_err(ov5645->dev,
 740                                         "could not set init registers\n");
 741                                 ov5645_set_power_off(ov5645);
 742                                 goto exit;
 743                         }
 744
 745                         usleep_range(500, 1000);
 746                 } else {
 747                         ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
 748                         ov5645_set_power_off(ov5645);
 749                 }
 750         }
 751
 752         /* Update the power count. */
 753         ov5645->power_count += on ? 1 : -1;
 754         WARN_ON(ov5645->power_count < 0);
 755
 756 exit:
 757         mutex_unlock(&ov5645->power_lock);
 758
 759         return ret;
 760 }
 761
 762 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
 763 {
 764         u32 reg_value = (value * 0x10) + 0x40;
 765         int ret;
 766
 767         ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
 768         if (ret < 0)
 769                 return ret;
 770
 771         return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
 772 }
 773
 774 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
 775 {
 776         u8 val = ov5645->timing_tc_reg21;
 777         int ret;
 778
 779         if (value == 0)
 780                 val &= ~(OV5645_SENSOR_MIRROR);
 781         else
 782                 val |= (OV5645_SENSOR_MIRROR);
 783
 784         ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
 785         if (!ret)
 786                 ov5645->timing_tc_reg21 = val;
 787
 788         return ret;
 789 }
 790
 791 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
 792 {
 793         u8 val = ov5645->timing_tc_reg20;
 794         int ret;
 795
 796         if (value == 0)
 797                 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
 798         else
 799                 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
 800
 801         ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
 802         if (!ret)
 803                 ov5645->timing_tc_reg20 = val;
 804
 805         return ret;
 806 }
 807
 808 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
 809 {
 810         u8 val = 0;
 811
 812         if (value) {
 813                 val = OV5645_SET_TEST_PATTERN(value - 1);
 814                 val |= OV5645_TEST_PATTERN_ENABLE;
 815         }
 816
 817         return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
 818 }
 819
 820 static const char * const ov5645_test_pattern_menu[] = {
 821         "Disabled",
 822         "Vertical Color Bars",
 823         "Pseudo-Random Data",
 824         "Color Square",
 825         "Black Image",
 826 };
 827
 828 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
 829 {
 830         u8 val = 0;
 831
 832         if (!enable_auto)
 833                 val = OV5645_AWB_MANUAL_ENABLE;
 834
 835         return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
 836 }
 837
 838 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
 839 {
 840         struct ov5645 *ov5645 = container_of(ctrl->handler,
 841                                              struct ov5645, ctrls);
 842         int ret;
 843
 844         mutex_lock(&ov5645->power_lock);
 845         if (!ov5645->power_count) {
 846                 mutex_unlock(&ov5645->power_lock);
 847                 return 0;
 848         }
 849
 850         switch (ctrl->id) {
 851         case V4L2_CID_SATURATION:
 852                 ret = ov5645_set_saturation(ov5645, ctrl->val);
 853                 break;
 854         case V4L2_CID_AUTO_WHITE_BALANCE:
 855                 ret = ov5645_set_awb(ov5645, ctrl->val);
 856                 break;
 857         case V4L2_CID_AUTOGAIN:
 858                 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
 859                 break;
 860         case V4L2_CID_EXPOSURE_AUTO:
 861                 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
 862                 break;
 863         case V4L2_CID_TEST_PATTERN:
 864                 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
 865                 break;
 866         case V4L2_CID_HFLIP:
 867                 ret = ov5645_set_hflip(ov5645, ctrl->val);
 868                 break;
 869         case V4L2_CID_VFLIP:
 870                 ret = ov5645_set_vflip(ov5645, ctrl->val);
 871                 break;
 872         default:
 873                 ret = -EINVAL;
 874                 break;
 875         }
 876
 877         mutex_unlock(&ov5645->power_lock);
 878
 879         return ret;
 880 }
 881
 882 static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
 883         .s_ctrl = ov5645_s_ctrl,
 884 };
 885
 886 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
 887                                  struct v4l2_subdev_pad_config *cfg,
 888                                  struct v4l2_subdev_mbus_code_enum *code)
 889 {
 890         if (code->index > 0)
 891                 return -EINVAL;
 892
 893         code->code = MEDIA_BUS_FMT_UYVY8_2X8;
 894
 895         return 0;
 896 }
 897
 898 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
 899                                   struct v4l2_subdev_pad_config *cfg,
 900                                   struct v4l2_subdev_frame_size_enum *fse)
 901 {
 902         if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
 903                 return -EINVAL;
 904
 905         if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
 906                 return -EINVAL;
 907
 908         fse->min_width = ov5645_mode_info_data[fse->index].width;
 909         fse->max_width = ov5645_mode_info_data[fse->index].width;
 910         fse->min_height = ov5645_mode_info_data[fse->index].height;
 911         fse->max_height = ov5645_mode_info_data[fse->index].height;
 912
 913         return 0;
 914 }
 915
 916 static struct v4l2_mbus_framefmt *
 917 __ov5645_get_pad_format(struct ov5645 *ov5645,
 918                         struct v4l2_subdev_pad_config *cfg,
 919                         unsigned int pad,
 920                         enum v4l2_subdev_format_whence which)
 921 {
 922         switch (which) {
 923         case V4L2_SUBDEV_FORMAT_TRY:
 924                 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
 925         case V4L2_SUBDEV_FORMAT_ACTIVE:
 926                 return &ov5645->fmt;
 927         default:
 928                 return NULL;
 929         }
 930 }
 931
 932 static int ov5645_get_format(struct v4l2_subdev *sd,
 933                              struct v4l2_subdev_pad_config *cfg,
 934                              struct v4l2_subdev_format *format)
 935 {
 936         struct ov5645 *ov5645 = to_ov5645(sd);
 937
 938         format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
 939                                                   format->which);
 940         return 0;
 941 }
 942
 943 static struct v4l2_rect *
 944 __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
 945                       unsigned int pad, enum v4l2_subdev_format_whence which)
 946 {
 947         switch (which) {
 948         case V4L2_SUBDEV_FORMAT_TRY:
 949                 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
 950         case V4L2_SUBDEV_FORMAT_ACTIVE:
 951                 return &ov5645->crop;
 952         default:
 953                 return NULL;
 954         }
 955 }
 956
 957 static int ov5645_set_format(struct v4l2_subdev *sd,
 958                              struct v4l2_subdev_pad_config *cfg,
 959                              struct v4l2_subdev_format *format)
 960 {
 961         struct ov5645 *ov5645 = to_ov5645(sd);
 962         struct v4l2_mbus_framefmt *__format;
 963         struct v4l2_rect *__crop;
 964         const struct ov5645_mode_info *new_mode;
 965         int ret;
 966
 967         __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
 968                         format->which);
 969
 970         new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
 971                                ARRAY_SIZE(ov5645_mode_info_data),
 972                                width, height,
 973                                format->format.width, format->format.height);
 974
 975         __crop->width = new_mode->width;
 976         __crop->height = new_mode->height;
 977
 978         if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 979                 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
 980                                              new_mode->pixel_clock);
 981                 if (ret < 0)
 982                         return ret;
 983
 984                 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
 985                                        new_mode->link_freq);
 986                 if (ret < 0)
 987                         return ret;
 988
 989                 ov5645->current_mode = new_mode;
 990         }
 991
 992         __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
 993                         format->which);
 994         __format->width = __crop->width;
 995         __format->height = __crop->height;
 996         __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
 997         __format->field = V4L2_FIELD_NONE;
 998         __format->colorspace = V4L2_COLORSPACE_SRGB;
 999
1000         format->format = *__format;
1001
1002         return 0;
1003 }
1004
1005 static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
1006                                   struct v4l2_subdev_pad_config *cfg)
1007 {
1008         struct v4l2_subdev_format fmt = { 0 };
1009
1010         fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1011         fmt.format.width = 1920;
1012         fmt.format.height = 1080;
1013
1014         ov5645_set_format(subdev, cfg, &fmt);
1015
1016         return 0;
1017 }
1018
1019 static int ov5645_get_selection(struct v4l2_subdev *sd,
1020                            struct v4l2_subdev_pad_config *cfg,
1021                            struct v4l2_subdev_selection *sel)
1022 {
1023         struct ov5645 *ov5645 = to_ov5645(sd);
1024
1025         if (sel->target != V4L2_SEL_TGT_CROP)
1026                 return -EINVAL;
1027
1028         sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
1029                                         sel->which);
1030         return 0;
1031 }
1032
1033 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
1034 {
1035         struct ov5645 *ov5645 = to_ov5645(subdev);
1036         int ret;
1037
1038         if (enable) {
1039                 ret = ov5645_set_register_array(ov5645,
1040                                         ov5645->current_mode->data,
1041                                         ov5645->current_mode->data_size);
1042                 if (ret < 0) {
1043                         dev_err(ov5645->dev, "could not set mode %dx%d\n",
1044                                 ov5645->current_mode->width,
1045                                 ov5645->current_mode->height);
1046                         return ret;
1047                 }
1048                 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
1049                 if (ret < 0) {
1050                         dev_err(ov5645->dev, "could not sync v4l2 controls\n");
1051                         return ret;
1052                 }
1053
1054                 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
1055                 if (ret < 0)
1056                         return ret;
1057
1058                 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1059                                        OV5645_SYSTEM_CTRL0_START);
1060                 if (ret < 0)
1061                         return ret;
1062         } else {
1063                 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1064                 if (ret < 0)
1065                         return ret;
1066
1067                 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1068                                        OV5645_SYSTEM_CTRL0_STOP);
1069                 if (ret < 0)
1070                         return ret;
1071         }
1072
1073         return 0;
1074 }
1075
1076 static const struct v4l2_subdev_core_ops ov5645_core_ops = {
1077         .s_power = ov5645_s_power,
1078 };
1079
1080 static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1081         .s_stream = ov5645_s_stream,
1082 };
1083
1084 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1085         .init_cfg = ov5645_entity_init_cfg,
1086         .enum_mbus_code = ov5645_enum_mbus_code,
1087         .enum_frame_size = ov5645_enum_frame_size,
1088         .get_fmt = ov5645_get_format,
1089         .set_fmt = ov5645_set_format,
1090         .get_selection = ov5645_get_selection,
1091 };
1092
1093 static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1094         .core = &ov5645_core_ops,
1095         .video = &ov5645_video_ops,
1096         .pad = &ov5645_subdev_pad_ops,
1097 };
1098
1099 static int ov5645_probe(struct i2c_client *client,
1100                         const struct i2c_device_id *id)
1101 {
1102         struct device *dev = &client->dev;
1103         struct device_node *endpoint;
1104         struct ov5645 *ov5645;
1105         u8 chip_id_high, chip_id_low;
1106         u32 xclk_freq;
1107         int ret;
1108
1109         ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1110         if (!ov5645)
1111                 return -ENOMEM;
1112
1113         ov5645->i2c_client = client;
1114         ov5645->dev = dev;
1115
1116         endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1117         if (!endpoint) {
1118                 dev_err(dev, "endpoint node not found\n");
1119                 return -EINVAL;
1120         }
1121
1122         ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1123                                          &ov5645->ep);
1124
1125         of_node_put(endpoint);
1126
1127         if (ret < 0) {
1128                 dev_err(dev, "parsing endpoint node failed\n");
1129                 return ret;
1130         }
1131
1132         if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1133                 dev_err(dev, "invalid bus type, must be CSI2\n");
1134                 return -EINVAL;
1135         }
1136
1137         /* get system clock (xclk) */
1138         ov5645->xclk = devm_clk_get(dev, "xclk");
1139         if (IS_ERR(ov5645->xclk)) {
1140                 dev_err(dev, "could not get xclk");
1141                 return PTR_ERR(ov5645->xclk);
1142         }
1143
1144         ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1145         if (ret) {
1146                 dev_err(dev, "could not get xclk frequency\n");
1147                 return ret;
1148         }
1149
1150         /* external clock must be 24MHz, allow 1% tolerance */
1151         if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1152                 dev_err(dev, "external clock frequency %u is not supported\n",
1153                         xclk_freq);
1154                 return -EINVAL;
1155         }
1156
1157         ret = clk_set_rate(ov5645->xclk, xclk_freq);
1158         if (ret) {
1159                 dev_err(dev, "could not set xclk frequency\n");
1160                 return ret;
1161         }
1162
1163         ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
1164         if (IS_ERR(ov5645->io_regulator)) {
1165                 dev_err(dev, "cannot get io regulator\n");
1166                 return PTR_ERR(ov5645->io_regulator);
1167         }
1168
1169         ret = regulator_set_voltage(ov5645->io_regulator,
1170                                     OV5645_VOLTAGE_DIGITAL_IO,
1171                                     OV5645_VOLTAGE_DIGITAL_IO);
1172         if (ret < 0) {
1173                 dev_err(dev, "cannot set io voltage\n");
1174                 return ret;
1175         }
1176
1177         ov5645->core_regulator = devm_regulator_get(dev, "vddd");
1178         if (IS_ERR(ov5645->core_regulator)) {
1179                 dev_err(dev, "cannot get core regulator\n");
1180                 return PTR_ERR(ov5645->core_regulator);
1181         }
1182
1183         ret = regulator_set_voltage(ov5645->core_regulator,
1184                                     OV5645_VOLTAGE_DIGITAL_CORE,
1185                                     OV5645_VOLTAGE_DIGITAL_CORE);
1186         if (ret < 0) {
1187                 dev_err(dev, "cannot set core voltage\n");
1188                 return ret;
1189         }
1190
1191         ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
1192         if (IS_ERR(ov5645->analog_regulator)) {
1193                 dev_err(dev, "cannot get analog regulator\n");
1194                 return PTR_ERR(ov5645->analog_regulator);
1195         }
1196
1197         ret = regulator_set_voltage(ov5645->analog_regulator,
1198                                     OV5645_VOLTAGE_ANALOG,
1199                                     OV5645_VOLTAGE_ANALOG);
1200         if (ret < 0) {
1201                 dev_err(dev, "cannot set analog voltage\n");
1202                 return ret;
1203         }
1204
1205         ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1206         if (IS_ERR(ov5645->enable_gpio)) {
1207                 dev_err(dev, "cannot get enable gpio\n");
1208                 return PTR_ERR(ov5645->enable_gpio);
1209         }
1210
1211         ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1212         if (IS_ERR(ov5645->rst_gpio)) {
1213                 dev_err(dev, "cannot get reset gpio\n");
1214                 return PTR_ERR(ov5645->rst_gpio);
1215         }
1216
1217         mutex_init(&ov5645->power_lock);
1218
1219         v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1220         v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1221                           V4L2_CID_SATURATION, -4, 4, 1, 0);
1222         v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1223                           V4L2_CID_HFLIP, 0, 1, 1, 0);
1224         v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1225                           V4L2_CID_VFLIP, 0, 1, 1, 0);
1226         v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1227                           V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1228         v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1229                           V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1230         v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1231                                V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1232                                0, V4L2_EXPOSURE_AUTO);
1233         v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1234                                      V4L2_CID_TEST_PATTERN,
1235                                      ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1236                                      0, 0, ov5645_test_pattern_menu);
1237         ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1238                                                 &ov5645_ctrl_ops,
1239                                                 V4L2_CID_PIXEL_RATE,
1240                                                 1, INT_MAX, 1, 1);
1241         ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1242                                                    &ov5645_ctrl_ops,
1243                                                    V4L2_CID_LINK_FREQ,
1244                                                    ARRAY_SIZE(link_freq) - 1,
1245                                                    0, link_freq);
1246         if (ov5645->link_freq)
1247                 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1248
1249         ov5645->sd.ctrl_handler = &ov5645->ctrls;
1250
1251         if (ov5645->ctrls.error) {
1252                 dev_err(dev, "%s: control initialization error %d\n",
1253                        __func__, ov5645->ctrls.error);
1254                 ret = ov5645->ctrls.error;
1255                 goto free_ctrl;
1256         }
1257
1258         v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1259         ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1260         ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1261         ov5645->sd.dev = &client->dev;
1262         ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1263
1264         ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1265         if (ret < 0) {
1266                 dev_err(dev, "could not register media entity\n");
1267                 goto free_ctrl;
1268         }
1269
1270         ret = ov5645_s_power(&ov5645->sd, true);
1271         if (ret < 0) {
1272                 dev_err(dev, "could not power up OV5645\n");
1273                 goto free_entity;
1274         }
1275
1276         ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1277         if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1278                 dev_err(dev, "could not read ID high\n");
1279                 ret = -ENODEV;
1280                 goto power_down;
1281         }
1282         ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1283         if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1284                 dev_err(dev, "could not read ID low\n");
1285                 ret = -ENODEV;
1286                 goto power_down;
1287         }
1288
1289         dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1290
1291         ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1292                               &ov5645->aec_pk_manual);
1293         if (ret < 0) {
1294                 dev_err(dev, "could not read AEC/AGC mode\n");
1295                 ret = -ENODEV;
1296                 goto power_down;
1297         }
1298
1299         ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1300                               &ov5645->timing_tc_reg20);
1301         if (ret < 0) {
1302                 dev_err(dev, "could not read vflip value\n");
1303                 ret = -ENODEV;
1304                 goto power_down;
1305         }
1306
1307         ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1308                               &ov5645->timing_tc_reg21);
1309         if (ret < 0) {
1310                 dev_err(dev, "could not read hflip value\n");
1311                 ret = -ENODEV;
1312                 goto power_down;
1313         }
1314
1315         ov5645_s_power(&ov5645->sd, false);
1316
1317         ret = v4l2_async_register_subdev(&ov5645->sd);
1318         if (ret < 0) {
1319                 dev_err(dev, "could not register v4l2 device\n");
1320                 goto free_entity;
1321         }
1322
1323         ov5645_entity_init_cfg(&ov5645->sd, NULL);
1324
1325         return 0;
1326
1327 power_down:
1328         ov5645_s_power(&ov5645->sd, false);
1329 free_entity:
1330         media_entity_cleanup(&ov5645->sd.entity);
1331 free_ctrl:
1332         v4l2_ctrl_handler_free(&ov5645->ctrls);
1333         mutex_destroy(&ov5645->power_lock);
1334
1335         return ret;
1336 }
1337
1338 static int ov5645_remove(struct i2c_client *client)
1339 {
1340         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1341         struct ov5645 *ov5645 = to_ov5645(sd);
1342
1343         v4l2_async_unregister_subdev(&ov5645->sd);
1344         media_entity_cleanup(&ov5645->sd.entity);
1345         v4l2_ctrl_handler_free(&ov5645->ctrls);
1346         mutex_destroy(&ov5645->power_lock);
1347
1348         return 0;
1349 }
1350
1351 static const struct i2c_device_id ov5645_id[] = {
1352         { "ov5645", 0 },
1353         {}
1354 };
1355 MODULE_DEVICE_TABLE(i2c, ov5645_id);
1356
1357 static const struct of_device_id ov5645_of_match[] = {
1358         { .compatible = "ovti,ov5645" },
1359         { /* sentinel */ }
1360 };
1361 MODULE_DEVICE_TABLE(of, ov5645_of_match);
1362
1363 static struct i2c_driver ov5645_i2c_driver = {
1364         .driver = {
1365                 .of_match_table = of_match_ptr(ov5645_of_match),
1366                 .name  = "ov5645",
1367         },
1368         .probe  = ov5645_probe,
1369         .remove = ov5645_remove,
1370         .id_table = ov5645_id,
1371 };
1372
1373 module_i2c_driver(ov5645_i2c_driver);
1374
1375 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1376 MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1377 MODULE_LICENSE("GPL v2");