1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Analog Devices ADV748X CSI-2 Transmitter
5 * Copyright (C) 2017 Renesas Electronics Corp.
8 #include <linux/module.h>
9 #include <linux/mutex.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-ioctl.h>
17 static int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx,
20 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT);
24 * adv748x_csi2_register_link : Register and link internal entities
26 * @tx: CSI2 private entity
27 * @v4l2_dev: Video registration device
28 * @src: Source subdevice to establish link
29 * @src_pad: Pad number of source to link to this @tx
30 * @enable: Link enabled flag
32 * Ensure that the subdevice is registered against the v4l2_device, and link the
33 * source pad to the sink pad of the CSI2 bus entity.
35 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx,
36 struct v4l2_device *v4l2_dev,
37 struct v4l2_subdev *src,
44 ret = v4l2_device_register_subdev(v4l2_dev, src);
49 ret = media_create_pad_link(&src->entity, src_pad,
50 &tx->sd.entity, ADV748X_CSI2_SINK,
51 enable ? MEDIA_LNK_FL_ENABLED : 0);
61 /* -----------------------------------------------------------------------------
62 * v4l2_subdev_internal_ops
64 * We use the internal registered operation to be able to ensure that our
65 * incremental subdevices (not connected in the forward path) can be registered
66 * against the resulting video path and media device.
69 static int adv748x_csi2_registered(struct v4l2_subdev *sd)
71 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
72 struct adv748x_state *state = tx->state;
75 adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB",
79 * Link TXA to AFE and HDMI, and TXB to AFE only as TXB cannot output
82 * The HDMI->TXA link is enabled by default, as is the AFE->TXB one.
84 if (is_afe_enabled(state)) {
85 ret = adv748x_csi2_register_link(tx, sd->v4l2_dev,
92 /* TXB can output AFE signals only. */
97 /* Register link to HDMI for TXA only. */
98 if (is_txb(tx) || !is_hdmi_enabled(state))
101 ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd,
102 ADV748X_HDMI_SOURCE, true);
106 /* The default HDMI output is TXA. */
112 static const struct v4l2_subdev_internal_ops adv748x_csi2_internal_ops = {
113 .registered = adv748x_csi2_registered,
116 /* -----------------------------------------------------------------------------
117 * v4l2_subdev_video_ops
120 static int adv748x_csi2_s_stream(struct v4l2_subdev *sd, int enable)
122 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
123 struct v4l2_subdev *src;
125 src = adv748x_get_remote_sd(&tx->pads[ADV748X_CSI2_SINK]);
129 return v4l2_subdev_call(src, video, s_stream, enable);
132 static const struct v4l2_subdev_video_ops adv748x_csi2_video_ops = {
133 .s_stream = adv748x_csi2_s_stream,
136 /* -----------------------------------------------------------------------------
137 * v4l2_subdev_pad_ops
139 * The CSI2 bus pads are ignorant to the data sizes or formats.
140 * But we must support setting the pad formats for format propagation.
143 static struct v4l2_mbus_framefmt *
144 adv748x_csi2_get_pad_format(struct v4l2_subdev *sd,
145 struct v4l2_subdev_pad_config *cfg,
146 unsigned int pad, u32 which)
148 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
150 if (which == V4L2_SUBDEV_FORMAT_TRY)
151 return v4l2_subdev_get_try_format(sd, cfg, pad);
156 static int adv748x_csi2_get_format(struct v4l2_subdev *sd,
157 struct v4l2_subdev_pad_config *cfg,
158 struct v4l2_subdev_format *sdformat)
160 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
161 struct adv748x_state *state = tx->state;
162 struct v4l2_mbus_framefmt *mbusformat;
164 mbusformat = adv748x_csi2_get_pad_format(sd, cfg, sdformat->pad,
169 mutex_lock(&state->mutex);
171 sdformat->format = *mbusformat;
173 mutex_unlock(&state->mutex);
178 static int adv748x_csi2_set_format(struct v4l2_subdev *sd,
179 struct v4l2_subdev_pad_config *cfg,
180 struct v4l2_subdev_format *sdformat)
182 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
183 struct adv748x_state *state = tx->state;
184 struct v4l2_mbus_framefmt *mbusformat;
187 mbusformat = adv748x_csi2_get_pad_format(sd, cfg, sdformat->pad,
192 mutex_lock(&state->mutex);
194 if (sdformat->pad == ADV748X_CSI2_SOURCE) {
195 const struct v4l2_mbus_framefmt *sink_fmt;
197 sink_fmt = adv748x_csi2_get_pad_format(sd, cfg,
206 sdformat->format = *sink_fmt;
209 *mbusformat = sdformat->format;
212 mutex_unlock(&state->mutex);
217 static const struct v4l2_subdev_pad_ops adv748x_csi2_pad_ops = {
218 .get_fmt = adv748x_csi2_get_format,
219 .set_fmt = adv748x_csi2_set_format,
222 /* -----------------------------------------------------------------------------
226 static const struct v4l2_subdev_ops adv748x_csi2_ops = {
227 .video = &adv748x_csi2_video_ops,
228 .pad = &adv748x_csi2_pad_ops,
231 /* -----------------------------------------------------------------------------
232 * Subdev module and controls
235 int adv748x_csi2_set_pixelrate(struct v4l2_subdev *sd, s64 rate)
237 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
242 return v4l2_ctrl_s_ctrl_int64(tx->pixel_rate, rate);
245 static int adv748x_csi2_s_ctrl(struct v4l2_ctrl *ctrl)
248 case V4L2_CID_PIXEL_RATE:
255 static const struct v4l2_ctrl_ops adv748x_csi2_ctrl_ops = {
256 .s_ctrl = adv748x_csi2_s_ctrl,
259 static int adv748x_csi2_init_controls(struct adv748x_csi2 *tx)
262 v4l2_ctrl_handler_init(&tx->ctrl_hdl, 1);
264 tx->pixel_rate = v4l2_ctrl_new_std(&tx->ctrl_hdl,
265 &adv748x_csi2_ctrl_ops,
266 V4L2_CID_PIXEL_RATE, 1, INT_MAX,
269 tx->sd.ctrl_handler = &tx->ctrl_hdl;
270 if (tx->ctrl_hdl.error) {
271 v4l2_ctrl_handler_free(&tx->ctrl_hdl);
272 return tx->ctrl_hdl.error;
275 return v4l2_ctrl_handler_setup(&tx->ctrl_hdl);
278 int adv748x_csi2_init(struct adv748x_state *state, struct adv748x_csi2 *tx)
282 if (!is_tx_enabled(tx))
285 /* Initialise the virtual channel */
286 adv748x_csi2_set_virtual_channel(tx, 0);
288 adv748x_subdev_init(&tx->sd, state, &adv748x_csi2_ops,
289 MEDIA_ENT_F_VID_IF_BRIDGE,
290 is_txa(tx) ? "txa" : "txb");
292 /* Ensure that matching is based upon the endpoint fwnodes */
293 tx->sd.fwnode = of_fwnode_handle(state->endpoints[tx->port]);
295 /* Register internal ops for incremental subdev registration */
296 tx->sd.internal_ops = &adv748x_csi2_internal_ops;
298 tx->pads[ADV748X_CSI2_SINK].flags = MEDIA_PAD_FL_SINK;
299 tx->pads[ADV748X_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
301 ret = media_entity_pads_init(&tx->sd.entity, ADV748X_CSI2_NR_PADS,
306 ret = adv748x_csi2_init_controls(tx);
310 ret = v4l2_async_register_subdev(&tx->sd);
317 v4l2_ctrl_handler_free(&tx->ctrl_hdl);
319 media_entity_cleanup(&tx->sd.entity);
324 void adv748x_csi2_cleanup(struct adv748x_csi2 *tx)
326 if (!is_tx_enabled(tx))
329 v4l2_async_unregister_subdev(&tx->sd);
330 media_entity_cleanup(&tx->sd.entity);
331 v4l2_ctrl_handler_free(&tx->ctrl_hdl);