drivers/media/dvb-frontends/nxt200x.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *    Support for NXT2002 and NXT2004 - VSB/QAM
   4  *
   5  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   6  *    Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
   7  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   8  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   9 */
  10
  11 /*(DEBLOBBED)*/
  12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  13
  14 /* Max transfer size done by I2C transfer functions */
  15 #define MAX_XFER_SIZE  256
  16
  17 /*(DEBLOBBED)*/
  18 /*(DEBLOBBED)*/
  19 #define CRC_CCIT_MASK 0x1021
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/module.h>
  24 #include <linux/slab.h>
  25 #include <linux/string.h>
  26
  27 #include <media/dvb_frontend.h>
  28 #include "nxt200x.h"
  29
  30 struct nxt200x_state {
  31
  32         struct i2c_adapter* i2c;
  33         const struct nxt200x_config* config;
  34         struct dvb_frontend frontend;
  35
  36         /* demodulator private data */
  37         nxt_chip_type demod_chip;
  38         u8 initialised:1;
  39 };
  40
  41 static int debug;
  42 #define dprintk(args...)        do { if (debug) pr_debug(args); } while (0)
  43
  44 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  45 {
  46         int err;
  47         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  48
  49         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  50                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  51                         __func__, addr, err);
  52                 return -EREMOTEIO;
  53         }
  54         return 0;
  55 }
  56
  57 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  58 {
  59         int err;
  60         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  61
  62         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  63                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
  64                         __func__, addr, err);
  65                 return -EREMOTEIO;
  66         }
  67         return 0;
  68 }
  69
  70 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  71                                const u8 *buf, u8 len)
  72 {
  73         u8 buf2[MAX_XFER_SIZE];
  74         int err;
  75         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
  76
  77         if (1 + len > sizeof(buf2)) {
  78                 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
  79                          __func__, reg, len);
  80                 return -EINVAL;
  81         }
  82
  83         buf2[0] = reg;
  84         memcpy(&buf2[1], buf, len);
  85
  86         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  87                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  88                         __func__, state->config->demod_address, err);
  89                 return -EREMOTEIO;
  90         }
  91         return 0;
  92 }
  93
  94 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
  95 {
  96         u8 reg2 [] = { reg };
  97
  98         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
  99                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 100
 101         int err;
 102
 103         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 104                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
 105                         __func__, state->config->demod_address, err);
 106                 return -EREMOTEIO;
 107         }
 108         return 0;
 109 }
 110
 111 static u16 nxt200x_crc(u16 crc, u8 c)
 112 {
 113         u8 i;
 114         u16 input = (u16) c & 0xFF;
 115
 116         input<<=8;
 117         for(i=0; i<8; i++) {
 118                 if((crc^input) & 0x8000)
 119                         crc=(crc<<1)^CRC_CCIT_MASK;
 120                 else
 121                         crc<<=1;
 122                 input<<=1;
 123         }
 124         return crc;
 125 }
 126
 127 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 128 {
 129         u8 attr, len2, buf;
 130         dprintk("%s\n", __func__);
 131
 132         /* set multi register register */
 133         nxt200x_writebytes(state, 0x35, &reg, 1);
 134
 135         /* send the actual data */
 136         nxt200x_writebytes(state, 0x36, data, len);
 137
 138         switch (state->demod_chip) {
 139                 case NXT2002:
 140                         len2 = len;
 141                         buf = 0x02;
 142                         break;
 143                 case NXT2004:
 144                         /* probably not right, but gives correct values */
 145                         attr = 0x02;
 146                         if (reg & 0x80) {
 147                                 attr = attr << 1;
 148                                 if (reg & 0x04)
 149                                         attr = attr >> 1;
 150                         }
 151                         /* set write bit */
 152                         len2 = ((attr << 4) | 0x10) | len;
 153                         buf = 0x80;
 154                         break;
 155                 default:
 156                         return -EINVAL;
 157                         break;
 158         }
 159
 160         /* set multi register length */
 161         nxt200x_writebytes(state, 0x34, &len2, 1);
 162
 163         /* toggle the multireg write bit */
 164         nxt200x_writebytes(state, 0x21, &buf, 1);
 165
 166         nxt200x_readbytes(state, 0x21, &buf, 1);
 167
 168         switch (state->demod_chip) {
 169                 case NXT2002:
 170                         if ((buf & 0x02) == 0)
 171                                 return 0;
 172                         break;
 173                 case NXT2004:
 174                         if (buf == 0)
 175                                 return 0;
 176                         break;
 177                 default:
 178                         return -EINVAL;
 179                         break;
 180         }
 181
 182         pr_warn("Error writing multireg register 0x%02X\n", reg);
 183
 184         return 0;
 185 }
 186
 187 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 188 {
 189         int i;
 190         u8 buf, len2, attr;
 191         dprintk("%s\n", __func__);
 192
 193         /* set multi register register */
 194         nxt200x_writebytes(state, 0x35, &reg, 1);
 195
 196         switch (state->demod_chip) {
 197                 case NXT2002:
 198                         /* set multi register length */
 199                         len2 = len & 0x80;
 200                         nxt200x_writebytes(state, 0x34, &len2, 1);
 201
 202                         /* read the actual data */
 203                         nxt200x_readbytes(state, reg, data, len);
 204                         return 0;
 205                         break;
 206                 case NXT2004:
 207                         /* probably not right, but gives correct values */
 208                         attr = 0x02;
 209                         if (reg & 0x80) {
 210                                 attr = attr << 1;
 211                                 if (reg & 0x04)
 212                                         attr = attr >> 1;
 213                         }
 214
 215                         /* set multi register length */
 216                         len2 = (attr << 4) | len;
 217                         nxt200x_writebytes(state, 0x34, &len2, 1);
 218
 219                         /* toggle the multireg bit*/
 220                         buf = 0x80;
 221                         nxt200x_writebytes(state, 0x21, &buf, 1);
 222
 223                         /* read the actual data */
 224                         for(i = 0; i < len; i++) {
 225                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 226                         }
 227                         return 0;
 228                         break;
 229                 default:
 230                         return -EINVAL;
 231                         break;
 232         }
 233 }
 234
 235 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 236 {
 237         u8 buf, stopval, counter = 0;
 238         dprintk("%s\n", __func__);
 239
 240         /* set correct stop value */
 241         switch (state->demod_chip) {
 242                 case NXT2002:
 243                         stopval = 0x40;
 244                         break;
 245                 case NXT2004:
 246                         stopval = 0x10;
 247                         break;
 248                 default:
 249                         stopval = 0;
 250                         break;
 251         }
 252
 253         buf = 0x80;
 254         nxt200x_writebytes(state, 0x22, &buf, 1);
 255
 256         while (counter < 20) {
 257                 nxt200x_readbytes(state, 0x31, &buf, 1);
 258                 if (buf & stopval)
 259                         return;
 260                 msleep(10);
 261                 counter++;
 262         }
 263
 264         pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
 265         return;
 266 }
 267
 268 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 269 {
 270         u8 buf;
 271         dprintk("%s\n", __func__);
 272
 273         buf = 0x00;
 274         nxt200x_writebytes(state, 0x22, &buf, 1);
 275 }
 276
 277 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 278 {
 279         u8 buf[9];
 280         u8 counter = 0;
 281         dprintk("%s\n", __func__);
 282
 283         buf[0] = 0x00;
 284         nxt200x_writebytes(state, 0x2b, buf, 1);
 285         buf[0] = 0x70;
 286         nxt200x_writebytes(state, 0x34, buf, 1);
 287         buf[0] = 0x04;
 288         nxt200x_writebytes(state, 0x35, buf, 1);
 289         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 290         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 291         nxt200x_writebytes(state, 0x36, buf, 9);
 292         buf[0] = 0x80;
 293         nxt200x_writebytes(state, 0x21, buf, 1);
 294
 295         while (counter < 20) {
 296                 nxt200x_readbytes(state, 0x21, buf, 1);
 297                 if (buf[0] == 0)
 298                         return;
 299                 msleep(10);
 300                 counter++;
 301         }
 302
 303         pr_warn("Timeout waiting for nxt2004 to init.\n");
 304
 305         return;
 306 }
 307
 308 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 309 {
 310         u8 buf, count = 0;
 311
 312         dprintk("%s\n", __func__);
 313
 314         dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
 315
 316         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 317          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 318         switch (state->demod_chip) {
 319                 case NXT2004:
 320                         if (i2c_writebytes(state, data[0], data+1, 4))
 321                                 pr_warn("error writing to tuner\n");
 322                         /* wait until we have a lock */
 323                         while (count < 20) {
 324                                 i2c_readbytes(state, data[0], &buf, 1);
 325                                 if (buf & 0x40)
 326                                         return 0;
 327                                 msleep(100);
 328                                 count++;
 329                         }
 330                         pr_warn("timeout waiting for tuner lock\n");
 331                         break;
 332                 case NXT2002:
 333                         /* set the i2c transfer speed to the tuner */
 334                         buf = 0x03;
 335                         nxt200x_writebytes(state, 0x20, &buf, 1);
 336
 337                         /* setup to transfer 4 bytes via i2c */
 338                         buf = 0x04;
 339                         nxt200x_writebytes(state, 0x34, &buf, 1);
 340
 341                         /* write actual tuner bytes */
 342                         nxt200x_writebytes(state, 0x36, data+1, 4);
 343
 344                         /* set tuner i2c address */
 345                         buf = data[0] << 1;
 346                         nxt200x_writebytes(state, 0x35, &buf, 1);
 347
 348                         /* write UC Opmode to begin transfer */
 349                         buf = 0x80;
 350                         nxt200x_writebytes(state, 0x21, &buf, 1);
 351
 352                         while (count < 20) {
 353                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 354                                 if ((buf & 0x80)== 0x00)
 355                                         return 0;
 356                                 msleep(100);
 357                                 count++;
 358                         }
 359                         pr_warn("timeout error writing to tuner\n");
 360                         break;
 361                 default:
 362                         return -EINVAL;
 363                         break;
 364         }
 365         return 0;
 366 }
 367
 368 static void nxt200x_agc_reset(struct nxt200x_state* state)
 369 {
 370         u8 buf;
 371         dprintk("%s\n", __func__);
 372
 373         switch (state->demod_chip) {
 374                 case NXT2002:
 375                         buf = 0x08;
 376                         nxt200x_writebytes(state, 0x08, &buf, 1);
 377                         buf = 0x00;
 378                         nxt200x_writebytes(state, 0x08, &buf, 1);
 379                         break;
 380                 case NXT2004:
 381                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 382                         buf = 0x08;
 383                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 384                         buf = 0x00;
 385                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 386                         break;
 387                 default:
 388                         break;
 389         }
 390         return;
 391 }
 392
 393 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 394 {
 395
 396         struct nxt200x_state* state = fe->demodulator_priv;
 397         u8 buf[3], written = 0, chunkpos = 0;
 398         u16 rambase, position, crc = 0;
 399
 400         dprintk("%s\n", __func__);
 401         dprintk("Firmware is %zu bytes\n", fw->size);
 402
 403         /* Get the RAM base for this nxt2002 */
 404         nxt200x_readbytes(state, 0x10, buf, 1);
 405
 406         if (buf[0] & 0x10)
 407                 rambase = 0x1000;
 408         else
 409                 rambase = 0x0000;
 410
 411         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 412
 413         /* Hold the micro in reset while loading firmware */
 414         buf[0] = 0x80;
 415         nxt200x_writebytes(state, 0x2B, buf, 1);
 416
 417         for (position = 0; position < fw->size; position++) {
 418                 if (written == 0) {
 419                         crc = 0;
 420                         chunkpos = 0x28;
 421                         buf[0] = ((rambase + position) >> 8);
 422                         buf[1] = (rambase + position) & 0xFF;
 423                         buf[2] = 0x81;
 424                         /* write starting address */
 425                         nxt200x_writebytes(state, 0x29, buf, 3);
 426                 }
 427                 written++;
 428                 chunkpos++;
 429
 430                 if ((written % 4) == 0)
 431                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 432
 433                 crc = nxt200x_crc(crc, fw->data[position]);
 434
 435                 if ((written == 255) || (position+1 == fw->size)) {
 436                         /* write remaining bytes of firmware */
 437                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 438                                 &fw->data[position-(written %4) + 1],
 439                                 written %4);
 440                         buf[0] = crc << 8;
 441                         buf[1] = crc & 0xFF;
 442
 443                         /* write crc */
 444                         nxt200x_writebytes(state, 0x2C, buf, 2);
 445
 446                         /* do a read to stop things */
 447                         nxt200x_readbytes(state, 0x2A, buf, 1);
 448
 449                         /* set transfer mode to complete */
 450                         buf[0] = 0x80;
 451                         nxt200x_writebytes(state, 0x2B, buf, 1);
 452
 453                         written = 0;
 454                 }
 455         }
 456
 457         return 0;
 458 };
 459
 460 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 461 {
 462
 463         struct nxt200x_state* state = fe->demodulator_priv;
 464         u8 buf[3];
 465         u16 rambase, position, crc=0;
 466
 467         dprintk("%s\n", __func__);
 468         dprintk("Firmware is %zu bytes\n", fw->size);
 469
 470         /* set rambase */
 471         rambase = 0x1000;
 472
 473         /* hold the micro in reset while loading firmware */
 474         buf[0] = 0x80;
 475         nxt200x_writebytes(state, 0x2B, buf,1);
 476
 477         /* calculate firmware CRC */
 478         for (position = 0; position < fw->size; position++) {
 479                 crc = nxt200x_crc(crc, fw->data[position]);
 480         }
 481
 482         buf[0] = rambase >> 8;
 483         buf[1] = rambase & 0xFF;
 484         buf[2] = 0x81;
 485         /* write starting address */
 486         nxt200x_writebytes(state,0x29,buf,3);
 487
 488         for (position = 0; position < fw->size;) {
 489                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 490                         fw->size-position > 255 ? 255 : fw->size-position);
 491                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 492         }
 493         buf[0] = crc >> 8;
 494         buf[1] = crc & 0xFF;
 495
 496         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 497
 498         /* write crc */
 499         nxt200x_writebytes(state, 0x2C, buf,2);
 500
 501         /* do a read to stop things */
 502         nxt200x_readbytes(state, 0x2C, buf, 1);
 503
 504         /* set transfer mode to complete */
 505         buf[0] = 0x80;
 506         nxt200x_writebytes(state, 0x2B, buf,1);
 507
 508         return 0;
 509 };
 510
 511 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 512 {
 513         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 514         struct nxt200x_state* state = fe->demodulator_priv;
 515         u8 buf[5];
 516
 517         /* stop the micro first */
 518         nxt200x_microcontroller_stop(state);
 519
 520         if (state->demod_chip == NXT2004) {
 521                 /* make sure demod is set to digital */
 522                 buf[0] = 0x04;
 523                 nxt200x_writebytes(state, 0x14, buf, 1);
 524                 buf[0] = 0x00;
 525                 nxt200x_writebytes(state, 0x17, buf, 1);
 526         }
 527
 528         /* set additional params */
 529         switch (p->modulation) {
 530                 case QAM_64:
 531                 case QAM_256:
 532                         /* Set punctured clock for QAM */
 533                         /* This is just a guess since I am unable to test it */
 534                         if (state->config->set_ts_params)
 535                                 state->config->set_ts_params(fe, 1);
 536                         break;
 537                 case VSB_8:
 538                         /* Set non-punctured clock for VSB */
 539                         if (state->config->set_ts_params)
 540                                 state->config->set_ts_params(fe, 0);
 541                         break;
 542                 default:
 543                         return -EINVAL;
 544                         break;
 545         }
 546
 547         if (fe->ops.tuner_ops.calc_regs) {
 548                 /* get tuning information */
 549                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 550
 551                 /* write frequency information */
 552                 nxt200x_writetuner(state, buf);
 553         }
 554
 555         /* reset the agc now that tuning has been completed */
 556         nxt200x_agc_reset(state);
 557
 558         /* set target power level */
 559         switch (p->modulation) {
 560                 case QAM_64:
 561                 case QAM_256:
 562                         buf[0] = 0x74;
 563                         break;
 564                 case VSB_8:
 565                         buf[0] = 0x70;
 566                         break;
 567                 default:
 568                         return -EINVAL;
 569                         break;
 570         }
 571         nxt200x_writebytes(state, 0x42, buf, 1);
 572
 573         /* configure sdm */
 574         switch (state->demod_chip) {
 575                 case NXT2002:
 576                         buf[0] = 0x87;
 577                         break;
 578                 case NXT2004:
 579                         buf[0] = 0x07;
 580                         break;
 581                 default:
 582                         return -EINVAL;
 583                         break;
 584         }
 585         nxt200x_writebytes(state, 0x57, buf, 1);
 586
 587         /* write sdm1 input */
 588         buf[0] = 0x10;
 589         buf[1] = 0x00;
 590         switch (state->demod_chip) {
 591                 case NXT2002:
 592                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 593                         break;
 594                 case NXT2004:
 595                         nxt200x_writebytes(state, 0x58, buf, 2);
 596                         break;
 597                 default:
 598                         return -EINVAL;
 599                         break;
 600         }
 601
 602         /* write sdmx input */
 603         switch (p->modulation) {
 604                 case QAM_64:
 605                                 buf[0] = 0x68;
 606                                 break;
 607                 case QAM_256:
 608                                 buf[0] = 0x64;
 609                                 break;
 610                 case VSB_8:
 611                                 buf[0] = 0x60;
 612                                 break;
 613                 default:
 614                                 return -EINVAL;
 615                                 break;
 616         }
 617         buf[1] = 0x00;
 618         switch (state->demod_chip) {
 619                 case NXT2002:
 620                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 621                         break;
 622                 case NXT2004:
 623                         nxt200x_writebytes(state, 0x5C, buf, 2);
 624                         break;
 625                 default:
 626                         return -EINVAL;
 627                         break;
 628         }
 629
 630         /* write adc power lpf fc */
 631         buf[0] = 0x05;
 632         nxt200x_writebytes(state, 0x43, buf, 1);
 633
 634         if (state->demod_chip == NXT2004) {
 635                 /* write ??? */
 636                 buf[0] = 0x00;
 637                 buf[1] = 0x00;
 638                 nxt200x_writebytes(state, 0x46, buf, 2);
 639         }
 640
 641         /* write accumulator2 input */
 642         buf[0] = 0x80;
 643         buf[1] = 0x00;
 644         switch (state->demod_chip) {
 645                 case NXT2002:
 646                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 647                         break;
 648                 case NXT2004:
 649                         nxt200x_writebytes(state, 0x4B, buf, 2);
 650                         break;
 651                 default:
 652                         return -EINVAL;
 653                         break;
 654         }
 655
 656         /* write kg1 */
 657         buf[0] = 0x00;
 658         nxt200x_writebytes(state, 0x4D, buf, 1);
 659
 660         /* write sdm12 lpf fc */
 661         buf[0] = 0x44;
 662         nxt200x_writebytes(state, 0x55, buf, 1);
 663
 664         /* write agc control reg */
 665         buf[0] = 0x04;
 666         nxt200x_writebytes(state, 0x41, buf, 1);
 667
 668         if (state->demod_chip == NXT2004) {
 669                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 670                 buf[0] = 0x24;
 671                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 672
 673                 /* soft reset? */
 674                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 675                 buf[0] = 0x10;
 676                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 677                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 678                 buf[0] = 0x00;
 679                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 680
 681                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 682                 buf[0] = 0x04;
 683                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 684                 buf[0] = 0x00;
 685                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 686                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 687                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 688                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 689                 buf[0] = 0x11;
 690                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 691                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 692                 buf[0] = 0x44;
 693                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 694         }
 695
 696         /* write agc ucgp0 */
 697         switch (p->modulation) {
 698                 case QAM_64:
 699                                 buf[0] = 0x02;
 700                                 break;
 701                 case QAM_256:
 702                                 buf[0] = 0x03;
 703                                 break;
 704                 case VSB_8:
 705                                 buf[0] = 0x00;
 706                                 break;
 707                 default:
 708                                 return -EINVAL;
 709                                 break;
 710         }
 711         nxt200x_writebytes(state, 0x30, buf, 1);
 712
 713         /* write agc control reg */
 714         buf[0] = 0x00;
 715         nxt200x_writebytes(state, 0x41, buf, 1);
 716
 717         /* write accumulator2 input */
 718         buf[0] = 0x80;
 719         buf[1] = 0x00;
 720         switch (state->demod_chip) {
 721                 case NXT2002:
 722                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 723                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 724                         break;
 725                 case NXT2004:
 726                         nxt200x_writebytes(state, 0x49, buf, 2);
 727                         nxt200x_writebytes(state, 0x4B, buf, 2);
 728                         break;
 729                 default:
 730                         return -EINVAL;
 731                         break;
 732         }
 733
 734         /* write agc control reg */
 735         buf[0] = 0x04;
 736         nxt200x_writebytes(state, 0x41, buf, 1);
 737
 738         nxt200x_microcontroller_start(state);
 739
 740         if (state->demod_chip == NXT2004) {
 741                 nxt2004_microcontroller_init(state);
 742
 743                 /* ???? */
 744                 buf[0] = 0xF0;
 745                 buf[1] = 0x00;
 746                 nxt200x_writebytes(state, 0x5C, buf, 2);
 747         }
 748
 749         /* adjacent channel detection should be done here, but I don't
 750         have any stations with this need so I cannot test it */
 751
 752         return 0;
 753 }
 754
 755 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
 756 {
 757         struct nxt200x_state* state = fe->demodulator_priv;
 758         u8 lock;
 759         nxt200x_readbytes(state, 0x31, &lock, 1);
 760
 761         *status = 0;
 762         if (lock & 0x20) {
 763                 *status |= FE_HAS_SIGNAL;
 764                 *status |= FE_HAS_CARRIER;
 765                 *status |= FE_HAS_VITERBI;
 766                 *status |= FE_HAS_SYNC;
 767                 *status |= FE_HAS_LOCK;
 768         }
 769         return 0;
 770 }
 771
 772 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 773 {
 774         struct nxt200x_state* state = fe->demodulator_priv;
 775         u8 b[3];
 776
 777         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 778
 779         *ber = ((b[0] << 8) + b[1]) * 8;
 780
 781         return 0;
 782 }
 783
 784 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 785 {
 786         struct nxt200x_state* state = fe->demodulator_priv;
 787         u8 b[2];
 788         u16 temp = 0;
 789
 790         /* setup to read cluster variance */
 791         b[0] = 0x00;
 792         nxt200x_writebytes(state, 0xA1, b, 1);
 793
 794         /* get multreg val */
 795         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 796
 797         temp = (b[0] << 8) | b[1];
 798         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 799
 800         return 0;
 801 }
 802
 803 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 804 {
 805
 806         struct nxt200x_state* state = fe->demodulator_priv;
 807         u8 b[2];
 808         u16 temp = 0, temp2;
 809         u32 snrdb = 0;
 810
 811         /* setup to read cluster variance */
 812         b[0] = 0x00;
 813         nxt200x_writebytes(state, 0xA1, b, 1);
 814
 815         /* get multreg val from 0xA6 */
 816         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 817
 818         temp = (b[0] << 8) | b[1];
 819         temp2 = 0x7FFF - temp;
 820
 821         /* snr will be in db */
 822         if (temp2 > 0x7F00)
 823                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 824         else if (temp2 > 0x7EC0)
 825                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 826         else if (temp2 > 0x7C00)
 827                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 828         else
 829                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 830
 831         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 832         *snr = snrdb * (0xFFFF/32000);
 833
 834         return 0;
 835 }
 836
 837 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 838 {
 839         struct nxt200x_state* state = fe->demodulator_priv;
 840         u8 b[3];
 841
 842         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 843         *ucblocks = b[2];
 844
 845         return 0;
 846 }
 847
 848 static int nxt200x_sleep(struct dvb_frontend* fe)
 849 {
 850         return 0;
 851 }
 852
 853 static int nxt2002_init(struct dvb_frontend* fe)
 854 {
 855         struct nxt200x_state* state = fe->demodulator_priv;
 856         const struct firmware *fw;
 857         int ret;
 858         u8 buf[2];
 859
 860         /* request the firmware, this will block until someone uploads it */
 861         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 862                  __func__, "/*(DEBLOBBED)*/");
 863         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 864                                state->i2c->dev.parent);
 865         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 866         if (ret) {
 867                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 868                        __func__);
 869                 return ret;
 870         }
 871
 872         ret = nxt2002_load_firmware(fe, fw);
 873         release_firmware(fw);
 874         if (ret) {
 875                 pr_err("%s: Writing firmware to device failed\n", __func__);
 876                 return ret;
 877         }
 878         pr_info("%s: Firmware upload complete\n", __func__);
 879
 880         /* Put the micro into reset */
 881         nxt200x_microcontroller_stop(state);
 882
 883         /* ensure transfer is complete */
 884         buf[0]=0x00;
 885         nxt200x_writebytes(state, 0x2B, buf, 1);
 886
 887         /* Put the micro into reset for real this time */
 888         nxt200x_microcontroller_stop(state);
 889
 890         /* soft reset everything (agc,frontend,eq,fec)*/
 891         buf[0] = 0x0F;
 892         nxt200x_writebytes(state, 0x08, buf, 1);
 893         buf[0] = 0x00;
 894         nxt200x_writebytes(state, 0x08, buf, 1);
 895
 896         /* write agc sdm configure */
 897         buf[0] = 0xF1;
 898         nxt200x_writebytes(state, 0x57, buf, 1);
 899
 900         /* write mod output format */
 901         buf[0] = 0x20;
 902         nxt200x_writebytes(state, 0x09, buf, 1);
 903
 904         /* write fec mpeg mode */
 905         buf[0] = 0x7E;
 906         buf[1] = 0x00;
 907         nxt200x_writebytes(state, 0xE9, buf, 2);
 908
 909         /* write mux selection */
 910         buf[0] = 0x00;
 911         nxt200x_writebytes(state, 0xCC, buf, 1);
 912
 913         return 0;
 914 }
 915
 916 static int nxt2004_init(struct dvb_frontend* fe)
 917 {
 918         struct nxt200x_state* state = fe->demodulator_priv;
 919         const struct firmware *fw;
 920         int ret;
 921         u8 buf[3];
 922
 923         /* ??? */
 924         buf[0]=0x00;
 925         nxt200x_writebytes(state, 0x1E, buf, 1);
 926
 927         /* request the firmware, this will block until someone uploads it */
 928         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 929                  __func__, "/*(DEBLOBBED)*/");
 930         ret = reject_firmware(&fw, "/*(DEBLOBBED)*/",
 931                                state->i2c->dev.parent);
 932         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 933         if (ret) {
 934                 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
 935                        __func__);
 936                 return ret;
 937         }
 938
 939         ret = nxt2004_load_firmware(fe, fw);
 940         release_firmware(fw);
 941         if (ret) {
 942                 pr_err("%s: Writing firmware to device failed\n", __func__);
 943                 return ret;
 944         }
 945         pr_info("%s: Firmware upload complete\n", __func__);
 946
 947         /* ensure transfer is complete */
 948         buf[0] = 0x01;
 949         nxt200x_writebytes(state, 0x19, buf, 1);
 950
 951         nxt2004_microcontroller_init(state);
 952         nxt200x_microcontroller_stop(state);
 953         nxt200x_microcontroller_stop(state);
 954         nxt2004_microcontroller_init(state);
 955         nxt200x_microcontroller_stop(state);
 956
 957         /* soft reset everything (agc,frontend,eq,fec)*/
 958         buf[0] = 0xFF;
 959         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 960         buf[0] = 0x00;
 961         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 962
 963         /* write agc sdm configure */
 964         buf[0] = 0xD7;
 965         nxt200x_writebytes(state, 0x57, buf, 1);
 966
 967         /* ???*/
 968         buf[0] = 0x07;
 969         buf[1] = 0xfe;
 970         nxt200x_writebytes(state, 0x35, buf, 2);
 971         buf[0] = 0x12;
 972         nxt200x_writebytes(state, 0x34, buf, 1);
 973         buf[0] = 0x80;
 974         nxt200x_writebytes(state, 0x21, buf, 1);
 975
 976         /* ???*/
 977         buf[0] = 0x21;
 978         nxt200x_writebytes(state, 0x0A, buf, 1);
 979
 980         /* ???*/
 981         buf[0] = 0x01;
 982         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 983
 984         /* write fec mpeg mode */
 985         buf[0] = 0x7E;
 986         buf[1] = 0x00;
 987         nxt200x_writebytes(state, 0xE9, buf, 2);
 988
 989         /* write mux selection */
 990         buf[0] = 0x00;
 991         nxt200x_writebytes(state, 0xCC, buf, 1);
 992
 993         /* ???*/
 994         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 995         buf[0] = 0x00;
 996         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 997
 998         /* soft reset? */
 999         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1000         buf[0] = 0x10;
1001         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1002         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1003         buf[0] = 0x00;
1004         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1005
1006         /* ???*/
1007         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1008         buf[0] = 0x01;
1009         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1010         buf[0] = 0x70;
1011         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1012         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1013         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1014
1015         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1016         buf[0] = 0x11;
1017         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1018         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1019         buf[0] = 0x40;
1020         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1021
1022         nxt200x_readbytes(state, 0x10, buf, 1);
1023         buf[0] = 0x10;
1024         nxt200x_writebytes(state, 0x10, buf, 1);
1025         nxt200x_readbytes(state, 0x0A, buf, 1);
1026         buf[0] = 0x21;
1027         nxt200x_writebytes(state, 0x0A, buf, 1);
1028
1029         nxt2004_microcontroller_init(state);
1030
1031         buf[0] = 0x21;
1032         nxt200x_writebytes(state, 0x0A, buf, 1);
1033         buf[0] = 0x7E;
1034         nxt200x_writebytes(state, 0xE9, buf, 1);
1035         buf[0] = 0x00;
1036         nxt200x_writebytes(state, 0xEA, buf, 1);
1037
1038         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1039         buf[0] = 0x00;
1040         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1041         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1042         buf[0] = 0x00;
1043         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1044
1045         /* soft reset? */
1046         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1047         buf[0] = 0x10;
1048         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1049         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1050         buf[0] = 0x00;
1051         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1052
1053         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1054         buf[0] = 0x04;
1055         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1056         buf[0] = 0x00;
1057         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1058         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1059         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1060
1061         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1062         buf[0] = 0x11;
1063         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1064
1065         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1066         buf[0] = 0x44;
1067         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1068
1069         /* initialize tuner */
1070         nxt200x_readbytes(state, 0x10, buf, 1);
1071         buf[0] = 0x12;
1072         nxt200x_writebytes(state, 0x10, buf, 1);
1073         buf[0] = 0x04;
1074         nxt200x_writebytes(state, 0x13, buf, 1);
1075         buf[0] = 0x00;
1076         nxt200x_writebytes(state, 0x16, buf, 1);
1077         buf[0] = 0x04;
1078         nxt200x_writebytes(state, 0x14, buf, 1);
1079         buf[0] = 0x00;
1080         nxt200x_writebytes(state, 0x14, buf, 1);
1081         nxt200x_writebytes(state, 0x17, buf, 1);
1082         nxt200x_writebytes(state, 0x14, buf, 1);
1083         nxt200x_writebytes(state, 0x17, buf, 1);
1084
1085         return 0;
1086 }
1087
1088 static int nxt200x_init(struct dvb_frontend* fe)
1089 {
1090         struct nxt200x_state* state = fe->demodulator_priv;
1091         int ret = 0;
1092
1093         if (!state->initialised) {
1094                 switch (state->demod_chip) {
1095                         case NXT2002:
1096                                 ret = nxt2002_init(fe);
1097                                 break;
1098                         case NXT2004:
1099                                 ret = nxt2004_init(fe);
1100                                 break;
1101                         default:
1102                                 return -EINVAL;
1103                                 break;
1104                 }
1105                 state->initialised = 1;
1106         }
1107         return ret;
1108 }
1109
1110 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1111 {
1112         fesettings->min_delay_ms = 500;
1113         fesettings->step_size = 0;
1114         fesettings->max_drift = 0;
1115         return 0;
1116 }
1117
1118 static void nxt200x_release(struct dvb_frontend* fe)
1119 {
1120         struct nxt200x_state* state = fe->demodulator_priv;
1121         kfree(state);
1122 }
1123
1124 static const struct dvb_frontend_ops nxt200x_ops;
1125
1126 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1127                                    struct i2c_adapter* i2c)
1128 {
1129         struct nxt200x_state* state = NULL;
1130         u8 buf [] = {0,0,0,0,0};
1131
1132         /* allocate memory for the internal state */
1133         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1134         if (state == NULL)
1135                 goto error;
1136
1137         /* setup the state */
1138         state->config = config;
1139         state->i2c = i2c;
1140         state->initialised = 0;
1141
1142         /* read card id */
1143         nxt200x_readbytes(state, 0x00, buf, 5);
1144         dprintk("NXT info: %*ph\n", 5, buf);
1145
1146         /* set demod chip */
1147         switch (buf[0]) {
1148                 case 0x04:
1149                         state->demod_chip = NXT2002;
1150                         pr_info("NXT2002 Detected\n");
1151                         break;
1152                 case 0x05:
1153                         state->demod_chip = NXT2004;
1154                         pr_info("NXT2004 Detected\n");
1155                         break;
1156                 default:
1157                         goto error;
1158         }
1159
1160         /* make sure demod chip is supported */
1161         switch (state->demod_chip) {
1162                 case NXT2002:
1163                         if (buf[0] != 0x04) goto error;         /* device id */
1164                         if (buf[1] != 0x02) goto error;         /* fab id */
1165                         if (buf[2] != 0x11) goto error;         /* month */
1166                         if (buf[3] != 0x20) goto error;         /* year msb */
1167                         if (buf[4] != 0x00) goto error;         /* year lsb */
1168                         break;
1169                 case NXT2004:
1170                         if (buf[0] != 0x05) goto error;         /* device id */
1171                         break;
1172                 default:
1173                         goto error;
1174         }
1175
1176         /* create dvb_frontend */
1177         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1178         state->frontend.demodulator_priv = state;
1179         return &state->frontend;
1180
1181 error:
1182         kfree(state);
1183         pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1184         return NULL;
1185 }
1186
1187 static const struct dvb_frontend_ops nxt200x_ops = {
1188         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1189         .info = {
1190                 .name = "Nextwave NXT200X VSB/QAM frontend",
1191                 .frequency_min_hz =  54 * MHz,
1192                 .frequency_max_hz = 860 * MHz,
1193                 .frequency_stepsize_hz = 166666,        /* stepsize is just a guess */
1194                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1195                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1196                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1197         },
1198
1199         .release = nxt200x_release,
1200
1201         .init = nxt200x_init,
1202         .sleep = nxt200x_sleep,
1203
1204         .set_frontend = nxt200x_setup_frontend_parameters,
1205         .get_tune_settings = nxt200x_get_tune_settings,
1206
1207         .read_status = nxt200x_read_status,
1208         .read_ber = nxt200x_read_ber,
1209         .read_signal_strength = nxt200x_read_signal_strength,
1210         .read_snr = nxt200x_read_snr,
1211         .read_ucblocks = nxt200x_read_ucblocks,
1212 };
1213
1214 module_param(debug, int, 0644);
1215 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1216
1217 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1218 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1219 MODULE_LICENSE("GPL");
1220
1221 EXPORT_SYMBOL(nxt200x_attach);
1222