2 * Broadcom NetXtreme-E RoCE driver.
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * Description: Main component of the bnxt_re driver
39 #include <linux/module.h>
40 #include <linux/netdevice.h>
41 #include <linux/ethtool.h>
42 #include <linux/mutex.h>
43 #include <linux/list.h>
44 #include <linux/rculist.h>
45 #include <linux/spinlock.h>
46 #include <linux/pci.h>
47 #include <net/dcbnl.h>
49 #include <net/addrconf.h>
50 #include <linux/if_ether.h>
52 #include <rdma/ib_verbs.h>
53 #include <rdma/ib_user_verbs.h>
54 #include <rdma/ib_umem.h>
55 #include <rdma/ib_addr.h>
59 #include "qplib_res.h"
62 #include "qplib_rcfw.h"
65 #include <rdma/bnxt_re-abi.h>
67 #include "hw_counters.h"
69 static char version[] =
72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74 MODULE_LICENSE("Dual BSD/GPL");
77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list);
78 /* Mutex to protect the list of bnxt_re devices added */
79 static DEFINE_MUTEX(bnxt_re_dev_lock);
80 static struct workqueue_struct *bnxt_re_wq;
81 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
83 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev)
85 rdev->rcfw.res = NULL;
86 rdev->qplib_res.cctx = NULL;
89 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev)
91 struct bnxt_en_dev *en_dev;
94 en_dev = rdev->en_dev;
95 bp = netdev_priv(en_dev->net);
97 rdev->chip_ctx.chip_num = bp->chip_num;
98 /* rest members to follow eventually */
100 rdev->qplib_res.cctx = &rdev->chip_ctx;
101 rdev->rcfw.res = &rdev->qplib_res;
106 /* SR-IOV helper functions */
108 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev)
112 bp = netdev_priv(rdev->en_dev->net);
117 /* Set the maximum number of each resource that the driver actually wants
118 * to allocate. This may be up to the maximum number the firmware has
119 * reserved for the function. The driver may choose to allocate fewer
120 * resources than the firmware maximum.
122 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev)
124 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0;
128 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr;
130 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT,
133 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K;
134 /* Use max_mr from fw since max_mrw does not get set */
135 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count,
137 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT,
139 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT,
142 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++)
143 rdev->qplib_ctx.tqm_count[i] =
144 rdev->dev_attr.tqm_alloc_reqs[i];
148 * Reserve a set of resources for the PF. Divide the remaining
149 * resources among the VFs
151 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF;
152 num_vfs = 100 * rdev->num_vfs;
153 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs;
154 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs;
155 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs;
157 * The driver allows many more MRs than other resources. If the
158 * firmware does also, then reserve a fixed amount for the PF
159 * and divide the rest among VFs. VFs may use many MRs for NFS
160 * mounts, ISER, NVME applications, etc. If the firmware
161 * severely restricts the number of MRs, then let PF have
162 * half and divide the rest among VFs, as for the other
165 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K)
166 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs;
168 vf_mrws = (rdev->qplib_ctx.mrw_count -
169 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs;
170 vf_gids = BNXT_RE_MAX_GID_PER_VF;
172 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws;
173 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids;
174 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps;
175 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs;
176 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs;
179 /* for handling bnxt_en callbacks later */
180 static void bnxt_re_stop(void *p)
184 static void bnxt_re_start(void *p)
188 static void bnxt_re_sriov_config(void *p, int num_vfs)
190 struct bnxt_re_dev *rdev = p;
195 rdev->num_vfs = num_vfs;
196 bnxt_re_set_resource_limits(rdev);
197 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw,
201 static void bnxt_re_shutdown(void *p)
203 struct bnxt_re_dev *rdev = p;
208 bnxt_re_ib_unreg(rdev);
211 static void bnxt_re_stop_irq(void *handle)
213 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
214 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
215 struct bnxt_qplib_nq *nq;
218 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) {
219 nq = &rdev->nq[indx - 1];
220 bnxt_qplib_nq_stop_irq(nq, false);
223 bnxt_qplib_rcfw_stop_irq(rcfw, false);
226 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent)
228 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle;
229 struct bnxt_msix_entry *msix_ent = rdev->msix_entries;
230 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw;
231 struct bnxt_qplib_nq *nq;
235 /* Not setting the f/w timeout bit in rcfw.
236 * During the driver unload the first command
237 * to f/w will timeout and that will set the
240 dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n");
244 /* Vectors may change after restart, so update with new vectors
245 * in device sctructure.
247 for (indx = 0; indx < rdev->num_msix; indx++)
248 rdev->msix_entries[indx].vector = ent[indx].vector;
250 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector,
252 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) {
253 nq = &rdev->nq[indx - 1];
254 rc = bnxt_qplib_nq_start_irq(nq, indx - 1,
255 msix_ent[indx].vector, false);
257 dev_warn(rdev_to_dev(rdev),
258 "Failed to reinit NQ index %d\n", indx - 1);
262 static struct bnxt_ulp_ops bnxt_re_ulp_ops = {
263 .ulp_async_notifier = NULL,
264 .ulp_stop = bnxt_re_stop,
265 .ulp_start = bnxt_re_start,
266 .ulp_sriov_config = bnxt_re_sriov_config,
267 .ulp_shutdown = bnxt_re_shutdown,
268 .ulp_irq_stop = bnxt_re_stop_irq,
269 .ulp_irq_restart = bnxt_re_start_irq
272 /* RoCE -> Net driver */
274 /* Driver registration routines used to let the networking driver (bnxt_en)
275 * to know that the RoCE driver is now installed
277 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
279 struct bnxt_en_dev *en_dev;
285 en_dev = rdev->en_dev;
287 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
292 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev)
294 struct bnxt_en_dev *en_dev;
300 en_dev = rdev->en_dev;
302 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
303 &bnxt_re_ulp_ops, rdev);
304 rdev->qplib_res.pdev = rdev->en_dev->pdev;
308 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
310 struct bnxt_en_dev *en_dev;
316 en_dev = rdev->en_dev;
319 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
324 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev)
326 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got;
327 struct bnxt_en_dev *en_dev;
332 en_dev = rdev->en_dev;
334 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
336 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
339 if (num_msix_got < BNXT_RE_MIN_MSIX) {
343 if (num_msix_got != num_msix_want) {
344 dev_warn(rdev_to_dev(rdev),
345 "Requested %d MSI-X vectors, got %d\n",
346 num_msix_want, num_msix_got);
348 rdev->num_msix = num_msix_got;
353 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr,
354 u16 opcd, u16 crid, u16 trid)
356 hdr->req_type = cpu_to_le16(opcd);
357 hdr->cmpl_ring = cpu_to_le16(crid);
358 hdr->target_id = cpu_to_le16(trid);
361 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg,
362 int msg_len, void *resp, int resp_max_len,
366 fw_msg->msg_len = msg_len;
368 fw_msg->resp_max_len = resp_max_len;
369 fw_msg->timeout = timeout;
372 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev,
373 u16 fw_ring_id, int type)
375 struct bnxt_en_dev *en_dev = rdev->en_dev;
376 struct hwrm_ring_free_input req = {0};
377 struct hwrm_ring_free_output resp;
378 struct bnxt_fw_msg fw_msg;
384 memset(&fw_msg, 0, sizeof(fw_msg));
386 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
387 req.ring_type = type;
388 req.ring_id = cpu_to_le16(fw_ring_id);
389 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
390 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
391 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
393 dev_err(rdev_to_dev(rdev),
394 "Failed to free HW ring:%d :%#x", req.ring_id, rc);
398 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr,
399 int pages, int type, u32 ring_mask,
400 u32 map_index, u16 *fw_ring_id)
402 struct bnxt_en_dev *en_dev = rdev->en_dev;
403 struct hwrm_ring_alloc_input req = {0};
404 struct hwrm_ring_alloc_output resp;
405 struct bnxt_fw_msg fw_msg;
411 memset(&fw_msg, 0, sizeof(fw_msg));
412 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
414 req.page_tbl_addr = cpu_to_le64(dma_arr[0]);
416 /* Page size is in log2 units */
417 req.page_size = BNXT_PAGE_SHIFT;
418 req.page_tbl_depth = 1;
421 /* Association of ring index with doorbell index and MSIX number */
422 req.logical_id = cpu_to_le16(map_index);
423 req.length = cpu_to_le32(ring_mask + 1);
424 req.ring_type = type;
425 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;
426 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
427 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
428 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
430 *fw_ring_id = le16_to_cpu(resp.ring_id);
435 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
438 struct bnxt_en_dev *en_dev = rdev->en_dev;
439 struct hwrm_stat_ctx_free_input req = {0};
440 struct bnxt_fw_msg fw_msg;
446 memset(&fw_msg, 0, sizeof(fw_msg));
448 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
449 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
450 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req,
451 sizeof(req), DFLT_HWRM_CMD_TIMEOUT);
452 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
454 dev_err(rdev_to_dev(rdev),
455 "Failed to free HW stats context %#x", rc);
460 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev,
462 u32 *fw_stats_ctx_id)
464 struct hwrm_stat_ctx_alloc_output resp = {0};
465 struct hwrm_stat_ctx_alloc_input req = {0};
466 struct bnxt_en_dev *en_dev = rdev->en_dev;
467 struct bnxt_fw_msg fw_msg;
470 *fw_stats_ctx_id = INVALID_STATS_CTX_ID;
475 memset(&fw_msg, 0, sizeof(fw_msg));
477 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
478 req.update_period_ms = cpu_to_le32(1000);
479 req.stats_dma_addr = cpu_to_le64(dma_map);
480 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE;
481 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
482 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
483 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
485 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
492 static bool is_bnxt_re_dev(struct net_device *netdev)
494 struct ethtool_drvinfo drvinfo;
496 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) {
497 memset(&drvinfo, 0, sizeof(drvinfo));
498 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo);
500 if (strcmp(drvinfo.driver, "bnxt_en"))
507 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev)
509 struct bnxt_re_dev *rdev;
512 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) {
513 if (rdev->netdev == netdev) {
522 static void bnxt_re_dev_unprobe(struct net_device *netdev,
523 struct bnxt_en_dev *en_dev)
526 module_put(en_dev->pdev->driver->driver.owner);
529 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev)
531 struct bnxt *bp = netdev_priv(netdev);
532 struct bnxt_en_dev *en_dev;
533 struct pci_dev *pdev;
535 /* Call bnxt_en's RoCE probe via indirect API */
537 return ERR_PTR(-EINVAL);
539 en_dev = bp->ulp_probe(netdev);
545 return ERR_PTR(-EINVAL);
547 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) {
549 "%s: probe error: RoCE is not supported on this device",
550 ROCE_DRV_MODULE_NAME);
551 return ERR_PTR(-ENODEV);
554 /* Bump net device reference count */
555 if (!try_module_get(pdev->driver->driver.owner))
556 return ERR_PTR(-ENODEV);
563 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
566 struct bnxt_re_dev *rdev =
567 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
569 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor);
571 static DEVICE_ATTR_RO(hw_rev);
573 static ssize_t hca_type_show(struct device *device,
574 struct device_attribute *attr, char *buf)
576 struct bnxt_re_dev *rdev =
577 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev);
579 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc);
581 static DEVICE_ATTR_RO(hca_type);
583 static struct attribute *bnxt_re_attributes[] = {
584 &dev_attr_hw_rev.attr,
585 &dev_attr_hca_type.attr,
589 static const struct attribute_group bnxt_re_dev_attr_group = {
590 .attrs = bnxt_re_attributes,
593 static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev)
595 ib_unregister_device(&rdev->ibdev);
598 static const struct ib_device_ops bnxt_re_dev_ops = {
599 .owner = THIS_MODULE,
600 .driver_id = RDMA_DRIVER_BNXT_RE,
601 .uverbs_abi_ver = BNXT_RE_ABI_VERSION,
603 .add_gid = bnxt_re_add_gid,
604 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats,
605 .alloc_mr = bnxt_re_alloc_mr,
606 .alloc_pd = bnxt_re_alloc_pd,
607 .alloc_ucontext = bnxt_re_alloc_ucontext,
608 .create_ah = bnxt_re_create_ah,
609 .create_cq = bnxt_re_create_cq,
610 .create_qp = bnxt_re_create_qp,
611 .create_srq = bnxt_re_create_srq,
612 .dealloc_pd = bnxt_re_dealloc_pd,
613 .dealloc_ucontext = bnxt_re_dealloc_ucontext,
614 .del_gid = bnxt_re_del_gid,
615 .dereg_mr = bnxt_re_dereg_mr,
616 .destroy_ah = bnxt_re_destroy_ah,
617 .destroy_cq = bnxt_re_destroy_cq,
618 .destroy_qp = bnxt_re_destroy_qp,
619 .destroy_srq = bnxt_re_destroy_srq,
620 .get_dev_fw_str = bnxt_re_query_fw_str,
621 .get_dma_mr = bnxt_re_get_dma_mr,
622 .get_hw_stats = bnxt_re_ib_get_hw_stats,
623 .get_link_layer = bnxt_re_get_link_layer,
624 .get_port_immutable = bnxt_re_get_port_immutable,
625 .map_mr_sg = bnxt_re_map_mr_sg,
626 .mmap = bnxt_re_mmap,
627 .modify_ah = bnxt_re_modify_ah,
628 .modify_device = bnxt_re_modify_device,
629 .modify_qp = bnxt_re_modify_qp,
630 .modify_srq = bnxt_re_modify_srq,
631 .poll_cq = bnxt_re_poll_cq,
632 .post_recv = bnxt_re_post_recv,
633 .post_send = bnxt_re_post_send,
634 .post_srq_recv = bnxt_re_post_srq_recv,
635 .query_ah = bnxt_re_query_ah,
636 .query_device = bnxt_re_query_device,
637 .query_pkey = bnxt_re_query_pkey,
638 .query_port = bnxt_re_query_port,
639 .query_qp = bnxt_re_query_qp,
640 .query_srq = bnxt_re_query_srq,
641 .reg_user_mr = bnxt_re_reg_user_mr,
642 .req_notify_cq = bnxt_re_req_notify_cq,
643 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah),
644 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq),
645 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd),
646 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq),
647 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx),
650 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev)
652 struct ib_device *ibdev = &rdev->ibdev;
656 ibdev->node_type = RDMA_NODE_IB_CA;
657 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA",
658 strlen(BNXT_RE_DESC) + 5);
659 ibdev->phys_port_cnt = 1;
661 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid);
663 ibdev->num_comp_vectors = 1;
664 ibdev->dev.parent = &rdev->en_dev->pdev->dev;
665 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY;
668 ibdev->uverbs_cmd_mask =
669 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
670 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
671 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
672 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
673 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
674 (1ull << IB_USER_VERBS_CMD_REG_MR) |
675 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
676 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
677 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
678 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
679 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
680 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
681 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
682 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
683 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
684 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
685 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
686 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
687 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
688 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
689 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
690 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) |
691 (1ull << IB_USER_VERBS_CMD_QUERY_AH) |
692 (1ull << IB_USER_VERBS_CMD_DESTROY_AH);
693 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */
696 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group);
697 ib_set_device_ops(ibdev, &bnxt_re_dev_ops);
698 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1);
702 return ib_register_device(ibdev, "bnxt_re%d");
705 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev)
707 dev_put(rdev->netdev);
710 mutex_lock(&bnxt_re_dev_lock);
711 list_del_rcu(&rdev->list);
712 mutex_unlock(&bnxt_re_dev_lock);
716 ib_dealloc_device(&rdev->ibdev);
720 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev,
721 struct bnxt_en_dev *en_dev)
723 struct bnxt_re_dev *rdev;
725 /* Allocate bnxt_re_dev instance here */
726 rdev = ib_alloc_device(bnxt_re_dev, ibdev);
728 dev_err(NULL, "%s: bnxt_re_dev allocation failure!",
729 ROCE_DRV_MODULE_NAME);
733 rdev->netdev = netdev;
734 dev_hold(rdev->netdev);
735 rdev->en_dev = en_dev;
736 rdev->id = rdev->en_dev->pdev->devfn;
737 INIT_LIST_HEAD(&rdev->qp_list);
738 mutex_init(&rdev->qp_lock);
739 atomic_set(&rdev->qp_count, 0);
740 atomic_set(&rdev->cq_count, 0);
741 atomic_set(&rdev->srq_count, 0);
742 atomic_set(&rdev->mr_count, 0);
743 atomic_set(&rdev->mw_count, 0);
744 rdev->cosq[0] = 0xFFFF;
745 rdev->cosq[1] = 0xFFFF;
747 mutex_lock(&bnxt_re_dev_lock);
748 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list);
749 mutex_unlock(&bnxt_re_dev_lock);
753 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event
756 switch (unaffi_async->event) {
757 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR:
759 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR:
761 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR:
763 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR:
765 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR:
767 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR:
769 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR:
771 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR:
773 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR:
775 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR:
777 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR:
785 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event,
786 struct bnxt_re_qp *qp)
788 struct ib_event event;
791 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) {
792 flags = bnxt_re_lock_cqs(qp);
793 bnxt_qplib_add_flush_qp(&qp->qplib_qp);
794 bnxt_re_unlock_cqs(qp, flags);
797 memset(&event, 0, sizeof(event));
798 if (qp->qplib_qp.srq) {
799 event.device = &qp->rdev->ibdev;
800 event.element.qp = &qp->ib_qp;
801 event.event = IB_EVENT_QP_LAST_WQE_REACHED;
804 if (event.device && qp->ib_qp.event_handler)
805 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
810 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async,
817 return rc; /* QP was already dead, still return success */
819 event = affi_async->event;
820 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) {
821 struct bnxt_qplib_qp *lib_qp = obj;
822 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp,
824 rc = bnxt_re_handle_qp_async_event(affi_async, qp);
829 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw,
830 void *aeqe, void *obj)
832 struct creq_qp_event *affi_async;
833 struct creq_func_event *unaffi_async;
837 type = ((struct creq_base *)aeqe)->type;
838 if (type == CREQ_BASE_TYPE_FUNC_EVENT) {
840 rc = bnxt_re_handle_unaffi_async_event(unaffi_async);
843 rc = bnxt_re_handle_affi_async_event(affi_async, obj);
849 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq,
850 struct bnxt_qplib_srq *handle, u8 event)
852 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq,
854 struct ib_event ib_event;
858 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled",
859 ROCE_DRV_MODULE_NAME);
863 ib_event.device = &srq->rdev->ibdev;
864 ib_event.element.srq = &srq->ib_srq;
865 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT)
866 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED;
868 ib_event.event = IB_EVENT_SRQ_ERR;
870 if (srq->ib_srq.event_handler) {
871 /* Lock event_handler? */
872 (*srq->ib_srq.event_handler)(&ib_event,
873 srq->ib_srq.srq_context);
879 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq,
880 struct bnxt_qplib_cq *handle)
882 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq,
886 dev_err(NULL, "%s: CQ is NULL, CQN not handled",
887 ROCE_DRV_MODULE_NAME);
890 if (cq->ib_cq.comp_handler) {
891 /* Lock comp_handler? */
892 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context);
898 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx)
900 return bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx) ?
901 0x10000 : rdev->msix_entries[indx].db_offset;
904 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev)
908 for (i = 1; i < rdev->num_msix; i++)
909 bnxt_qplib_disable_nq(&rdev->nq[i - 1]);
911 if (rdev->qplib_res.rcfw)
912 bnxt_qplib_cleanup_res(&rdev->qplib_res);
915 static int bnxt_re_init_res(struct bnxt_re_dev *rdev)
917 int num_vec_enabled = 0;
921 bnxt_qplib_init_res(&rdev->qplib_res);
923 for (i = 1; i < rdev->num_msix ; i++) {
924 db_offt = bnxt_re_get_nqdb_offset(rdev, i);
925 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1],
926 i - 1, rdev->msix_entries[i].vector,
927 db_offt, &bnxt_re_cqn_handler,
928 &bnxt_re_srqn_handler);
930 dev_err(rdev_to_dev(rdev),
931 "Failed to enable NQ with rc = 0x%x", rc);
938 for (i = num_vec_enabled; i >= 0; i--)
939 bnxt_qplib_disable_nq(&rdev->nq[i]);
943 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
948 for (i = 0; i < rdev->num_msix - 1; i++) {
949 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
950 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
951 rdev->nq[i].res = NULL;
952 bnxt_qplib_free_nq(&rdev->nq[i]);
956 static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
958 bnxt_re_free_nq_res(rdev);
960 if (rdev->qplib_res.dpi_tbl.max) {
961 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
962 &rdev->qplib_res.dpi_tbl,
963 &rdev->dpi_privileged);
965 if (rdev->qplib_res.rcfw) {
966 bnxt_qplib_free_res(&rdev->qplib_res);
967 rdev->qplib_res.rcfw = NULL;
971 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev)
973 int num_vec_created = 0;
979 /* Configure and allocate resources for qplib */
980 rdev->qplib_res.rcfw = &rdev->rcfw;
981 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
986 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev,
987 rdev->netdev, &rdev->dev_attr);
991 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl,
992 &rdev->dpi_privileged,
997 for (i = 0; i < rdev->num_msix - 1; i++) {
998 rdev->nq[i].res = &rdev->qplib_res;
999 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT +
1000 BNXT_RE_MAX_SRQC_COUNT + 2;
1001 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]);
1003 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x",
1007 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1008 pg_map = rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr;
1009 pages = rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count;
1010 rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type,
1011 BNXT_QPLIB_NQE_MAX_CNT - 1,
1012 rdev->msix_entries[i + 1].ring_idx,
1013 &rdev->nq[i].ring_id);
1015 dev_err(rdev_to_dev(rdev),
1016 "Failed to allocate NQ fw id with rc = 0x%x",
1018 bnxt_qplib_free_nq(&rdev->nq[i]);
1025 for (i = num_vec_created; i >= 0; i--) {
1026 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1027 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type);
1028 bnxt_qplib_free_nq(&rdev->nq[i]);
1030 bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
1031 &rdev->qplib_res.dpi_tbl,
1032 &rdev->dpi_privileged);
1034 bnxt_qplib_free_res(&rdev->qplib_res);
1037 rdev->qplib_res.rcfw = NULL;
1041 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp,
1042 u8 port_num, enum ib_event_type event)
1044 struct ib_event ib_event;
1046 ib_event.device = ibdev;
1048 ib_event.element.qp = qp;
1049 ib_event.event = event;
1050 if (qp->event_handler)
1051 qp->event_handler(&ib_event, qp->qp_context);
1054 ib_event.element.port_num = port_num;
1055 ib_event.event = event;
1056 ib_dispatch_event(&ib_event);
1060 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02
1061 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir,
1064 struct hwrm_queue_pri2cos_qcfg_input req = {0};
1065 struct bnxt *bp = netdev_priv(rdev->netdev);
1066 struct hwrm_queue_pri2cos_qcfg_output resp;
1067 struct bnxt_en_dev *en_dev = rdev->en_dev;
1068 struct bnxt_fw_msg fw_msg;
1070 u8 *qcfgmap, *tmp_map;
1076 memset(&fw_msg, 0, sizeof(fw_msg));
1077 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1078 HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
1079 flags |= (dir & 0x01);
1080 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN;
1081 req.flags = cpu_to_le32(flags);
1082 req.port_id = bp->pf.port_id;
1084 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1085 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1086 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1090 if (resp.queue_cfg_info) {
1091 dev_warn(rdev_to_dev(rdev),
1092 "Asymmetric cos queue configuration detected");
1093 dev_warn(rdev_to_dev(rdev),
1094 " on device, QoS may not be fully functional\n");
1096 qcfgmap = &resp.pri0_cos_queue_id;
1097 tmp_map = (u8 *)cid_map;
1098 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1099 tmp_map[i] = qcfgmap[i];
1104 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev,
1105 struct bnxt_re_qp *qp)
1107 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp);
1110 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev)
1112 int mask = IB_QP_STATE;
1113 struct ib_qp_attr qp_attr;
1114 struct bnxt_re_qp *qp;
1116 qp_attr.qp_state = IB_QPS_ERR;
1117 mutex_lock(&rdev->qp_lock);
1118 list_for_each_entry(qp, &rdev->qp_list, list) {
1119 /* Modify the state of all QPs except QP1/Shadow QP */
1120 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) {
1121 if (qp->qplib_qp.state !=
1122 CMDQ_MODIFY_QP_NEW_STATE_RESET &&
1123 qp->qplib_qp.state !=
1124 CMDQ_MODIFY_QP_NEW_STATE_ERR) {
1125 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp,
1126 1, IB_EVENT_QP_FATAL);
1127 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask,
1132 mutex_unlock(&rdev->qp_lock);
1135 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev)
1137 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
1138 struct bnxt_qplib_gid gid;
1142 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
1146 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated");
1150 for (index = 0; index < sgid_tbl->active; index++) {
1151 gid_idx = sgid_tbl->hw_id[index];
1153 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
1154 sizeof(bnxt_qplib_gid_zero)))
1156 /* need to modify the VLAN enable setting of non VLAN GID only
1157 * as setting is done for VLAN GID while adding GID
1159 if (sgid_tbl->vlan[index])
1162 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid));
1164 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx,
1165 rdev->qplib_res.netdev->dev_addr);
1171 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev)
1173 u32 prio_map = 0, tmp_map = 0;
1174 struct net_device *netdev;
1177 netdev = rdev->netdev;
1179 memset(&app, 0, sizeof(app));
1180 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE;
1181 app.protocol = ETH_P_IBOE;
1182 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1185 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM;
1186 app.protocol = ROCE_V2_UDP_DPORT;
1187 tmp_map = dcb_ieee_getapp_mask(netdev, &app);
1188 prio_map |= tmp_map;
1193 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq)
1198 for (prio = 0, id = 0; prio < 8; prio++) {
1199 if (prio_map & (1 << prio)) {
1200 cosq[id] = cid_map[prio];
1202 if (id == 2) /* Max 2 tcs supported */
1208 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev)
1214 /* Get priority for roce */
1215 prio_map = bnxt_re_get_priority_mask(rdev);
1217 if (prio_map == rdev->cur_prio_map)
1219 rdev->cur_prio_map = prio_map;
1220 /* Get cosq id for this priority */
1221 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map);
1223 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map);
1226 /* Parse CoS IDs for app priority */
1227 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq);
1230 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq);
1232 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n",
1233 rdev->cosq[0], rdev->cosq[1]);
1237 /* Actual priorities are not programmed as they are already
1238 * done by L2 driver; just enable or disable priority vlan tagging
1240 if ((prio_map == 0 && rdev->qplib_res.prio) ||
1241 (prio_map != 0 && !rdev->qplib_res.prio)) {
1242 rdev->qplib_res.prio = prio_map ? true : false;
1244 bnxt_re_update_gid(rdev);
1250 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev)
1252 struct bnxt_en_dev *en_dev = rdev->en_dev;
1253 struct hwrm_ver_get_output resp = {0};
1254 struct hwrm_ver_get_input req = {0};
1255 struct bnxt_fw_msg fw_msg;
1258 memset(&fw_msg, 0, sizeof(fw_msg));
1259 bnxt_re_init_hwrm_hdr(rdev, (void *)&req,
1260 HWRM_VER_GET, -1, -1);
1261 req.hwrm_intf_maj = HWRM_VERSION_MAJOR;
1262 req.hwrm_intf_min = HWRM_VERSION_MINOR;
1263 req.hwrm_intf_upd = HWRM_VERSION_UPDATE;
1264 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp,
1265 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT);
1266 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg);
1268 dev_err(rdev_to_dev(rdev),
1269 "Failed to query HW version, rc = 0x%x", rc);
1272 rdev->qplib_ctx.hwrm_intf_ver =
1273 (u64)resp.hwrm_intf_major << 48 |
1274 (u64)resp.hwrm_intf_minor << 32 |
1275 (u64)resp.hwrm_intf_build << 16 |
1276 resp.hwrm_intf_patch;
1279 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
1284 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) {
1285 /* Cleanup ib dev */
1286 bnxt_re_unregister_ib(rdev);
1288 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags))
1289 cancel_delayed_work_sync(&rdev->worker);
1291 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED,
1293 bnxt_re_cleanup_res(rdev);
1294 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags))
1295 bnxt_re_free_res(rdev);
1297 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
1298 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
1300 dev_warn(rdev_to_dev(rdev),
1301 "Failed to deinitialize RCFW: %#x", rc);
1302 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1303 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
1304 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1305 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1306 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
1307 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1309 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
1310 rc = bnxt_re_free_msix(rdev);
1312 dev_warn(rdev_to_dev(rdev),
1313 "Failed to free MSI-X vectors: %#x", rc);
1316 bnxt_re_destroy_chip_ctx(rdev);
1317 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
1318 rc = bnxt_re_unregister_netdev(rdev);
1320 dev_warn(rdev_to_dev(rdev),
1321 "Failed to unregister with netdev: %#x", rc);
1325 /* worker thread for polling periodic events. Now used for QoS programming*/
1326 static void bnxt_re_worker(struct work_struct *work)
1328 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev,
1331 bnxt_re_setup_qos(rdev);
1332 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1335 static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev)
1344 /* Acquire rtnl lock through out this function */
1348 /* Registered a new RoCE device instance to netdev */
1349 rc = bnxt_re_register_netdev(rdev);
1352 pr_err("Failed to register with netedev: %#x\n", rc);
1355 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
1357 rc = bnxt_re_setup_chip_ctx(rdev);
1359 dev_err(rdev_to_dev(rdev), "Failed to get chip context\n");
1363 /* Check whether VF or PF */
1364 bnxt_re_get_sriov_func_type(rdev);
1366 rc = bnxt_re_request_msix(rdev);
1368 pr_err("Failed to get MSI-X vectors: %#x\n", rc);
1372 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags);
1374 bnxt_re_query_hwrm_intf_version(rdev);
1376 /* Establish RCFW Communication Channel to initialize the context
1377 * memory for the function and all child VFs
1379 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
1381 BNXT_RE_MAX_QPC_COUNT);
1383 pr_err("Failed to allocate RCFW Channel: %#x\n", rc);
1386 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1387 pg_map = rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr;
1388 pages = rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count;
1389 ridx = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx;
1390 rc = bnxt_re_net_ring_alloc(rdev, pg_map, pages, type,
1391 BNXT_QPLIB_CREQE_MAX_CNT - 1,
1392 ridx, &rdev->rcfw.creq_ring_id);
1394 pr_err("Failed to allocate CREQ: %#x\n", rc);
1397 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX);
1398 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector;
1399 rc = bnxt_qplib_enable_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw,
1400 vid, db_offt, rdev->is_virtfn,
1401 &bnxt_re_aeq_handler);
1403 pr_err("Failed to enable RCFW channel: %#x\n", rc);
1407 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr,
1411 if (!rdev->is_virtfn)
1412 bnxt_re_set_resource_limits(rdev);
1414 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0,
1415 bnxt_qplib_is_chip_gen_p5(&rdev->chip_ctx));
1417 pr_err("Failed to allocate QPLIB context: %#x\n", rc);
1420 rc = bnxt_re_net_stats_ctx_alloc(rdev,
1421 rdev->qplib_ctx.stats.dma_map,
1422 &rdev->qplib_ctx.stats.fw_id);
1424 pr_err("Failed to allocate stats context: %#x\n", rc);
1428 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx,
1431 pr_err("Failed to initialize RCFW: %#x\n", rc);
1434 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags);
1436 /* Resources based on the 'new' device caps */
1437 rc = bnxt_re_alloc_res(rdev);
1439 pr_err("Failed to allocate resources: %#x\n", rc);
1442 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags);
1443 rc = bnxt_re_init_res(rdev);
1445 pr_err("Failed to initialize resources: %#x\n", rc);
1449 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags);
1451 if (!rdev->is_virtfn) {
1452 rc = bnxt_re_setup_qos(rdev);
1454 pr_info("RoCE priority not yet configured\n");
1456 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker);
1457 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags);
1458 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
1464 /* Register ib dev */
1465 rc = bnxt_re_register_ib(rdev);
1467 pr_err("Failed to register with IB: %#x\n", rc);
1470 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
1471 dev_info(rdev_to_dev(rdev), "Device registered successfully");
1472 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1473 &rdev->active_width);
1474 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
1475 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE);
1476 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE);
1480 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
1482 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
1484 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
1486 type = bnxt_qplib_get_ring_type(&rdev->chip_ctx);
1487 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, type);
1489 bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
1493 bnxt_re_ib_unreg(rdev);
1499 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev)
1501 struct bnxt_en_dev *en_dev = rdev->en_dev;
1502 struct net_device *netdev = rdev->netdev;
1504 bnxt_re_dev_remove(rdev);
1507 bnxt_re_dev_unprobe(netdev, en_dev);
1510 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev)
1512 struct bnxt_en_dev *en_dev;
1515 if (!is_bnxt_re_dev(netdev))
1518 en_dev = bnxt_re_dev_probe(netdev);
1519 if (IS_ERR(en_dev)) {
1520 if (en_dev != ERR_PTR(-ENODEV))
1521 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME);
1522 rc = PTR_ERR(en_dev);
1525 *rdev = bnxt_re_dev_add(netdev, en_dev);
1528 bnxt_re_dev_unprobe(netdev, en_dev);
1535 static void bnxt_re_remove_one(struct bnxt_re_dev *rdev)
1537 pci_dev_put(rdev->en_dev->pdev);
1540 /* Handle all deferred netevents tasks */
1541 static void bnxt_re_task(struct work_struct *work)
1543 struct bnxt_re_work *re_work;
1544 struct bnxt_re_dev *rdev;
1547 re_work = container_of(work, struct bnxt_re_work, work);
1548 rdev = re_work->rdev;
1550 if (re_work->event != NETDEV_REGISTER &&
1551 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags))
1554 switch (re_work->event) {
1555 case NETDEV_REGISTER:
1556 rc = bnxt_re_ib_reg(rdev);
1558 dev_err(rdev_to_dev(rdev),
1559 "Failed to register with IB: %#x", rc);
1560 bnxt_re_remove_one(rdev);
1561 bnxt_re_dev_unreg(rdev);
1566 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1567 IB_EVENT_PORT_ACTIVE);
1570 bnxt_re_dev_stop(rdev);
1573 if (!netif_carrier_ok(rdev->netdev))
1574 bnxt_re_dev_stop(rdev);
1575 else if (netif_carrier_ok(rdev->netdev))
1576 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1,
1577 IB_EVENT_PORT_ACTIVE);
1578 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
1579 &rdev->active_width);
1584 smp_mb__before_atomic();
1585 atomic_dec(&rdev->sched_count);
1590 static void bnxt_re_init_one(struct bnxt_re_dev *rdev)
1592 pci_dev_get(rdev->en_dev->pdev);
1596 * "Notifier chain callback can be invoked for the same chain from
1597 * different CPUs at the same time".
1599 * For cases when the netdev is already present, our call to the
1600 * register_netdevice_notifier() will actually get the rtnl_lock()
1601 * before sending NETDEV_REGISTER and (if up) NETDEV_UP
1604 * But for cases when the netdev is not already present, the notifier
1605 * chain is subjected to be invoked from different CPUs simultaneously.
1607 * This is protected by the netdev_mutex.
1609 static int bnxt_re_netdev_event(struct notifier_block *notifier,
1610 unsigned long event, void *ptr)
1612 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr);
1613 struct bnxt_re_work *re_work;
1614 struct bnxt_re_dev *rdev;
1616 bool sch_work = false;
1618 real_dev = rdma_vlan_dev_real_dev(netdev);
1622 rdev = bnxt_re_from_netdev(real_dev);
1623 if (!rdev && event != NETDEV_REGISTER)
1625 if (real_dev != netdev)
1629 case NETDEV_REGISTER:
1632 rc = bnxt_re_dev_reg(&rdev, real_dev);
1636 pr_err("Failed to register with the device %s: %#x\n",
1637 real_dev->name, rc);
1640 bnxt_re_init_one(rdev);
1644 case NETDEV_UNREGISTER:
1645 /* netdev notifier will call NETDEV_UNREGISTER again later since
1646 * we are still holding the reference to the netdev
1648 if (atomic_read(&rdev->sched_count) > 0)
1650 bnxt_re_ib_unreg(rdev);
1651 bnxt_re_remove_one(rdev);
1652 bnxt_re_dev_unreg(rdev);
1660 /* Allocate for the deferred task */
1661 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC);
1663 re_work->rdev = rdev;
1664 re_work->event = event;
1665 re_work->vlan_dev = (real_dev == netdev ?
1667 INIT_WORK(&re_work->work, bnxt_re_task);
1668 atomic_inc(&rdev->sched_count);
1669 queue_work(bnxt_re_wq, &re_work->work);
1677 static struct notifier_block bnxt_re_netdev_notifier = {
1678 .notifier_call = bnxt_re_netdev_event
1681 static int __init bnxt_re_mod_init(void)
1685 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version);
1687 bnxt_re_wq = create_singlethread_workqueue("bnxt_re");
1691 INIT_LIST_HEAD(&bnxt_re_dev_list);
1693 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier);
1695 pr_err("%s: Cannot register to netdevice_notifier",
1696 ROCE_DRV_MODULE_NAME);
1702 destroy_workqueue(bnxt_re_wq);
1707 static void __exit bnxt_re_mod_exit(void)
1709 struct bnxt_re_dev *rdev, *next;
1710 LIST_HEAD(to_be_deleted);
1712 mutex_lock(&bnxt_re_dev_lock);
1713 /* Free all adapter allocated resources */
1714 if (!list_empty(&bnxt_re_dev_list))
1715 list_splice_init(&bnxt_re_dev_list, &to_be_deleted);
1716 mutex_unlock(&bnxt_re_dev_lock);
1718 * Cleanup the devices in reverse order so that the VF device
1719 * cleanup is done before PF cleanup
1721 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) {
1722 dev_info(rdev_to_dev(rdev), "Unregistering Device");
1724 * Flush out any scheduled tasks before destroying the
1727 flush_workqueue(bnxt_re_wq);
1728 bnxt_re_dev_stop(rdev);
1729 /* Acquire the rtnl_lock as the L2 resources are freed here */
1731 bnxt_re_ib_unreg(rdev);
1733 bnxt_re_remove_one(rdev);
1734 bnxt_re_dev_unreg(rdev);
1736 unregister_netdevice_notifier(&bnxt_re_netdev_notifier);
1738 destroy_workqueue(bnxt_re_wq);
1741 module_init(bnxt_re_mod_init);
1742 module_exit(bnxt_re_mod_exit);