drivers/iio/imu/bmi160/bmi160_core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * BMI160 - Bosch IMU (accel, gyro plus external magnetometer)
   4  *
   5  * Copyright (c) 2016, Intel Corporation.
   6  * Copyright (c) 2019, Martin Kelly.
   7  *
   8  * IIO core driver for BMI160, with support for I2C/SPI busses
   9  *
  10  * TODO: magnetometer, hardware FIFO
  11  */
  12 #include <linux/module.h>
  13 #include <linux/regmap.h>
  14 #include <linux/acpi.h>
  15 #include <linux/delay.h>
  16 #include <linux/irq.h>
  17 #include <linux/of_irq.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/triggered_buffer.h>
  21 #include <linux/iio/trigger_consumer.h>
  22 #include <linux/iio/buffer.h>
  23 #include <linux/iio/sysfs.h>
  24 #include <linux/iio/trigger.h>
  25
  26 #include "bmi160.h"
  27
  28 #define BMI160_REG_CHIP_ID      0x00
  29 #define BMI160_CHIP_ID_VAL      0xD1
  30
  31 #define BMI160_REG_PMU_STATUS   0x03
  32
  33 /* X axis data low byte address, the rest can be obtained using axis offset */
  34 #define BMI160_REG_DATA_MAGN_XOUT_L     0x04
  35 #define BMI160_REG_DATA_GYRO_XOUT_L     0x0C
  36 #define BMI160_REG_DATA_ACCEL_XOUT_L    0x12
  37
  38 #define BMI160_REG_ACCEL_CONFIG         0x40
  39 #define BMI160_ACCEL_CONFIG_ODR_MASK    GENMASK(3, 0)
  40 #define BMI160_ACCEL_CONFIG_BWP_MASK    GENMASK(6, 4)
  41
  42 #define BMI160_REG_ACCEL_RANGE          0x41
  43 #define BMI160_ACCEL_RANGE_2G           0x03
  44 #define BMI160_ACCEL_RANGE_4G           0x05
  45 #define BMI160_ACCEL_RANGE_8G           0x08
  46 #define BMI160_ACCEL_RANGE_16G          0x0C
  47
  48 #define BMI160_REG_GYRO_CONFIG          0x42
  49 #define BMI160_GYRO_CONFIG_ODR_MASK     GENMASK(3, 0)
  50 #define BMI160_GYRO_CONFIG_BWP_MASK     GENMASK(5, 4)
  51
  52 #define BMI160_REG_GYRO_RANGE           0x43
  53 #define BMI160_GYRO_RANGE_2000DPS       0x00
  54 #define BMI160_GYRO_RANGE_1000DPS       0x01
  55 #define BMI160_GYRO_RANGE_500DPS        0x02
  56 #define BMI160_GYRO_RANGE_250DPS        0x03
  57 #define BMI160_GYRO_RANGE_125DPS        0x04
  58
  59 #define BMI160_REG_CMD                  0x7E
  60 #define BMI160_CMD_ACCEL_PM_SUSPEND     0x10
  61 #define BMI160_CMD_ACCEL_PM_NORMAL      0x11
  62 #define BMI160_CMD_ACCEL_PM_LOW_POWER   0x12
  63 #define BMI160_CMD_GYRO_PM_SUSPEND      0x14
  64 #define BMI160_CMD_GYRO_PM_NORMAL       0x15
  65 #define BMI160_CMD_GYRO_PM_FAST_STARTUP 0x17
  66 #define BMI160_CMD_SOFTRESET            0xB6
  67
  68 #define BMI160_REG_INT_EN               0x51
  69 #define BMI160_DRDY_INT_EN              BIT(4)
  70
  71 #define BMI160_REG_INT_OUT_CTRL         0x53
  72 #define BMI160_INT_OUT_CTRL_MASK        0x0f
  73 #define BMI160_INT1_OUT_CTRL_SHIFT      0
  74 #define BMI160_INT2_OUT_CTRL_SHIFT      4
  75 #define BMI160_EDGE_TRIGGERED           BIT(0)
  76 #define BMI160_ACTIVE_HIGH              BIT(1)
  77 #define BMI160_OPEN_DRAIN               BIT(2)
  78 #define BMI160_OUTPUT_EN                BIT(3)
  79
  80 #define BMI160_REG_INT_LATCH            0x54
  81 #define BMI160_INT1_LATCH_MASK          BIT(4)
  82 #define BMI160_INT2_LATCH_MASK          BIT(5)
  83
  84 /* INT1 and INT2 are in the opposite order as in INT_OUT_CTRL! */
  85 #define BMI160_REG_INT_MAP              0x56
  86 #define BMI160_INT1_MAP_DRDY_EN         0x80
  87 #define BMI160_INT2_MAP_DRDY_EN         0x08
  88
  89 #define BMI160_REG_DUMMY                0x7F
  90
  91 #define BMI160_NORMAL_WRITE_USLEEP      2
  92 #define BMI160_SUSPENDED_WRITE_USLEEP   450
  93
  94 #define BMI160_ACCEL_PMU_MIN_USLEEP     3800
  95 #define BMI160_GYRO_PMU_MIN_USLEEP      80000
  96 #define BMI160_SOFTRESET_USLEEP         1000
  97
  98 #define BMI160_CHANNEL(_type, _axis, _index) {                  \
  99         .type = _type,                                          \
 100         .modified = 1,                                          \
 101         .channel2 = IIO_MOD_##_axis,                            \
 102         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
 103         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |  \
 104                 BIT(IIO_CHAN_INFO_SAMP_FREQ),                   \
 105         .scan_index = _index,                                   \
 106         .scan_type = {                                          \
 107                 .sign = 's',                                    \
 108                 .realbits = 16,                                 \
 109                 .storagebits = 16,                              \
 110                 .endianness = IIO_LE,                           \
 111         },                                                      \
 112 }
 113
 114 /* scan indexes follow DATA register order */
 115 enum bmi160_scan_axis {
 116         BMI160_SCAN_EXT_MAGN_X = 0,
 117         BMI160_SCAN_EXT_MAGN_Y,
 118         BMI160_SCAN_EXT_MAGN_Z,
 119         BMI160_SCAN_RHALL,
 120         BMI160_SCAN_GYRO_X,
 121         BMI160_SCAN_GYRO_Y,
 122         BMI160_SCAN_GYRO_Z,
 123         BMI160_SCAN_ACCEL_X,
 124         BMI160_SCAN_ACCEL_Y,
 125         BMI160_SCAN_ACCEL_Z,
 126         BMI160_SCAN_TIMESTAMP,
 127 };
 128
 129 enum bmi160_sensor_type {
 130         BMI160_ACCEL    = 0,
 131         BMI160_GYRO,
 132         BMI160_EXT_MAGN,
 133         BMI160_NUM_SENSORS /* must be last */
 134 };
 135
 136 enum bmi160_int_pin {
 137         BMI160_PIN_INT1,
 138         BMI160_PIN_INT2
 139 };
 140
 141 const struct regmap_config bmi160_regmap_config = {
 142         .reg_bits = 8,
 143         .val_bits = 8,
 144 };
 145 EXPORT_SYMBOL(bmi160_regmap_config);
 146
 147 struct bmi160_regs {
 148         u8 data; /* LSB byte register for X-axis */
 149         u8 config;
 150         u8 config_odr_mask;
 151         u8 config_bwp_mask;
 152         u8 range;
 153         u8 pmu_cmd_normal;
 154         u8 pmu_cmd_suspend;
 155 };
 156
 157 static struct bmi160_regs bmi160_regs[] = {
 158         [BMI160_ACCEL] = {
 159                 .data   = BMI160_REG_DATA_ACCEL_XOUT_L,
 160                 .config = BMI160_REG_ACCEL_CONFIG,
 161                 .config_odr_mask = BMI160_ACCEL_CONFIG_ODR_MASK,
 162                 .config_bwp_mask = BMI160_ACCEL_CONFIG_BWP_MASK,
 163                 .range  = BMI160_REG_ACCEL_RANGE,
 164                 .pmu_cmd_normal = BMI160_CMD_ACCEL_PM_NORMAL,
 165                 .pmu_cmd_suspend = BMI160_CMD_ACCEL_PM_SUSPEND,
 166         },
 167         [BMI160_GYRO] = {
 168                 .data   = BMI160_REG_DATA_GYRO_XOUT_L,
 169                 .config = BMI160_REG_GYRO_CONFIG,
 170                 .config_odr_mask = BMI160_GYRO_CONFIG_ODR_MASK,
 171                 .config_bwp_mask = BMI160_GYRO_CONFIG_BWP_MASK,
 172                 .range  = BMI160_REG_GYRO_RANGE,
 173                 .pmu_cmd_normal = BMI160_CMD_GYRO_PM_NORMAL,
 174                 .pmu_cmd_suspend = BMI160_CMD_GYRO_PM_SUSPEND,
 175         },
 176 };
 177
 178 static unsigned long bmi160_pmu_time[] = {
 179         [BMI160_ACCEL] = BMI160_ACCEL_PMU_MIN_USLEEP,
 180         [BMI160_GYRO] = BMI160_GYRO_PMU_MIN_USLEEP,
 181 };
 182
 183 struct bmi160_scale {
 184         u8 bits;
 185         int uscale;
 186 };
 187
 188 struct bmi160_odr {
 189         u8 bits;
 190         int odr;
 191         int uodr;
 192 };
 193
 194 static const struct bmi160_scale bmi160_accel_scale[] = {
 195         { BMI160_ACCEL_RANGE_2G, 598},
 196         { BMI160_ACCEL_RANGE_4G, 1197},
 197         { BMI160_ACCEL_RANGE_8G, 2394},
 198         { BMI160_ACCEL_RANGE_16G, 4788},
 199 };
 200
 201 static const struct bmi160_scale bmi160_gyro_scale[] = {
 202         { BMI160_GYRO_RANGE_2000DPS, 1065},
 203         { BMI160_GYRO_RANGE_1000DPS, 532},
 204         { BMI160_GYRO_RANGE_500DPS, 266},
 205         { BMI160_GYRO_RANGE_250DPS, 133},
 206         { BMI160_GYRO_RANGE_125DPS, 66},
 207 };
 208
 209 struct bmi160_scale_item {
 210         const struct bmi160_scale *tbl;
 211         int num;
 212 };
 213
 214 static const struct  bmi160_scale_item bmi160_scale_table[] = {
 215         [BMI160_ACCEL] = {
 216                 .tbl    = bmi160_accel_scale,
 217                 .num    = ARRAY_SIZE(bmi160_accel_scale),
 218         },
 219         [BMI160_GYRO] = {
 220                 .tbl    = bmi160_gyro_scale,
 221                 .num    = ARRAY_SIZE(bmi160_gyro_scale),
 222         },
 223 };
 224
 225 static const struct bmi160_odr bmi160_accel_odr[] = {
 226         {0x01, 0, 781250},
 227         {0x02, 1, 562500},
 228         {0x03, 3, 125000},
 229         {0x04, 6, 250000},
 230         {0x05, 12, 500000},
 231         {0x06, 25, 0},
 232         {0x07, 50, 0},
 233         {0x08, 100, 0},
 234         {0x09, 200, 0},
 235         {0x0A, 400, 0},
 236         {0x0B, 800, 0},
 237         {0x0C, 1600, 0},
 238 };
 239
 240 static const struct bmi160_odr bmi160_gyro_odr[] = {
 241         {0x06, 25, 0},
 242         {0x07, 50, 0},
 243         {0x08, 100, 0},
 244         {0x09, 200, 0},
 245         {0x0A, 400, 0},
 246         {0x0B, 800, 0},
 247         {0x0C, 1600, 0},
 248         {0x0D, 3200, 0},
 249 };
 250
 251 struct bmi160_odr_item {
 252         const struct bmi160_odr *tbl;
 253         int num;
 254 };
 255
 256 static const struct  bmi160_odr_item bmi160_odr_table[] = {
 257         [BMI160_ACCEL] = {
 258                 .tbl    = bmi160_accel_odr,
 259                 .num    = ARRAY_SIZE(bmi160_accel_odr),
 260         },
 261         [BMI160_GYRO] = {
 262                 .tbl    = bmi160_gyro_odr,
 263                 .num    = ARRAY_SIZE(bmi160_gyro_odr),
 264         },
 265 };
 266
 267 static const struct iio_chan_spec bmi160_channels[] = {
 268         BMI160_CHANNEL(IIO_ACCEL, X, BMI160_SCAN_ACCEL_X),
 269         BMI160_CHANNEL(IIO_ACCEL, Y, BMI160_SCAN_ACCEL_Y),
 270         BMI160_CHANNEL(IIO_ACCEL, Z, BMI160_SCAN_ACCEL_Z),
 271         BMI160_CHANNEL(IIO_ANGL_VEL, X, BMI160_SCAN_GYRO_X),
 272         BMI160_CHANNEL(IIO_ANGL_VEL, Y, BMI160_SCAN_GYRO_Y),
 273         BMI160_CHANNEL(IIO_ANGL_VEL, Z, BMI160_SCAN_GYRO_Z),
 274         IIO_CHAN_SOFT_TIMESTAMP(BMI160_SCAN_TIMESTAMP),
 275 };
 276
 277 static enum bmi160_sensor_type bmi160_to_sensor(enum iio_chan_type iio_type)
 278 {
 279         switch (iio_type) {
 280         case IIO_ACCEL:
 281                 return BMI160_ACCEL;
 282         case IIO_ANGL_VEL:
 283                 return BMI160_GYRO;
 284         default:
 285                 return -EINVAL;
 286         }
 287 }
 288
 289 static
 290 int bmi160_set_mode(struct bmi160_data *data, enum bmi160_sensor_type t,
 291                     bool mode)
 292 {
 293         int ret;
 294         u8 cmd;
 295
 296         if (mode)
 297                 cmd = bmi160_regs[t].pmu_cmd_normal;
 298         else
 299                 cmd = bmi160_regs[t].pmu_cmd_suspend;
 300
 301         ret = regmap_write(data->regmap, BMI160_REG_CMD, cmd);
 302         if (ret)
 303                 return ret;
 304
 305         usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000);
 306
 307         return 0;
 308 }
 309
 310 static
 311 int bmi160_set_scale(struct bmi160_data *data, enum bmi160_sensor_type t,
 312                      int uscale)
 313 {
 314         int i;
 315
 316         for (i = 0; i < bmi160_scale_table[t].num; i++)
 317                 if (bmi160_scale_table[t].tbl[i].uscale == uscale)
 318                         break;
 319
 320         if (i == bmi160_scale_table[t].num)
 321                 return -EINVAL;
 322
 323         return regmap_write(data->regmap, bmi160_regs[t].range,
 324                             bmi160_scale_table[t].tbl[i].bits);
 325 }
 326
 327 static
 328 int bmi160_get_scale(struct bmi160_data *data, enum bmi160_sensor_type t,
 329                      int *uscale)
 330 {
 331         int i, ret, val;
 332
 333         ret = regmap_read(data->regmap, bmi160_regs[t].range, &val);
 334         if (ret)
 335                 return ret;
 336
 337         for (i = 0; i < bmi160_scale_table[t].num; i++)
 338                 if (bmi160_scale_table[t].tbl[i].bits == val) {
 339                         *uscale = bmi160_scale_table[t].tbl[i].uscale;
 340                         return 0;
 341                 }
 342
 343         return -EINVAL;
 344 }
 345
 346 static int bmi160_get_data(struct bmi160_data *data, int chan_type,
 347                            int axis, int *val)
 348 {
 349         u8 reg;
 350         int ret;
 351         __le16 sample;
 352         enum bmi160_sensor_type t = bmi160_to_sensor(chan_type);
 353
 354         reg = bmi160_regs[t].data + (axis - IIO_MOD_X) * sizeof(sample);
 355
 356         ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample));
 357         if (ret)
 358                 return ret;
 359
 360         *val = sign_extend32(le16_to_cpu(sample), 15);
 361
 362         return 0;
 363 }
 364
 365 static
 366 int bmi160_set_odr(struct bmi160_data *data, enum bmi160_sensor_type t,
 367                    int odr, int uodr)
 368 {
 369         int i;
 370
 371         for (i = 0; i < bmi160_odr_table[t].num; i++)
 372                 if (bmi160_odr_table[t].tbl[i].odr == odr &&
 373                     bmi160_odr_table[t].tbl[i].uodr == uodr)
 374                         break;
 375
 376         if (i >= bmi160_odr_table[t].num)
 377                 return -EINVAL;
 378
 379         return regmap_update_bits(data->regmap,
 380                                   bmi160_regs[t].config,
 381                                   bmi160_regs[t].config_odr_mask,
 382                                   bmi160_odr_table[t].tbl[i].bits);
 383 }
 384
 385 static int bmi160_get_odr(struct bmi160_data *data, enum bmi160_sensor_type t,
 386                           int *odr, int *uodr)
 387 {
 388         int i, val, ret;
 389
 390         ret = regmap_read(data->regmap, bmi160_regs[t].config, &val);
 391         if (ret)
 392                 return ret;
 393
 394         val &= bmi160_regs[t].config_odr_mask;
 395
 396         for (i = 0; i < bmi160_odr_table[t].num; i++)
 397                 if (val == bmi160_odr_table[t].tbl[i].bits)
 398                         break;
 399
 400         if (i >= bmi160_odr_table[t].num)
 401                 return -EINVAL;
 402
 403         *odr = bmi160_odr_table[t].tbl[i].odr;
 404         *uodr = bmi160_odr_table[t].tbl[i].uodr;
 405
 406         return 0;
 407 }
 408
 409 static irqreturn_t bmi160_trigger_handler(int irq, void *p)
 410 {
 411         struct iio_poll_func *pf = p;
 412         struct iio_dev *indio_dev = pf->indio_dev;
 413         struct bmi160_data *data = iio_priv(indio_dev);
 414         __le16 buf[16];
 415         /* 3 sens x 3 axis x __le16 + 3 x __le16 pad + 4 x __le16 tstamp */
 416         int i, ret, j = 0, base = BMI160_REG_DATA_MAGN_XOUT_L;
 417         __le16 sample;
 418
 419         for_each_set_bit(i, indio_dev->active_scan_mask,
 420                          indio_dev->masklength) {
 421                 ret = regmap_bulk_read(data->regmap, base + i * sizeof(sample),
 422                                        &sample, sizeof(sample));
 423                 if (ret)
 424                         goto done;
 425                 buf[j++] = sample;
 426         }
 427
 428         iio_push_to_buffers_with_timestamp(indio_dev, buf, pf->timestamp);
 429 done:
 430         iio_trigger_notify_done(indio_dev->trig);
 431         return IRQ_HANDLED;
 432 }
 433
 434 static int bmi160_read_raw(struct iio_dev *indio_dev,
 435                            struct iio_chan_spec const *chan,
 436                            int *val, int *val2, long mask)
 437 {
 438         int ret;
 439         struct bmi160_data *data = iio_priv(indio_dev);
 440
 441         switch (mask) {
 442         case IIO_CHAN_INFO_RAW:
 443                 ret = bmi160_get_data(data, chan->type, chan->channel2, val);
 444                 if (ret)
 445                         return ret;
 446                 return IIO_VAL_INT;
 447         case IIO_CHAN_INFO_SCALE:
 448                 *val = 0;
 449                 ret = bmi160_get_scale(data,
 450                                        bmi160_to_sensor(chan->type), val2);
 451                 return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
 452         case IIO_CHAN_INFO_SAMP_FREQ:
 453                 ret = bmi160_get_odr(data, bmi160_to_sensor(chan->type),
 454                                      val, val2);
 455                 return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
 456         default:
 457                 return -EINVAL;
 458         }
 459
 460         return 0;
 461 }
 462
 463 static int bmi160_write_raw(struct iio_dev *indio_dev,
 464                             struct iio_chan_spec const *chan,
 465                             int val, int val2, long mask)
 466 {
 467         struct bmi160_data *data = iio_priv(indio_dev);
 468
 469         switch (mask) {
 470         case IIO_CHAN_INFO_SCALE:
 471                 return bmi160_set_scale(data,
 472                                         bmi160_to_sensor(chan->type), val2);
 473                 break;
 474         case IIO_CHAN_INFO_SAMP_FREQ:
 475                 return bmi160_set_odr(data, bmi160_to_sensor(chan->type),
 476                                       val, val2);
 477         default:
 478                 return -EINVAL;
 479         }
 480
 481         return 0;
 482 }
 483
 484 static
 485 IIO_CONST_ATTR(in_accel_sampling_frequency_available,
 486                "0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600");
 487 static
 488 IIO_CONST_ATTR(in_anglvel_sampling_frequency_available,
 489                "25 50 100 200 400 800 1600 3200");
 490 static
 491 IIO_CONST_ATTR(in_accel_scale_available,
 492                "0.000598 0.001197 0.002394 0.004788");
 493 static
 494 IIO_CONST_ATTR(in_anglvel_scale_available,
 495                "0.001065 0.000532 0.000266 0.000133 0.000066");
 496
 497 static struct attribute *bmi160_attrs[] = {
 498         &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
 499         &iio_const_attr_in_anglvel_sampling_frequency_available.dev_attr.attr,
 500         &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 501         &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
 502         NULL,
 503 };
 504
 505 static const struct attribute_group bmi160_attrs_group = {
 506         .attrs = bmi160_attrs,
 507 };
 508
 509 static const struct iio_info bmi160_info = {
 510         .read_raw = bmi160_read_raw,
 511         .write_raw = bmi160_write_raw,
 512         .attrs = &bmi160_attrs_group,
 513 };
 514
 515 static const char *bmi160_match_acpi_device(struct device *dev)
 516 {
 517         const struct acpi_device_id *id;
 518
 519         id = acpi_match_device(dev->driver->acpi_match_table, dev);
 520         if (!id)
 521                 return NULL;
 522
 523         return dev_name(dev);
 524 }
 525
 526 static int bmi160_write_conf_reg(struct regmap *regmap, unsigned int reg,
 527                                  unsigned int mask, unsigned int bits,
 528                                  unsigned int write_usleep)
 529 {
 530         int ret;
 531         unsigned int val;
 532
 533         ret = regmap_read(regmap, reg, &val);
 534         if (ret)
 535                 return ret;
 536
 537         val = (val & ~mask) | bits;
 538
 539         ret = regmap_write(regmap, reg, val);
 540         if (ret)
 541                 return ret;
 542
 543         /*
 544          * We need to wait after writing before we can write again. See the
 545          * datasheet, page 93.
 546          */
 547         usleep_range(write_usleep, write_usleep + 1000);
 548
 549         return 0;
 550 }
 551
 552 static int bmi160_config_pin(struct regmap *regmap, enum bmi160_int_pin pin,
 553                              bool open_drain, u8 irq_mask,
 554                              unsigned long write_usleep)
 555 {
 556         int ret;
 557         struct device *dev = regmap_get_device(regmap);
 558         u8 int_out_ctrl_shift;
 559         u8 int_latch_mask;
 560         u8 int_map_mask;
 561         u8 int_out_ctrl_mask;
 562         u8 int_out_ctrl_bits;
 563         const char *pin_name;
 564
 565         switch (pin) {
 566         case BMI160_PIN_INT1:
 567                 int_out_ctrl_shift = BMI160_INT1_OUT_CTRL_SHIFT;
 568                 int_latch_mask = BMI160_INT1_LATCH_MASK;
 569                 int_map_mask = BMI160_INT1_MAP_DRDY_EN;
 570                 break;
 571         case BMI160_PIN_INT2:
 572                 int_out_ctrl_shift = BMI160_INT2_OUT_CTRL_SHIFT;
 573                 int_latch_mask = BMI160_INT2_LATCH_MASK;
 574                 int_map_mask = BMI160_INT2_MAP_DRDY_EN;
 575                 break;
 576         }
 577         int_out_ctrl_mask = BMI160_INT_OUT_CTRL_MASK << int_out_ctrl_shift;
 578
 579         /*
 580          * Enable the requested pin with the right settings:
 581          * - Push-pull/open-drain
 582          * - Active low/high
 583          * - Edge/level triggered
 584          */
 585         int_out_ctrl_bits = BMI160_OUTPUT_EN;
 586         if (open_drain)
 587                 /* Default is push-pull. */
 588                 int_out_ctrl_bits |= BMI160_OPEN_DRAIN;
 589         int_out_ctrl_bits |= irq_mask;
 590         int_out_ctrl_bits <<= int_out_ctrl_shift;
 591
 592         ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_OUT_CTRL,
 593                                     int_out_ctrl_mask, int_out_ctrl_bits,
 594                                     write_usleep);
 595         if (ret)
 596                 return ret;
 597
 598         /* Set the pin to input mode with no latching. */
 599         ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_LATCH,
 600                                     int_latch_mask, int_latch_mask,
 601                                     write_usleep);
 602         if (ret)
 603                 return ret;
 604
 605         /* Map interrupts to the requested pin. */
 606         ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_MAP,
 607                                     int_map_mask, int_map_mask,
 608                                     write_usleep);
 609         if (ret) {
 610                 switch (pin) {
 611                 case BMI160_PIN_INT1:
 612                         pin_name = "INT1";
 613                         break;
 614                 case BMI160_PIN_INT2:
 615                         pin_name = "INT2";
 616                         break;
 617                 }
 618                 dev_err(dev, "Failed to configure %s IRQ pin", pin_name);
 619         }
 620
 621         return ret;
 622 }
 623
 624 int bmi160_enable_irq(struct regmap *regmap, bool enable)
 625 {
 626         unsigned int enable_bit = 0;
 627
 628         if (enable)
 629                 enable_bit = BMI160_DRDY_INT_EN;
 630
 631         return bmi160_write_conf_reg(regmap, BMI160_REG_INT_EN,
 632                                      BMI160_DRDY_INT_EN, enable_bit,
 633                                      BMI160_NORMAL_WRITE_USLEEP);
 634 }
 635 EXPORT_SYMBOL(bmi160_enable_irq);
 636
 637 static int bmi160_get_irq(struct device_node *of_node, enum bmi160_int_pin *pin)
 638 {
 639         int irq;
 640
 641         /* Use INT1 if possible, otherwise fall back to INT2. */
 642         irq = of_irq_get_byname(of_node, "INT1");
 643         if (irq > 0) {
 644                 *pin = BMI160_PIN_INT1;
 645                 return irq;
 646         }
 647
 648         irq = of_irq_get_byname(of_node, "INT2");
 649         if (irq > 0)
 650                 *pin = BMI160_PIN_INT2;
 651
 652         return irq;
 653 }
 654
 655 static int bmi160_config_device_irq(struct iio_dev *indio_dev, int irq_type,
 656                                     enum bmi160_int_pin pin)
 657 {
 658         bool open_drain;
 659         u8 irq_mask;
 660         struct bmi160_data *data = iio_priv(indio_dev);
 661         struct device *dev = regmap_get_device(data->regmap);
 662
 663         /* Level-triggered, active-low is the default if we set all zeroes. */
 664         if (irq_type == IRQF_TRIGGER_RISING)
 665                 irq_mask = BMI160_ACTIVE_HIGH | BMI160_EDGE_TRIGGERED;
 666         else if (irq_type == IRQF_TRIGGER_FALLING)
 667                 irq_mask = BMI160_EDGE_TRIGGERED;
 668         else if (irq_type == IRQF_TRIGGER_HIGH)
 669                 irq_mask = BMI160_ACTIVE_HIGH;
 670         else if (irq_type == IRQF_TRIGGER_LOW)
 671                 irq_mask = 0;
 672         else {
 673                 dev_err(&indio_dev->dev,
 674                         "Invalid interrupt type 0x%x specified\n", irq_type);
 675                 return -EINVAL;
 676         }
 677
 678         open_drain = of_property_read_bool(dev->of_node, "drive-open-drain");
 679
 680         return bmi160_config_pin(data->regmap, pin, open_drain, irq_mask,
 681                                  BMI160_NORMAL_WRITE_USLEEP);
 682 }
 683
 684 static int bmi160_setup_irq(struct iio_dev *indio_dev, int irq,
 685                             enum bmi160_int_pin pin)
 686 {
 687         struct irq_data *desc;
 688         u32 irq_type;
 689         int ret;
 690
 691         desc = irq_get_irq_data(irq);
 692         if (!desc) {
 693                 dev_err(&indio_dev->dev, "Could not find IRQ %d\n", irq);
 694                 return -EINVAL;
 695         }
 696
 697         irq_type = irqd_get_trigger_type(desc);
 698
 699         ret = bmi160_config_device_irq(indio_dev, irq_type, pin);
 700         if (ret)
 701                 return ret;
 702
 703         return bmi160_probe_trigger(indio_dev, irq, irq_type);
 704 }
 705
 706 static int bmi160_chip_init(struct bmi160_data *data, bool use_spi)
 707 {
 708         int ret;
 709         unsigned int val;
 710         struct device *dev = regmap_get_device(data->regmap);
 711
 712         ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
 713         if (ret)
 714                 return ret;
 715
 716         usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1);
 717
 718         /*
 719          * CS rising edge is needed before starting SPI, so do a dummy read
 720          * See Section 3.2.1, page 86 of the datasheet
 721          */
 722         if (use_spi) {
 723                 ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val);
 724                 if (ret)
 725                         return ret;
 726         }
 727
 728         ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val);
 729         if (ret) {
 730                 dev_err(dev, "Error reading chip id\n");
 731                 return ret;
 732         }
 733         if (val != BMI160_CHIP_ID_VAL) {
 734                 dev_err(dev, "Wrong chip id, got %x expected %x\n",
 735                         val, BMI160_CHIP_ID_VAL);
 736                 return -ENODEV;
 737         }
 738
 739         ret = bmi160_set_mode(data, BMI160_ACCEL, true);
 740         if (ret)
 741                 return ret;
 742
 743         ret = bmi160_set_mode(data, BMI160_GYRO, true);
 744         if (ret)
 745                 return ret;
 746
 747         return 0;
 748 }
 749
 750 static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig,
 751                                              bool enable)
 752 {
 753         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
 754         struct bmi160_data *data = iio_priv(indio_dev);
 755
 756         return bmi160_enable_irq(data->regmap, enable);
 757 }
 758
 759 static const struct iio_trigger_ops bmi160_trigger_ops = {
 760         .set_trigger_state = &bmi160_data_rdy_trigger_set_state,
 761 };
 762
 763 int bmi160_probe_trigger(struct iio_dev *indio_dev, int irq, u32 irq_type)
 764 {
 765         struct bmi160_data *data = iio_priv(indio_dev);
 766         int ret;
 767
 768         data->trig = devm_iio_trigger_alloc(&indio_dev->dev, "%s-dev%d",
 769                                             indio_dev->name, indio_dev->id);
 770
 771         if (data->trig == NULL)
 772                 return -ENOMEM;
 773
 774         ret = devm_request_irq(&indio_dev->dev, irq,
 775                                &iio_trigger_generic_data_rdy_poll,
 776                                irq_type, "bmi160", data->trig);
 777         if (ret)
 778                 return ret;
 779
 780         data->trig->dev.parent = regmap_get_device(data->regmap);
 781         data->trig->ops = &bmi160_trigger_ops;
 782         iio_trigger_set_drvdata(data->trig, indio_dev);
 783
 784         ret = devm_iio_trigger_register(&indio_dev->dev, data->trig);
 785         if (ret)
 786                 return ret;
 787
 788         indio_dev->trig = iio_trigger_get(data->trig);
 789
 790         return 0;
 791 }
 792
 793 static void bmi160_chip_uninit(void *data)
 794 {
 795         struct bmi160_data *bmi_data = data;
 796
 797         bmi160_set_mode(bmi_data, BMI160_GYRO, false);
 798         bmi160_set_mode(bmi_data, BMI160_ACCEL, false);
 799 }
 800
 801 int bmi160_core_probe(struct device *dev, struct regmap *regmap,
 802                       const char *name, bool use_spi)
 803 {
 804         struct iio_dev *indio_dev;
 805         struct bmi160_data *data;
 806         int irq;
 807         enum bmi160_int_pin int_pin;
 808         int ret;
 809
 810         indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 811         if (!indio_dev)
 812                 return -ENOMEM;
 813
 814         data = iio_priv(indio_dev);
 815         dev_set_drvdata(dev, indio_dev);
 816         data->regmap = regmap;
 817
 818         ret = bmi160_chip_init(data, use_spi);
 819         if (ret)
 820                 return ret;
 821
 822         ret = devm_add_action_or_reset(dev, bmi160_chip_uninit, data);
 823         if (ret)
 824                 return ret;
 825
 826         if (!name && ACPI_HANDLE(dev))
 827                 name = bmi160_match_acpi_device(dev);
 828
 829         indio_dev->dev.parent = dev;
 830         indio_dev->channels = bmi160_channels;
 831         indio_dev->num_channels = ARRAY_SIZE(bmi160_channels);
 832         indio_dev->name = name;
 833         indio_dev->modes = INDIO_DIRECT_MODE;
 834         indio_dev->info = &bmi160_info;
 835
 836         ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
 837                                               iio_pollfunc_store_time,
 838                                               bmi160_trigger_handler, NULL);
 839         if (ret)
 840                 return ret;
 841
 842         irq = bmi160_get_irq(dev->of_node, &int_pin);
 843         if (irq > 0) {
 844                 ret = bmi160_setup_irq(indio_dev, irq, int_pin);
 845                 if (ret)
 846                         dev_err(&indio_dev->dev, "Failed to setup IRQ %d\n",
 847                                 irq);
 848         } else {
 849                 dev_info(&indio_dev->dev, "Not setting up IRQ trigger\n");
 850         }
 851
 852         return devm_iio_device_register(dev, indio_dev);
 853 }
 854 EXPORT_SYMBOL_GPL(bmi160_core_probe);
 855
 856 MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com");
 857 MODULE_DESCRIPTION("Bosch BMI160 driver");
 858 MODULE_LICENSE("GPL v2");