1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5592R Digital <-> Analog converters driver
5 * Copyright 2014-2016 Analog Devices Inc.
6 * Author: Paul Cercueil <paul.cercueil@analog.com>
9 #include <linux/bitops.h>
10 #include <linux/delay.h>
11 #include <linux/iio/iio.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/gpio.h>
19 #include <linux/property.h>
21 #include <dt-bindings/iio/adi,ad5592r.h>
23 #include "ad5592r-base.h"
25 static int ad5592r_gpio_get(struct gpio_chip *chip, unsigned offset)
27 struct ad5592r_state *st = gpiochip_get_data(chip);
31 mutex_lock(&st->gpio_lock);
33 if (st->gpio_out & BIT(offset))
36 ret = st->ops->gpio_read(st, &val);
38 mutex_unlock(&st->gpio_lock);
43 return !!(val & BIT(offset));
46 static void ad5592r_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
48 struct ad5592r_state *st = gpiochip_get_data(chip);
50 mutex_lock(&st->gpio_lock);
53 st->gpio_val |= BIT(offset);
55 st->gpio_val &= ~BIT(offset);
57 st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
59 mutex_unlock(&st->gpio_lock);
62 static int ad5592r_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
64 struct ad5592r_state *st = gpiochip_get_data(chip);
67 mutex_lock(&st->gpio_lock);
69 st->gpio_out &= ~BIT(offset);
70 st->gpio_in |= BIT(offset);
72 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
76 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
79 mutex_unlock(&st->gpio_lock);
84 static int ad5592r_gpio_direction_output(struct gpio_chip *chip,
85 unsigned offset, int value)
87 struct ad5592r_state *st = gpiochip_get_data(chip);
90 mutex_lock(&st->gpio_lock);
93 st->gpio_val |= BIT(offset);
95 st->gpio_val &= ~BIT(offset);
97 st->gpio_in &= ~BIT(offset);
98 st->gpio_out |= BIT(offset);
100 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
104 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
108 ret = st->ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
111 mutex_unlock(&st->gpio_lock);
116 static int ad5592r_gpio_request(struct gpio_chip *chip, unsigned offset)
118 struct ad5592r_state *st = gpiochip_get_data(chip);
120 if (!(st->gpio_map & BIT(offset))) {
121 dev_err(st->dev, "GPIO %d is reserved by alternate function\n",
129 static int ad5592r_gpio_init(struct ad5592r_state *st)
134 st->gpiochip.label = dev_name(st->dev);
135 st->gpiochip.base = -1;
136 st->gpiochip.ngpio = 8;
137 st->gpiochip.parent = st->dev;
138 st->gpiochip.can_sleep = true;
139 st->gpiochip.direction_input = ad5592r_gpio_direction_input;
140 st->gpiochip.direction_output = ad5592r_gpio_direction_output;
141 st->gpiochip.get = ad5592r_gpio_get;
142 st->gpiochip.set = ad5592r_gpio_set;
143 st->gpiochip.request = ad5592r_gpio_request;
144 st->gpiochip.owner = THIS_MODULE;
146 mutex_init(&st->gpio_lock);
148 return gpiochip_add_data(&st->gpiochip, st);
151 static void ad5592r_gpio_cleanup(struct ad5592r_state *st)
154 gpiochip_remove(&st->gpiochip);
157 static int ad5592r_reset(struct ad5592r_state *st)
159 struct gpio_desc *gpio;
160 struct iio_dev *iio_dev = iio_priv_to_dev(st);
162 gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
164 return PTR_ERR(gpio);
168 gpiod_set_value(gpio, 1);
170 mutex_lock(&iio_dev->mlock);
171 /* Writing this magic value resets the device */
172 st->ops->reg_write(st, AD5592R_REG_RESET, 0xdac);
173 mutex_unlock(&iio_dev->mlock);
181 static int ad5592r_get_vref(struct ad5592r_state *st)
186 ret = regulator_get_voltage(st->reg);
196 static int ad5592r_set_channel_modes(struct ad5592r_state *st)
198 const struct ad5592r_rw_ops *ops = st->ops;
201 struct iio_dev *iio_dev = iio_priv_to_dev(st);
202 u8 pulldown = 0, tristate = 0, dac = 0, adc = 0;
205 for (i = 0; i < st->num_channels; i++) {
206 switch (st->channel_modes[i]) {
215 case CH_MODE_DAC_AND_ADC:
221 st->gpio_map |= BIT(i);
222 st->gpio_in |= BIT(i); /* Default to input */
228 switch (st->channel_offstate[i]) {
229 case CH_OFFSTATE_OUT_TRISTATE:
233 case CH_OFFSTATE_OUT_LOW:
234 st->gpio_out |= BIT(i);
237 case CH_OFFSTATE_OUT_HIGH:
238 st->gpio_out |= BIT(i);
239 st->gpio_val |= BIT(i);
242 case CH_OFFSTATE_PULLDOWN:
251 mutex_lock(&iio_dev->mlock);
253 /* Pull down unused pins to GND */
254 ret = ops->reg_write(st, AD5592R_REG_PULLDOWN, pulldown);
258 ret = ops->reg_write(st, AD5592R_REG_TRISTATE, tristate);
262 /* Configure pins that we use */
263 ret = ops->reg_write(st, AD5592R_REG_DAC_EN, dac);
267 ret = ops->reg_write(st, AD5592R_REG_ADC_EN, adc);
271 ret = ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val);
275 ret = ops->reg_write(st, AD5592R_REG_GPIO_OUT_EN, st->gpio_out);
279 ret = ops->reg_write(st, AD5592R_REG_GPIO_IN_EN, st->gpio_in);
283 /* Verify that we can read back at least one register */
284 ret = ops->reg_read(st, AD5592R_REG_ADC_EN, &read_back);
285 if (!ret && (read_back & 0xff) != adc)
289 mutex_unlock(&iio_dev->mlock);
293 static int ad5592r_reset_channel_modes(struct ad5592r_state *st)
297 for (i = 0; i < ARRAY_SIZE(st->channel_modes); i++)
298 st->channel_modes[i] = CH_MODE_UNUSED;
300 return ad5592r_set_channel_modes(st);
303 static int ad5592r_write_raw(struct iio_dev *iio_dev,
304 struct iio_chan_spec const *chan, int val, int val2, long mask)
306 struct ad5592r_state *st = iio_priv(iio_dev);
310 case IIO_CHAN_INFO_RAW:
312 if (val >= (1 << chan->scan_type.realbits) || val < 0)
318 mutex_lock(&iio_dev->mlock);
319 ret = st->ops->write_dac(st, chan->channel, val);
321 st->cached_dac[chan->channel] = val;
322 mutex_unlock(&iio_dev->mlock);
324 case IIO_CHAN_INFO_SCALE:
325 if (chan->type == IIO_VOLTAGE) {
328 if (val == st->scale_avail[0][0] &&
329 val2 == st->scale_avail[0][1])
331 else if (val == st->scale_avail[1][0] &&
332 val2 == st->scale_avail[1][1])
337 mutex_lock(&iio_dev->mlock);
339 ret = st->ops->reg_read(st, AD5592R_REG_CTRL,
340 &st->cached_gp_ctrl);
342 mutex_unlock(&iio_dev->mlock);
348 st->cached_gp_ctrl |=
349 AD5592R_REG_CTRL_DAC_RANGE;
351 st->cached_gp_ctrl &=
352 ~AD5592R_REG_CTRL_DAC_RANGE;
355 st->cached_gp_ctrl |=
356 AD5592R_REG_CTRL_ADC_RANGE;
358 st->cached_gp_ctrl &=
359 ~AD5592R_REG_CTRL_ADC_RANGE;
362 ret = st->ops->reg_write(st, AD5592R_REG_CTRL,
364 mutex_unlock(&iio_dev->mlock);
376 static int ad5592r_read_raw(struct iio_dev *iio_dev,
377 struct iio_chan_spec const *chan,
378 int *val, int *val2, long m)
380 struct ad5592r_state *st = iio_priv(iio_dev);
385 case IIO_CHAN_INFO_RAW:
386 mutex_lock(&iio_dev->mlock);
389 ret = st->ops->read_adc(st, chan->channel, &read_val);
393 if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
394 dev_err(st->dev, "Error while reading channel %u\n",
400 read_val &= GENMASK(11, 0);
403 read_val = st->cached_dac[chan->channel];
406 dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
407 chan->channel, read_val);
409 *val = (int) read_val;
412 case IIO_CHAN_INFO_SCALE:
413 *val = ad5592r_get_vref(st);
415 if (chan->type == IIO_TEMP) {
416 s64 tmp = *val * (3767897513LL / 25LL);
417 *val = div_s64_rem(tmp, 1000000000LL, val2);
419 ret = IIO_VAL_INT_PLUS_MICRO;
423 mutex_lock(&iio_dev->mlock);
426 mult = !!(st->cached_gp_ctrl &
427 AD5592R_REG_CTRL_DAC_RANGE);
429 mult = !!(st->cached_gp_ctrl &
430 AD5592R_REG_CTRL_ADC_RANGE);
434 *val2 = chan->scan_type.realbits;
435 ret = IIO_VAL_FRACTIONAL_LOG2;
438 case IIO_CHAN_INFO_OFFSET:
439 ret = ad5592r_get_vref(st);
441 mutex_lock(&iio_dev->mlock);
443 if (st->cached_gp_ctrl & AD5592R_REG_CTRL_ADC_RANGE)
444 *val = (-34365 * 25) / ret;
446 *val = (-75365 * 25) / ret;
454 mutex_unlock(&iio_dev->mlock);
458 static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
459 struct iio_chan_spec const *chan, long mask)
462 case IIO_CHAN_INFO_SCALE:
463 return IIO_VAL_INT_PLUS_NANO;
466 return IIO_VAL_INT_PLUS_MICRO;
472 static const struct iio_info ad5592r_info = {
473 .read_raw = ad5592r_read_raw,
474 .write_raw = ad5592r_write_raw,
475 .write_raw_get_fmt = ad5592r_write_raw_get_fmt,
478 static ssize_t ad5592r_show_scale_available(struct iio_dev *iio_dev,
480 const struct iio_chan_spec *chan,
483 struct ad5592r_state *st = iio_priv(iio_dev);
485 return sprintf(buf, "%d.%09u %d.%09u\n",
486 st->scale_avail[0][0], st->scale_avail[0][1],
487 st->scale_avail[1][0], st->scale_avail[1][1]);
490 static struct iio_chan_spec_ext_info ad5592r_ext_info[] = {
492 .name = "scale_available",
493 .read = ad5592r_show_scale_available,
499 static void ad5592r_setup_channel(struct iio_dev *iio_dev,
500 struct iio_chan_spec *chan, bool output, unsigned id)
502 chan->type = IIO_VOLTAGE;
504 chan->output = output;
506 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
507 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
508 chan->scan_type.sign = 'u';
509 chan->scan_type.realbits = 12;
510 chan->scan_type.storagebits = 16;
511 chan->ext_info = ad5592r_ext_info;
514 static int ad5592r_alloc_channels(struct ad5592r_state *st)
516 unsigned i, curr_channel = 0,
517 num_channels = st->num_channels;
518 struct iio_dev *iio_dev = iio_priv_to_dev(st);
519 struct iio_chan_spec *channels;
520 struct fwnode_handle *child;
524 device_for_each_child_node(st->dev, child) {
525 ret = fwnode_property_read_u32(child, "reg", ®);
526 if (ret || reg >= ARRAY_SIZE(st->channel_modes))
529 ret = fwnode_property_read_u32(child, "adi,mode", &tmp);
531 st->channel_modes[reg] = tmp;
533 fwnode_property_read_u32(child, "adi,off-state", &tmp);
535 st->channel_offstate[reg] = tmp;
538 channels = devm_kcalloc(st->dev,
539 1 + 2 * num_channels, sizeof(*channels),
544 for (i = 0; i < num_channels; i++) {
545 switch (st->channel_modes[i]) {
547 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
553 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
558 case CH_MODE_DAC_AND_ADC:
559 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
562 ad5592r_setup_channel(iio_dev, &channels[curr_channel],
572 channels[curr_channel].type = IIO_TEMP;
573 channels[curr_channel].channel = 8;
574 channels[curr_channel].info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
575 BIT(IIO_CHAN_INFO_SCALE) |
576 BIT(IIO_CHAN_INFO_OFFSET);
579 iio_dev->num_channels = curr_channel;
580 iio_dev->channels = channels;
585 static void ad5592r_init_scales(struct ad5592r_state *st, int vref_mV)
587 s64 tmp = (s64)vref_mV * 1000000000LL >> 12;
589 st->scale_avail[0][0] =
590 div_s64_rem(tmp, 1000000000LL, &st->scale_avail[0][1]);
591 st->scale_avail[1][0] =
592 div_s64_rem(tmp * 2, 1000000000LL, &st->scale_avail[1][1]);
595 int ad5592r_probe(struct device *dev, const char *name,
596 const struct ad5592r_rw_ops *ops)
598 struct iio_dev *iio_dev;
599 struct ad5592r_state *st;
602 iio_dev = devm_iio_device_alloc(dev, sizeof(*st));
606 st = iio_priv(iio_dev);
609 st->num_channels = 8;
610 dev_set_drvdata(dev, iio_dev);
612 st->reg = devm_regulator_get_optional(dev, "vref");
613 if (IS_ERR(st->reg)) {
614 if ((PTR_ERR(st->reg) != -ENODEV) && dev->of_node)
615 return PTR_ERR(st->reg);
619 ret = regulator_enable(st->reg);
624 iio_dev->dev.parent = dev;
625 iio_dev->name = name;
626 iio_dev->info = &ad5592r_info;
627 iio_dev->modes = INDIO_DIRECT_MODE;
629 ad5592r_init_scales(st, ad5592r_get_vref(st));
631 ret = ad5592r_reset(st);
633 goto error_disable_reg;
635 ret = ops->reg_write(st, AD5592R_REG_PD,
636 (st->reg == NULL) ? AD5592R_REG_PD_EN_REF : 0);
638 goto error_disable_reg;
640 ret = ad5592r_alloc_channels(st);
642 goto error_disable_reg;
644 ret = ad5592r_set_channel_modes(st);
646 goto error_reset_ch_modes;
648 ret = iio_device_register(iio_dev);
650 goto error_reset_ch_modes;
652 ret = ad5592r_gpio_init(st);
654 goto error_dev_unregister;
658 error_dev_unregister:
659 iio_device_unregister(iio_dev);
661 error_reset_ch_modes:
662 ad5592r_reset_channel_modes(st);
666 regulator_disable(st->reg);
670 EXPORT_SYMBOL_GPL(ad5592r_probe);
672 int ad5592r_remove(struct device *dev)
674 struct iio_dev *iio_dev = dev_get_drvdata(dev);
675 struct ad5592r_state *st = iio_priv(iio_dev);
677 iio_device_unregister(iio_dev);
678 ad5592r_reset_channel_modes(st);
679 ad5592r_gpio_cleanup(st);
682 regulator_disable(st->reg);
686 EXPORT_SYMBOL_GPL(ad5592r_remove);
688 MODULE_AUTHOR("Paul Cercueil <paul.cercueil@analog.com>");
689 MODULE_DESCRIPTION("Analog Devices AD5592R multi-channel converters");
690 MODULE_LICENSE("GPL v2");